ON Semiconductor MC14014B, MC14021B Technical data

MC14014B, MC14021B

8−Bit Static Shift Register

The MC14014B and MC14021B 8−bit static shift registers are constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. These s hift registers f ind p rimary use in parallel−to−serial data conversion, synchronous and asynchronous parallel input, serial output data queueing; and other general purpose register applications requiring low power and/or high noise immunity.

Features

• Synchronous Parallel Input/Serial Output (MC14014B)

• Asynchronous Parallel Input/Serial Output (MC14021B)

• Synchronous Serial Input/Serial Output

• Full Static Operation

• “Q” Outputs from Sixth, Seventh, and Eighth Stages

• Double Diode Input Protection

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low−power TTL Loads or One Low−power

Schottky TTL Load Over the Rated Temperature Range

• MC14014B Pin−for−Pin Replacement for CD4014B

• MC14021B Pin−for−Pin Replacement for CD4021B

• Pb−Free Packages are Available*

MAXIMUM RATINGS (Voltages Referenced to V

Symbol

Vin, V

Iin, I

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and V to the range V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

DC Supply Voltage Range −0.5 to +18.0 V

Input or Output Voltage Range

out

Input or Output Current

out

Power Dissipation, per Package

Ambient Temperature Range −55 to +125 °C

Storage Temperature Range −65 to +150 °C

stg

Lead Temperature

Parameter Value Unit

(DC or Transient)

(DC or Transient) per Pin

(Note 1)

(8−Second Soldering)

 (Vin or V

or VDD). Unused outputs must be left open.

)  VDD.

out

)

−0.5 to VDD + 0.5 V

±10 mA

500 mW

260 °C

should be constrained

out

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MARKING

DIAGRAMS

PDIP−16

P SUFFIX

CASE 648

SOIC−16

D SUFFIX

CASE 751B

SOEIAJ−16

F SUFFIX

CASE 966

xx = Specific Device Code A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week

MC140xxBCP

AWLYYWW

140xxB

AWLYWW

MC140xxB

AWLYWW

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

 Semiconductor Components Industries, LLC, 2005

February, 2005 − Rev. 5

1 Publication Order Number:

MC14014B/D

MC14014B, MC14021B

TRUTH TABLE

SERIAL OPERATION:

t Clock D

n000?? n+1 1 0 1 0 ? n+2 0 0 0 1 0 n+3 1 0 1 0 1

X 0 Q6 Q7 Q8

PARALLEL OPERATION:

MC14014B MC14021B D

*Q6, Q7, & Q8 are available externally X = Don’t Care

Clock

Q6 Q7 Q8

P/S t=n+6 t=n+7 t=n+8

P/S Pn*Q

XX100 XX111

P/S

PIN ASSIGNMENT

125

P/S

LOGIC DIAGRAM

P1 P2 P3 P6 P7 P8

765 14151

DCQDCQDCQD

QDCQD

CLOCK

Q Q

= PIN 16

= PIN 8

P4 = PIN 4 P5 = PIN 13

2123

Q8Q7Q6

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MC14014B, MC14021B

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

Characteristic

ОООООООО

Output Voltage “0” Level

= VDD or 0

ОООООООО

Vin = 0 or V

ОООООООО

“1” Level

Input Voltage “0” Level

= 4.5 or 0.5 Vdc)

ОООООООО

= 9.0 or 1.0 Vdc)

ОООООООО

= 13.5 or 1.5 Vdc)

(VO = 0.5 or 4.5 Vdc) “1” Level

= 1.0 or 9.0 Vdc)

ОООООООО

= 1.5 or 13.5 Vdc)

Output Drive Current

ОООООООО

= 2.5 Vdc) Source

= 4.6 Vdc)

ОООООООО

= 9.5 Vdc) = 13.5 Vdc)

(VOL = 0.4 Vdc) Sink (V

= 0.5 Vdc)

ОООООООО

= 1.5 Vdc)

Input Current Input Capacitance

ОООООООО

= 0)

Quiescent Current

(Per Package)

ОООООООО

Total Supply Current (Notes 3 & 4)

ОООООООО

(Dynamic plus Quiescent, Per Package)

ОООООООО

= 50 pF on all outputs, all

ОООООООО

buffers switching)

Symbol

ÎÎ

Vdc

5.0 10 15

5.0 10

5.0

5.0 10

5.0

5.0 10

15 15

−

5.0 10

5.0

10 15

Min

−

4.95

9.95

14.95

−

3.5

7.0

– 3.0

– 0.64

– 1.6

– 4.2

0.64

1.6

4.2

−

ООООООООООООООО

− 55C

)

Max

0.05

1.5

3.0

4.0

± 0.1

5.0 10

−

25C

Min

ÎÎ

−

ÎÎ

4.95

9.95

ÎÎ

14.95

−

ÎÎ

−

ÎÎ

−

3.5

7.0

ÎÎ

– 2.4

– 0.51

ÎÎ

− 1.3

ÎÎ

− 3.4

0.51

1.3

ÎÎ

3.4

−

ÎÎ

−

ÎÎ

−

Typ

(Note 2)

0 0 0

5.0 10

2.25

4.50

6.75

2.75

5.50

8.25

– 4.2

– 0.88

– 2.25

− 8.8

0.88

2.25

8.8

±0.00001

5.0

0.005

0.010

0.015

IT = (0.75 A/kHz) f + I IT = (1.50 A/kHz) f + I IT = (2.25 A/kHz) f + I

Max

ÎÎ

0.05

ÎÎ

−

ÎÎ

−

1.5

ÎÎ

3.0

ÎÎ

4.0

−

ÎÎ

−

ÎÎ

−

ÎÎ

−

ÎÎ

−

ÎÎ

−

± 0.1

7.5

ÎÎ

5.0 10

ÎÎ

DD DD DD

Min

−

4.95

9.95

14.95

−

3.5

7.0

– 1.7

− 0.36

– 0.9

− 2.4

0.36

0.9

2.4

−

125C

Max

0.05

1.5

3.0

4.0

± 1.0

150 300

600

2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

3. The formulas given are for the typical characteristics only at 25C.

4. To calculate total supply current at loads other than 50 pF: ) = IT(50 pF) + (CL − 50) Vfk

T(CL

where: I

is in A (per package), CL in pF, V = (VDD − VSS) in volts, f in kHz is input frequency, and k = 0.0015.

Unit

Vdc

−

Vdc

−

− Vdc

−

Vdc

−

mAdc

−

mAdc

−

Adc

−

Adc

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