ON Semiconductor MC10EP90, MC100EP90 User Manual

MC10EP90, MC100EP90

Translator, Triple ECL Input to
LVPECL / PECL Output

Description

The MC
translator. The device receives differential LVECL or ECL signals and
translates them to differential LVPECL or PECL output signals.
A VBB output is provided for interfacing with Single−Ended LVECL or

VBB output should be connected to the D input. The active signal would
then drive the D input. When used the VBB output should be bypassed
to ground by a 0.01 mF capacitor. The VBB output is designed to act as
the switching reference for the EP90 under Single−Ended input
switching conditions, as a result this pin can only source/sink up to 0.5
mA of current.

To accomplish the level translation the EP90 requires three power
rails. The VCC supply should be connected to the positive supply, and
the VEE connected to the negative supply.

The 100 Series contains temperature compensation.

Features

• 260 ps Typical Propagation Delay

• Maximum Frequency > 3 GHz Typical

• Voltage Supplies V

GND = 0 V

• Open Input Default State

• Safety Clamp on Inputs

• Fully Differential Design

• Q Output Will Default LOW with Inputs Open or at V

• V

• These are Pb−Free Devices*

10/100EP90 is a TRIPLE ECL TO LVPECL/PECL

ECL signals at the input. If a Single−Ended input is to be used the

= 3.0 V to 5.5 V, VEE = −3.0 V to −5.5 V,

CC

EE

Output

BB

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TSSOP−20
DT SUFFIX

CASE 948E

MARKING DIAGRAM*

20

xxxx

EP90

ALYWG

G

1

xxxx = MC10 or 100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2014

May, 2014 − Rev. 7

1 Publication Order Number:

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.

MC10EP90/D

MC10EP90, MC100EP90

Q0

GND Q1 GND Q2 Q2 V

V

Q0

Q1

CC

1718 16 15 14 13 12

LVPECL/

PECL

ECL

LVPECL/

PECL

ECL

43 56789

BB

D1V

D1D0

D2V

V

BB

D2

LVPECL/

PECL

ECL

CC

1920

21

D0

Warning: All VCC, VEE and GND pins must be externally connected to

Power Supply to guarantee proper operation.

Figure 1. TSSOP−20 (Top View) and Logic Diagram

Table 3. ATTRIBUTES

Characteristics Value

Internal Input Pulldown Resistor
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model

Charged Device Model

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg

Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 350 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, refer to Application Note AND8003/D.

CC

11

Table 1. PIN DESCRIPTION

PIN

Q(0:2), Q

FUNCTION

(0:2)

Differential LVPECL or PECL Outputs
D(0:2)*, D(0:2)* Differential LVECL or ECL Inputs
V

CC

Positive Supply
GND Ground
V

EE

V

BB

Negative Supply

Output Reference Supply

* Pins will default LOW when left open.

Table 2. FUNCTION TABLE

10

V

EE

Machine Model

TSSOP−20 Level 1 Level 1

Function V

−5V ECL to 5V PECL

−5V ECL to 3.3V PECL

−3.3V ECL to 5V PECL

−3.3V ECL to 3.3V PECL

75 kW

> 2 kV

> 200 V

> 2 kV

CC

5 V

3.3 V
5 V

3.3 V

GND

0 V
0 V
0 V
0 V

V

EE

−5 V

−5 V

−3.3 V

−3.3 V

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MC10EP90, MC100EP90

Table 4. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit

V

CC

V

EE

V

I

I

out

I

BB

T

A

T

stg

q

JA

q

JC

T

sol

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

PECL Mode Power Supply GND = 0 V 6 V
NECL Mode Power Supply GND = 0 V −6 V
PECL Mode Input Voltage

NECL Mode Input Voltage
Output Current Continuous

GND = 0 V
GND = 0 V

Surge

VI  V
VI  V

CC
EE

6

−6
50

100

V
V

mA

mA
VBB Sink/Source ± 0.5 mA
Operating Temperature Range −40 to +85 °C
Storage Temperature Range −65 to +150 °C
Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

TSSOP−20
TSSOP−20

140
100

°C/W
°C/W

Thermal Resistance (Junction−to−Case) Standard Board TSSOP−20 23 to 41 °C/W
Wave Solder Pb

Pb−Free

<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C

265
265

°C

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