ON Semiconductor MC10103 Technical data

MC10103

Quad 2-Input OR Gate

The MC10103 is a quad 2–input OR gate. The MC10103 provides

one gate with OR/NOR outputs.

• P

= 25 mW typ/gate (No Load)

D

• t

= 2.0 ns typ

pd

• t

, tf = 2.0 ns typ (20%–80%)

r

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LOGIC DIAGRAM

4

5

6

7

12

13

10

11

V V

PIN ASSIGNMENT

V

CC1

A

OUT

B

OUT

A

IN

A

IN

B

IN

B

IN

V

EE

1

2

3

4

5

6

7

8

CC1

CC2

V

EE

DIP

= PIN 1 = PIN 16 = PIN 8

16

15

14

13

12

11

10

9

MARKING

DIAGRAMS

2

CDIP–16

3

15

9

14

V

CC2

C

OUT

D

OUT

C

IN

C

IN

D

IN

D

IN

C

OUT

MC10103L CDIP–16 25 Units / Rail

MC10103P PDIP–16 25 Units / Rail MC10103FN PLCC–20 46 Units / Rail

ORDERING INFORMATION

Device Package Shipping

L SUFFIX

CASE 620

PDIP–16

P SUFFIX

CASE 648

PLCC–20

FN SUFFIX

CASE 775

A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week

16

MC10103L

AWLYYWW

1

16

MC10103P

AWLYYWW

1

10103

AWLYYWW

For PLCC pin assignment, see the Pin Conversion Tables on page 18

Pin assignment is for Dual–in–Line Package.

of the ON Semiconductor MECL Data Book (DL122/D).

 Semiconductor Components Industries, LLC, 2002

January , 2002 – Rev. 7

1 Publication Order Number:

MC10103/D

MC10103

Und

ELECTRICAL CHARACTERISTICS

Test Limits

er

Characteristic Symbol

Power Supply Drain Current I Input Current I

Output Voltage Logic 1 V

inH

I

E

inL

OH

Test

8 29 21 26 29 mAdc 4* 390 245 245 µAdc 4* 0.5 0.5 0.3 µAdc

2

9

Output Voltage Logic 0 V

OL

2

9

Threshold Voltage Logic 1 V

OHA

2

9

Threshold Voltage Logic 0 V

OLA

2

9

Switching Times (50Ω Load) ns Propagation Delay t

Rise Time (20 to 80%) t Fall Time (20 to 80%) t

4+2+

t

12+9–

2+

2–

2

9

2 1.1 3.6 1.1 2.0 3.3 1.1 3.7

* Individually test each input applying VIH or VIL to input under test.

–30°C +25°C +85°C

Min Max Min Typ Max Min Max

–1.060 –1.060

–1.890 –1.890

–1.080 –1.080

1.0

–0.890 –0.890

–1.675 –1.675

–1.655 –1.655

3.1

–0.960 –0.960

–1.850 –1.850

–0.980 –0.980

1.0

2.0

–0.810 –0.810

–1.650 –1.650

–1.630 –1.630

2.9

–0.890 –0.890

–1.825 –1.825

–0.910 –0.910

1.0

–0.700 –0.700

–1.615 –1.615

–1.595 –1.595

3.3

Unit

Vdc

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MC10103

ELECTRICAL CHARACTERISTICS (continued)

TEST VOLTAGE VALUES (Volts)

@ Test Temperature V

IHmax

–30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2

Characteristic Symbol

Power Supply Drain Current I Input Current I

Output Voltage Logic 1 V

I

inH inL

OH

Under

Test

E

8 8 1, 16 4* 4* 8 1, 16 4* 4* 8 1, 16

2

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

V

IHmax

4.5 8

9

Output Voltage Logic 0 V

Threshold Voltage Logic 1 V

OL

OHA

2

9

12, 13

2

9

Threshold Voltage Logic 0 V

OLA

2

9

Switching Times (50Ω Load) Pulse In Pulse Out –3.2 V +2.0 V Propagation Delay t

Rise Time (20 to 80%) t Fall Time (20 to 80%) t

4+2+

t

12+9–

2+ 2–

2

9

2 4 2 8 1, 16

* Individually test each input applying VIH or VIL to input under test. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.

V

ILmin

V

IHAmin

V

IHAmin

4, 5

12, 13

12

V

ILAmax

V

EE

(VCC)

V

ILAmax

V

EE

Gnd

1, 16

8 8

12, 13

8

4, 5 8

8

4

2 9

8 8

1, 16 1, 16

1, 16

1, 16 1, 16

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