ON Semiconductor MAC15CD, MAC15CM, MAC15SN Technical data

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MAC15SD, MAC15SM,
MAC15SN

Preferred Device

Sensitive Gate Triacs

Silicon Bidirectional Thyristors

Designed for industrial and consumer applications for full wave
control of ac loads such as appliance controls, heater controls, motor
controls, and other power switching applications.

• Sensitive Gate allows Triggering by Microcontrollers and other

Logic Circuits

• High Immunity to dv/dt — 25 V/

• High Commutating di/dt — 8.0 A/ms minimum at 110

• Minimum and Maximum Values of I

Ease of Design

• On-State Current Rating of 15 Amperes RMS at 70

• High Surge Current Capability — 120 Amperes

• Blocking Voltage to 800 Volts

• Rugged, Economical TO220AB Package

• Uniform Gate Trigger Currents in Three Quadrants, Q1, Q2, and Q3

• Device Marking: Logo, Device T ype, e.g., MAC15SD, Date Code

m

s minimum at 110_C

, VGT and IH Specified for

GT

_

_

C

C

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TRIACS

15 AMPERES RMS

400 thru 800 VOLTS

MT2

MT1

G

4

MAXIMUM RATINGS (T

Rating Symbol Value Unit

Peak Repetitive Off–State V oltage

(TJ = –40 to 110°C, Sine Wave, 50 to
60Hz, Gate Open)

On–State RMS Current

(Full Cycle Sine Wave, 60Hz,
TJ = 70°C)

Peak Non-repetitive Surge Current

(One Full Cycle Sine Wave,

60 Hz, TJ = 110°C)
Circuit Fusing Consideration (t = 8.3 ms) I2t 60 A2s
Peak Gate Power

(Pulse Width ≤ 1.0 µs, TC = 70°C)
Average Gate Power

(t = 8.3 ms, TC = 70°C)
Operating Junction Temperature Range T

Storage Temperature Range T

(1) V

and V

DRM

voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.

RRM

= 25°C unless otherwise noted)

J

(1)

MAC15SD
MAC15SM
MAC15SN

for all types can be applied on a continuous basis. Blocking

V

DRM,

V

RRM

I

T(RMS)

I

TSM

P

GM

P

G(AV)

J

stg

400
600
800

15 A

120 A

20 Watts

0.5 Watts

–40 to

+110

–40 to

+150

Volts

°C

°C

1

2

3

TO–220AB

CASE 221A

STYLE 4

PIN ASSIGNMENT

1
2
3 Gate
4

Main Terminal 1
Main Terminal 2

Main Terminal 2

ORDERING INFORMATION

Device Package Shipping

MAC15SD TO220AB 50 Units/Rail
MAC15SM TO220AB
MAC15SN TO220AB 50 Units/Rail

Preferred devices are recommended choices for future use
and best overall value.

50 Units/Rail

 Semiconductor Components Industries, LLC, 1999

January , 2000 – Rev. 2

1 Publication Order Number:

MAC15S/D

MAC15SD, MAC15SM, MAC15SN

THERMAL CHARACTERISTICS

Characteristic Symbol Value Unit

Thermal Resistance

— Junction to Case
— Junction to Ambient

Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds T

R
R

θJC
θJA

L

2.0

°C/W

62.5
260 °C

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25°C unless otherwise noted; Electricals apply in both directions)

J

OFF CHARACTERISTICS

Peak Repetitive Blocking Current

(VD = Rated V

DRM

, V

; Gate Open) TJ = 25°C

RRM

TJ = 110°C

ON CHARACTERISTICS

Peak On-State Voltage
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100Ω)

MT2(+), G(+)
MT2(+), G(–)

MT2(–), G(–)
Hold Current (VD = 12 V, Gate Open, Initiating Current = "150mA) I
Latching Current (VD = 24V, IG = 5mA)

MT2(+), G(+)

MT2(+), G(–)

MT2(–), G(–)
Gate Trigger V oltage (Continuous dc) (VD = 12 V, RL = 100Ω)

MT2(+), G(+)

MT2(+), G(–)

MT2(–), G(–)

(1)

(ITM = "21A) V

DYNAMIC CHARACTERISTICS

Rate of Change of Commutating Current

(VD = 400V, ITM = 3.5A, Commutating dv/dt = 10Vm/sec,

Gate Open, TJ = 110_C, f= 500Hz, Snubber: CS = 0.01 mF, RS =15W,

see Figure 15.)
Critical Rate of Rise of Off-State V oltage

(VD = Rate V

(1) Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.

, Exponential Waveform, RGK = 510W, TJ = 110_C)

DRM

Symbol Min Typ Max Unit

I

,

DRM

I

RRM

TM

I

GT

H

I

L

V

GT

(di/dt)c 8.0 10 — A/ms

dv/dt 25 75 —

—
—

— — 1.8 Volts

.8
.8
.8

1.0 3.0 10 mA

2.0

2.0

2.0

0.45

0.45

0.45

—
—

2.0

3.0

3.0

5.0
10

5.0

0.62

0.60

0.65

0.01

2.0

5.0

5.0

5.0

15
20
15

1.5

1.5

1.5

mA

mA

mA

Volts

V/ms

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2

Symbol Parameter

V

DRM

I

DRM

V

RRM

I

RRM

V

TM

I

H

Peak Repetitive Forward Off State Voltage
Peak Forward Blocking Current
Peak Repetitive Reverse Off State Voltage
Peak Reverse Blocking Current

Maximum On State Voltage
Holding Current

MAC15SD, MAC15SM, MAC15SN

Voltage Current Characteristic of Triacs

(Bidirectional Device)

on state

I

at V

RRM

Quadrant Definitions for a Triac

MT2 POSITIVE

(Positive Half Cycle)

+

RRM

Quadrant 3
MainTerminal 2 –

V

TM

+ Current

I

H

V

I

H

off state

TM

Quadrant 1
MainTerminal 2 +

I

at V

DRM

DRM

+ Voltage

(+) MT2

Quadrant II Quadrant I

IGT – + I

Quadrant III Quadrant IV

All polarities are referenced to MT1.
With in–phase signals (using standard AC lines) quadrants I and III are used.

(–) I

GATE

(–) I

GATE

GT

MT1

REF

(–) MT2

GT

MT1

REF

–

MT2 NEGATIVE

(Negative Half Cycle)

(+) I

GATE

(+) I

GATE

(+) MT2

GT

MT1

REF

(–) MT2

GT

MT1

REF

GT

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3

MAC15SD, MAC15SM, MAC15SN

110

100

a

= 30 and 60°

90

α

80

70

60

0 2 4 6 8 10 12 14 16

, MAXIMUM ALLOWABLE CASE TEMPERATURE ( °C)T

C

α

a

= CONDUCTION ANGLE

I

, RMS ON–STATE CURRENT (AMPS)

T(RMS)

120°

Figure 1. RMS Current Derating

100

Typical @ TJ = 25 °C

10

Maximum @

TJ = 25 °C

180°

DC

25

α

20

15

10

5

, AVERAGE POWER DISSIPATION (WATTS)

(AV)

P

0

0 2 4 6 8 10 12 14 16

α

a

= CONDUCTION ANGLE

I

, RMS ON–STATE CURRENT (AMPS)

T(RMS)

90°

60°

120°

180°

DC

a

= 30°

Figure 2. Maximum On–State Power Dissipation

1

Z

0.1

q

JC(t)

= R

q

JC(t)

 r(t)

1

INSTANTANOUS ON-STA TE CURRENT (AMPS),

T

0.1

I

0.5 1 1.5 2 2.5 3 3.5 4 4.5

Maximum @

TJ = 110°C

VT, INSTANTANEOUS ON–STATE VOLTAGE (VOLTS)

Figure 3. On–State Characteristics

7

6

5

4

3

, HOLDING CURRENT (mA)

H

I

2

1
–40 –25 –10 5 20 35 50 65 80 95 110

MT2 POSITIVE

TJ, JUNCTION TEMPERATURE (°C)

MT2 NEGATIVE

Figure 5. Typical Holding Current Versus

Junction T emperature

0.01

TRANSIENT THERMAL RESISTANCE (NORMALIZED)

0.1 1 10 100 1000

,
(t)

R

t, TIME (ms)

Figure 4. Transient Thermal Response

9

8

7

6

5

4

, LATCHING CURRENT (mA)

L

I

3

2

–40 –25 –10 5 20 35 50 65 80 95 110

TJ, JUNCTION TEMPERATURE (°C)

Q1

Q3

Figure 6. T ypical Latching Current Versus

Junction T emperature

1@10

4

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4

MAC15SD, MAC15SM, MAC15SN

7

6

5

4

3

2

, GATE TRIGGER CURRENT (mA)

1

GT

I

0

–40 –25 –10 5 20 35 50 65 80 95 110

Q3

Q2

Q1

TJ, JUNCTION TEMPERATURE (°C)

Figure 7. T ypical Gate Trigger Current

Versus Junction Temperature

140

VPK = 400V

120

S)

m

100

STATIC dv/dt (V/

80

60

100 200 300 400 500 600 700 800 900 1000

600V

800V

RGK, GATE–MT1 RESISTANCE (OHMS)

TJ = 110°C

Figure 9. T ypical Exponential Static dv/dt

Versus Gate–MT1 Resistance, MT2(+)

0.9

0.8

0.7

0.6

0.5

0.4

, GATE TRIGGER VOLTAGE (VOL TS)

GT

V

0.3
–40 –25 –10 5 20 35 50 65 80 95 110

Q1

Q2

TJ, JUNCTION TEMPERATURE (°C)

Q3

Figure 8. T ypical Gate Trigger V oltage

Versus Junction Temperature

110

100

S)

m

90

80

STATIC dv/dt (V/

70

60

RG – MT1 = 510

50

400 450 500 550 600 650 700 750 800

W

VPK, Peak Voltage (V olts)

TJ = 100°C

110°C

120°C

Figure 10. T ypical Exponential Static dv/dt

Versus Peak Voltage, MT2(+)

110

100

90

S)

m

80

70

STATIC dv/dt (V/

60

RG – MT1 = 510

50

40

100 105 110 115 120 125

W

TJ, Junction Temperature (°C)

VPK = 400V

600V

800V

Figure 11. Typical Exponential Static dv/dt

Versus Junction Temperature, MT2(+)

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180
160
140

S)

m

120
100

80

STATIC dv/dt (V/

60

RG – MT1 = 510

40
20

400 450 500 550 600 650 700 750 800

W

VPK, Peak Voltage (V olts)

TJ = 100°C

110°C

120°C

Figure 12. T ypical Exponential Static dv/dt

Versus Peak Voltage, MT2(*)

5

MAC15SD, MAC15SM, MAC15SN

STATI

(V

S)

)

200

150

m

/

600V

VPK = 400V

100

C dv/dt

800V

50

RG – MT1 = 510

0

100 105 110 115 120 125

W

TJ, Junction Temperature (°C)

Figure 13. T ypical Exponential Static dv/dt

Versus Junction Temperature, MT2(*)

200 V

RMS

ADJUST FOR

ITM, 60 Hz V

AC

m

100

90°C

10

1

f =

2 t

(di/dt)c =

w

6f I

1000

110°C

TM

t

w

V

DRM

1

1 5 10 15 20 25

100°C

(di/dt)c, CRITICAL RATE OF CHANGE OF COMMUTATING CURRENT (A/ms

, CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE (V/ s)

c

Figure 14. Critical Rate of Rise of

Commutating Voltage

(dv/dt)

L

L

MEASURE

I

R

S

1N4007

CHARGE

TRIGGER

CHARGE

CONTROL

NON-POLAR

C

S

ADJUST FOR

MT2

1N914

51

W

C

L

TRIGGER CONTROL

MT1

G

di/dt

(c)

–

200 V

+

Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.

Figure 15. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)

c

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6

MAC15SD, MAC15SM, MAC15SN

P ACKAGE DIMENSIONS

TO–220AB

CASE 221A–09

ISSUE Z

SEATING

–T–

PLANE

T

4

Q

123

A

U

C

S

H

K

Z

L

V

R
J

G

D

N

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88
F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
H 0.110 0.155 2.80 3.93
J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
S 0.045 0.055 1.15 1.39
T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
V 0.045 ––– 1.15 –––
Z ––– 0.080 ––– 2.04

STYLE 4:

PIN 1. MAIN TERMINAL 1

2. MAIN TERMINAL 2

3. GATE

4. MAIN TERMINAL 2

MILLIMETERSINCHES

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7

MAC15SD, MAC15SM, MAC15SN

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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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MAC15S/D