ON Semiconductor MAC12SM, MAC12SN Technical data

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MAC12SM, MAC12SN
Preferred Device
Sensitive Gate Triacs
Silicon Bidirectional Thyristors
Sensitive Gate Allows Triggering by Microcontrollers and other
Logic Circuits
Blocking Voltage to 800 Volts
On-State Current Rating of 12 Amperes RMS at 70°C
High Surge Current Capability - 90 Amperes
Rugged, Economical TO220AB Package
Glass Passivated Junctions for Reliability and Uniformity
Maximum Values of I
High Commutating di/dt - 8.0 A/ms Minimum at 110°C
Immunity to dV/dt - 15 V/sec Minimum at 110°C
Operational in Three Quadrants: Q1, Q2, and Q3
Device Marking: Logo, Device Type, e.g., MAC12SM, Date Code
, VGT and IH Specified for Ease of Design
GT
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TRIACS
12 AMPERES RMS
600 thru 800 VOLTS
MT2
4
MT1
G
MARKING DIAGRAM
MAXIMUM RATINGS (T
Peak Repetitive Off-State Voltage (Note 1)
(T
= -40 to 110°C, Sine Wave,
J
50 to 60 Hz, Gate Open)
On-State RMS Current
(All Conduction Angles; T
Peak Non-Repetitive Surge Current
(One Full Cycle Sine Wave, 60 Hz, T
= 110°C)
J
Circuit Fusing Consideration
(t = 8.33 ms)
Peak Gate Power
(Pulse Width = 1.0 sec, T
Average Gate Power
(t = 8.3 msec, T
Operating Junction Temperature Range T
Storage Temperature Range T
1. (V
and V
DRM
voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.
RRM
= 25°C unless otherwise noted)
J
Rating
MAC12SM MAC12SN
= 70°C)
C
= 70°C)
C
= 70°C)
C
for all types can be applied on a continuous basis. Blocking
Symbol Value Unit
V
DRM,
V
RRM
600 800
I
T(RMS)
I
TSM
I2t 33 A2sec
P
GM
P
G(AV)
J
stg
12 A
90 A
16 W
0.35 W
- 40 to 110
- 40 to 150
°C
°C
MAC12xx
ALYWW
V
1
2
3
TO-220AB
CASE 221A
Style 4
xx = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year WW = Work Week
PIN ASSIGNMENT
1 2 3 Gate 4
Main Terminal 1 Main Terminal 2
Main Terminal 2
ORDERING INFORMATION
Device Package Shipping
MAC12SM TO220AB 50 Units/Rail
Semiconductor Components Industries, LLC, 2003
April, 2003 - Rev. 2
MAC12SN TO220AB
Preferred devices are recommended choices for future use and best overall value.
1 Publication Order Number:
50 Units/Rail
MAC12SM/D
MAC12SM, MAC12SN
THERMAL CHARACTERISTICS
Characteristic Symbol Value Unit
Thermal Resistance - Junction to Case
- Junction to Ambient
Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds T
R
JC
R
JA
L
2.2
°C/W
62.5 260 °C
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted; Electricals apply in both directions)
J
Characteristic
OFF CHARACTERISTICS
Peak Repetitive Blocking Current
(V
= Rated V
D
DRM
, V
; Gate Open) TJ = 25°C
RRM
ON CHARACTERISTICS
Peak On-State Voltage
(1)
(ITM = ±17 A)
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 )
MT2(+), G(+) MT2(+), G(-) MT2(-), G(-)
Holding Current
(V
= 12 V, Gate Open, Initiating Current = ±200 mA)
D
Latching Current (VD = 12 V, IG = 5 mA)
MT2(+), G(+) MT2(+), G(-) MT2(-), G(-)
Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 )
MT2(+), G(+) MT2(+), G(-) MT2(-), G(-)
DYNAMIC CHARACTERISTICS
Critical Rate of Change of Commutating Current
(V
= 400 V, ITM = 3.5 A, Commutating dV/dt = 10 V/s, Gate Open,
D
= 110°C, f = 500 Hz, Snubber: Cs = 0.01 f, Rs = 15 )
T
J
Critical Rate of Rise of Off-State Voltage
(V
= 67% V
D
= 110°C)
T
J
, Exponential Waveform, RGK = 1 K,
DRM
Repetitive Critical Rate of Rise of On-State Current
IPK = 50 A; PW = 40 sec; diG/dt = 1 A/sec; Igt = 100 mA; f = 60 Hz
2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
= 110°C
T
J
Symbol Min Typ Max Unit
I
DRM
I
RRM
V
TM
I
GT
I
H
I
L
V
GT
(di/dt)
,
-
-
-
-
0.01
2.0
- - 1.85 V
-
-
-
1.5
2.5
2.7
5.0
5.0
5.0
- 2.5 10 mA
-
-
-
0.45
0.45
0.45
c
8.0 10 - A/ms
3.0
5.0
3.0
0.68
0.62
0.67
15 20 15
1.5
1.5
1.5
mA
mA
mA
V
dV/dt 15 40 - V/s
di/dt - - 10 A/s
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2
Symbol Parameter
V I
DRM
V I
RRM
V I
H
DRM
RRM
TM
Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current
Maximum On State Voltage Holding Current
MAC12SM, MAC12SN
Voltage Current Characteristic of Triacs
(Bidirectional Device)
on state
at V
I
RRM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
RRM
Quadrant 3 MainTerminal 2 -
V
TM
+ Current
I
H
V
I
H
off state
TM
Quadrant 1 MainTerminal 2 +
+ Voltage
I
at V
DRM
DRM
(+) I
GATE
(+) I
GATE
(+) MT2
GT
MT1
REF
(-) MT2
GT
MT1
REF
(+) MT2
Quadrant II Quadrant I
(-) I
GT
GATE
MT1
REF
I
- + I
GT
(-) MT2
Quadrant III Quadrant IV
(-) I
GT
GATE
MT1
REF
-
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1. With in-phase signals (using standard AC lines) quadrants I and III are used.
GT
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3
MAC12SM, MAC12SN
100
10
Q3
Q1
1
, GATE TRIGGER CURRENT (mA)
GT
I
0.1
- 40 - 10 20 50 80 110
- 25 5 35 65 95
Q2
TJ, JUNCTION TEMPERATURE (°C)
Figure 1. Typical Gate Trigger Current
versus Junction T emperature
100
10
Q2
Q1
0.90 Q1
0.85
0.80
Q3
0.75 Q2
0.70
0.65
0.60
0.55
0.50
, GATE TRIGGER VOLTAGE (VOLTS)
GT
0.45
V
0.40
- 40 - 10 20 50 80 110- 25 5 35 65 95 TJ, JUNCTION TEMPERATURE (°C)
Figure 2. Typical Gate Trigger Voltage
versus Junction T emperature
100
10
Q3
1
, LATCHING CURRENT (mA)
L
I
0.1
- 40 - 10 20 50 80 110- 25 5 35 65 95 - 40 - 10 20 50 80 110- 25 5 35 65 95 TJ, JUNCTION TEMPERATURE (°C)
Figure 3. Typical Latching Current
versus Junction T emperature
110
100
30°, 60°
90
90°
80
70
, CASE TEMPERATURE ( C)°
C
T
I
, RMS ON-STATE CURRENT (AMPS)
T(RMS)
180°
DC
86420
1210
Figure 5. Typical RMS Current Derating
1
, HOLDING CURRENT (mA)
H
I
0.1
25
20
15
10
, AVERAGE POWER DISSIPATION (WATTS)
(AV)
P
TJ, JUNCTION TEMPERATURE (°C)
Figure 4. Typical Holding Current
versus Junction T emperature
60°
5
060
I
, AVERAGE ON-STATE CURRENT (AMPS)
T(AV)
Figure 6. On-State Power Dissipation
MT2 Positive
MT2 Negative
180°
120°
90°
DC
30°
104
128620
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4
MAC12SM, MAC12SN
100
10
1
, INSTANTANEOUS ON-STATE CURRENT (AMPS)
T
I
0.1
0.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
Typical @ TJ = 25°C
Maximum @ TJ = 110°C
Maximum @ TJ = 25°C
1.5 2.5 3.5 4.5
Figure 7. Typical On-State Characteristics
1
0.1
(NORMALIZED)
0.01
r(t), TRANSIENT THERMAL RESISTANCE
1000010001001010.1
t, TIME (ms)
Figure 8. T ypical Thermal Response
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5
MAC12SM, MAC12SN
PACKAGE DIMENSIONS
TO-220AB
CASE 221A-09
ISSUE AA
SEATING
-T-
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 −−− 1.15 −−− Z −−− 0.080 −−− 2.04
STYLE 4:
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
4. MAIN TERMINAL 2
MILLIMETERSINCHES
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MAC12SM/D
6
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