ON Semiconductor MAC12HCD, MAC12HCM, MAC12HCN Technical data

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MAC12HCD, MAC12HCM, MAC12HCN
Preferred Device
Triacs
Designed primarily for full-wave ac control applications, such as motor controls, heating controls or dimmers; or wherever full–wave, silicon gate–controlled devices are needed.
Uniform Gate Trigger Currents in Three Quadrants, Q1, Q2, and Q3
High Commutating di/dt and High Immunity to dv/dt @ 125°C
Minimizes Snubber Networks for Protection
Blocking Voltage to 800 Volts
On-State Current Rating of 12 Amperes RMS at 80°C
High Surge Current Capability – 100 Amperes
Industry Standard TO-220AB Package for Ease of Design
Glass Passivated Junctions for Reliability and Uniformity
Device Marking: Logo, Device T ype, e.g., MAC12HCD, Date Code
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TRIACS
12 AMPERES RMS
400 thru 800 VOLTS
MT2
MT1
G
MAXIMUM RATINGS (T
Rating Symbol Value Unit
Peak Repetitive Off-State Voltage
(TJ = –40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open)
On-State RMS Current
(All Conduction Angles; T
Peak Non-Repetitive Surge Current
(One Full Cycle, 60 Hz, T
Circuit Fusing Consideration
(t = 8.33 ms)
Peak Gate Power
(Pulse Width ≤ 1.0 µs, T
Average Gate Power
(t = 8.3 ms, T
Operating Junction Temperature Range T
Storage Temperature Range T
(1) V
and V
DRM
voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.
= 80°C)
C
for all types can be applied on a continuous basis. Blocking
RRM
= 25°C unless otherwise noted)
J
(1)
MAC12HCD MAC12HCM MAC12HCN
= 80°C)
C
= 125°C)
J
= 80°C)
C
V
DRM,
V
RRM
I
T(RMS)
I
TSM
I2t 41 A2sec
P
GM
P
G(AV)
J
stg
400 600 800
12 A
100 A
16 Watts
0.35 Watts
–40 to
+125
–40 to
+150
Volts
°C
°C
4
1
2
3
TO–220AB
CASE 221A
STYLE 4
PIN ASSIGNMENT
1 2 3 Gate 4
Main Terminal 1 Main Terminal 2
Main Terminal 2
ORDERING INFORMATION
Device Package Shipping
MAC12HCD TO220AB 50 Units/Rail MAC12HCM TO220AB MAC12HCN TO220AB
50 Units/Rail 50 Units/Rail
Semiconductor Components Industries, LLC, 2001
November, 2001 – Rev. 2
Preferred devices are recommended choices for future use
and best overall value.
1 Publication Order Number:
MAC12HC/D
MAC12HCD, MAC12HCM, MAC12HCN
THERMAL CHARACTERISTICS
Characteristic Symbol Value Unit
Thermal Resistance
— Junction to Case — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds T
R
θ
JC
R
θ
JA L
2.2
62.5 260 °C
°C/W
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted; Electricals apply in both directions)
J
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Peak Repetitive Blocking Current
(V
= Rated V
D
DRM
, V
, Gate Open) TJ = 25°C
RRM
ON CHARACTERISTICS
Peak On-State Voltage
(ITM = ±17 A)
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 Ω)
MT2(+), G(+) MT2(+), G(–) MT2(–), G(–)
Holding Current
(V
= 12 V, Gate Open, Initiating Current = ±150 mA)
D
Latch Current (VD = 12 V, IG = 50 mA)
MT2(+), G(+) MT2(+), G(–) MT2(–), G(–)
Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 Ω)
MT2(+), G(+) MT2(+), G(–) MT2(–), G(–)
(1)
DYNAMIC CHARACTERISTICS
Rate of Change of Commutating Current
(V
= 400 V, ITM = 4.4 A, Commutating dv/dt = 18 V/µs, Gate Open, T
D
= 125°C, f = 250 Hz, CL = 10 µF, LL = 40 mH, with Snubber)
Critical Rate of Rise of Off-State Voltage
(V
= Rated V
D
Gate Open, T
Repetitive Critical Rate of Rise of On-State Current
IPK = 50 A; PW = 40 µsec; diG/dt = 200 mA/µsec; f = 60 Hz
(1) Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
, Exponential Waveform,
DRM
= 125°C)
J
T
= 125°C
J
I
,
DRM
I
RRM
V
TM
— —
— —
0.01
2.0
1.85
I
GT
I
H
10 10 10
— — —
50 50 50
60
I
L
V
GT
(di/dt)
J
c
— — —
0.5
0.5
0.5
— — —
— — —
60 80 60
1.5
1.5
1.5
15 A/ms
dv/dt 600 V/µs
di/dt 10 A/µs
mA
V
mA
mA
mA
V
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2
Symbol Parameter
V I
DRM
V I
RRM
V I
H
DRM
RRM
TM
Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current
Maximum On State Voltage Holding Current
MAC12HCD, MAC12HCM, MAC12HCN
Voltage Current Characteristic of Triacs
(Bidirectional Device)
+ Current
on state
at V
I
RRM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
RRM
Quadrant 3 MainTerminal 2 –
I
H
V
TM
V
I
H
off state
TM
Quadrant 1 MainTerminal 2 +
+ Voltage
I
at V
DRM
DRM
(+) MT2
Quadrant II Quadrant I
(–) I
GT
GATE
MT1
REF
I
+ I
GT
(–) MT2
Quadrant III Quadrant IV
(–) I
GT
GATE
MT1
REF
(+) I
GATE
(+) I
GATE
(+) MT2
GT
MT1
REF
(–) MT2
GT
MT1
REF
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1. With in–phase signals (using standard AC lines) quadrants I and III are used.
GT
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MAC12HCD, MAC12HCM, MAC12HCN
100
Q3
Q2
Q1
10
, GATE TRIGGER CURRENT (mA)
GT
I
1
-40 -10 20 50 80 110 125
-25 5 35 65 95 T
, JUNCTION TEMPERATURE (°C)
J
Figure 1. Typical Gate Trigger Current
versus Junction T emperature
100
MT2 NEGATIVE
MT2 POSITIVE
10
1.20
1.10
1.00
0.90
0.80
0.70
0.60
, GATE TRIGGER VOLTAGE (VOLT)
GT
0.50
V
0.40
Q3
Q1
Q2
-40 -10 20 50 80 110 125-25 5 35 65 95 T
, JUNCTION TEMPERATURE (°C)
J
Figure 2. Typical Gate Trigger Voltage
versus Junction T emperature
100
Q2 Q3
Q1
10
HOLDING CURRENT (mA)
1
-40 -10 20 50 80 110 125-25 5 35 65 95 -40 -10 20 50 80 110 125-25 5 35 65 95 T
, JUNCTION TEMPERATURE (°C)
J
Figure 3. Typical Holding Current
versus Junction T emperature
125
110
95
, CASE TEMPERATURE ( C)°
80
C
T
65
I
, RMS ONSTATE CURRENT (AMP)
T(RMS)
120°, 90°, 60°, 30°
180°
DC
121086420
Figure 5. Typical RMS Current Derating
LATCHING CURRENT (mA)
, AVERAGE POWER DISSIPATION (WATTS)
(AV)
P
1
T
, JUNCTION TEMPERATURE (°C)
J
Figure 4. Typical Latching Current
versus Junction T emperature
20
18
16
14
12
10
8
6
4
2
0
I
, AVERAGE ONSTATE CURRENT (AMP)
T(AV)
Figure 6. On-State Power Dissipation
DC
180°
120°
90°
60°
30°
121086420
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4
MAC12HCD, MAC12HCM, MAC12HCN
100
10
1
, INSTANTANEOUS ONSTATE CURRENT (AMP)
T
I
0.1
TYPICAL @ T
= 25°C
J
MAXIMUM @ T
0
0.5 1 1.5 2 2.5 3 3.5 5 VT, INSTANTANEOUS ONSTATE VOLTAGE (VOLTS)
MAXIMUM @ T
= 25°C
J
J
4 4.5
Figure 7. Typical On-State Characteristics
= 125°C
1
0.1
(NORMALIZED)
r(t), TRANSIENT THERMAL RESISTANCE
0.01
1000010001001010.1
t, TIME (ms)
Figure 8. T ypical Thermal Response
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MAC12HCD, MAC12HCM, MAC12HCN
PACKAGE DIMENSIONS
TO–220
CASE 221A–09
ISSUE AA
SEATING
–T–
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93
J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 --- 1.15 --- Z --- 0.080 --- 2.04
STYLE 4:
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
4. MAIN TERMINAL 2
MILLIMETERSINCHES
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Notes
MAC12HCD, MAC12HCM, MAC12HCN
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7
MAC12HCD, MAC12HCM, MAC12HCN
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MAC12HC/D
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