This LSI is Closed−Auto Focus control LSI equipped with hall
sensor. It consists of 1 system of feedback circuit and constant current
driver. It has also a built−in EEPROM and temperature sensor.
Features
• Built−in Equalizer Circuit Using Digital Operation
♦ AF Control Equalizer Circuit
♦ Any Coefficient can be Specified by 2−wire Serial I/F (TWIF)
• 2−wire Serial Interface (The communication protocol is compatible
with I2C)
• Built−in A/D Converter
• Built−in D/A Converter
♦ Hall Offset
♦ Constant Current Bias
• Built−in Hall Sensor
♦ Si Hall Sensor
• Built−in EEPROM
♦ 64byte (16byte/page)
• Built−in OSC
• Built−in Constant Current Driver
♦ 110 mA
• Package
♦ WL−CSP 6−pin (2 x 3pin) , Thickness Max 0.29 mm, with
Backside Coat
♦ Lead−free, Halogen−free
• Supply voltage
♦ V
(2.6 V to 3.3 V)
DD
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WLCSP
6 BUMP
CASE 567UK
DEVICE MARKING INFORMATION
8229
YMZZ
8229= Specific Device Code
Y= Year
M= Month
ZZ = Assembly Lot
PIN TYPE “O” – Ensure that it is set to OPEN.
PIN TYPE “I” – OPEN is inhibited. Ensure that it is
connected to the VDD or VSS even when it is unused.
(Please contact ON Semiconductor for more information
about selection of VDD or VSS.)
PIN TYPE “B” – If you are unsure about processing method
on the pin description of pin layout table, please contact us.
Note that incorrect processing of unused pins may result
in defects.
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2
LC898229XI
Table 1. ABSOLUTE MAXIMUM RATING (VSS = 0 V)
Item
Supply voltageVDD33 maxTa ≤ 25°C
Input/output voltageVI33, VO33Ta ≤ 25°C
Storage ambient temperatureTstg
Operating ambient temperatureTopr
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 2. ACCEPTABLE OPERATION RANGE at Ta = −30 ~ 70°C, VSS = 0 V
ItemSymbolMinTypMaxUnit
Supply voltageVDD332.62.83.3V
Input voltage rangeV
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 3. DC CHARACTERISTICS: Input/output level at VSS = 0 V, VDD = 2.6 V ~ 3.3V, Ta = −30 ~ 70°C
ItemSymbolConditionMinTypMaxUnitApplicable Pins
High−level input voltageV
Low−level input voltageV
Low−level output voltageV
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
IH
IL
OL
CMOS compliant
IOL= 2mA
SymbolConditionRatingUnit
−0.3~4.6
−0.3~VDD33+0.3
−55~125
−30~70
IN
Schmidt
0VDD33V
1.4V
0.4V
0.2
VSDA
V
V
°C
°C
SCL, SDA
Table 4. DRIVER OUTPUT (OUT1, OUT2) at VSS = 0 V, VDD = 2.8 V, Ta = 25°C
NOTE: Consider capacitance of capacitor between VDD and VSS. According to power source environment, attach an additional capacitor
in camera module.
Figure 2. Hall Element Position
NOTE: Please refer to package diagram for each dimension.
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unit: mm(typ)
4
VDD Supply Timing
VDD
VSS
LC898229XI
AC Characteristics
t2
t3
t1
Vbot
SCL/SDA
Figure 3. VDD Supply Timing
It is available to use 2−wire serial interface 5ms later for Power On Reset of VDD.
ItemSymbolMinTypMaxUnit
VDD turn on timet13ms
2−wire serial interface start time from VDD ont25ms
VDD off timet3
Bottom VoltageVbot0.1V
100
ms
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5
LC898229XI
AC Specification
Figure 4 shows interface timing definition and Table 6 shows electric characteristics.
VIHmin
SDA
SCL
VILmax
tf
tLOW
tHD,STAtSU,STAtSU,DATtHD,DAT
VIHmin
VILmax
tBUF
tr
tSU,STO
Stop
Condition
Start
Condition
Start
Condition
trtftHD,STA
Repeated
Condition
Figure 4. 2−wire Serial Interface Timing Definition
Table 6. ELECTRIC CHARACTERISTICS for 2−wire Serial Interface (AC Characteristics)
Fast−modeFast−mode Plus
ItemSymbolPin Name
SCL clock frequencyFSCLSCL400
START condition hold timetHD, STASCL, SDA0.60.26
SCL clock Low periodt
SCL clock High periodt
Setup time for repetition
LOW
HIGH
tSU, STASCL, SDA0.60.26
SCL1.30.5
SCL0.60.26
START condition
Data hold timetHD, DATSCL, SDA0 (Note 1)0.90 (Note 1)
Data setup timetSU, DATSCL, SDA100
SDA, SCL rising timet
SDA, SCL falling timet
r
f
SCL, SDA300
SCL, SDA300
STOP condition setup timetSU, STOSCL, SDA0.60.26
Bus free time between STOP
and START
t
BUF
SCL, SDA1.30.5
1. This LSI is designed for a condition with typ. 20ns of hold time. If SDA signal is unstable around falling point of SCL signal, please implement
an appropriate treatment on board, such as inserting a resistor.
MinTypMaxMinTypMax
1000
50
120
120
Units
KHz
ms
ms
ms
ms
ms
ns
ns
ns
ms
ms
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SCALE 4:1
PIN A1
REFERENCE
0.05 C
0.03 C
E
TOP VIEW
DETAIL A
SIDE VIEW
e
B
A
123
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
1
A
A
A
C
e
6X
0.03
PACKAGE
OUTLINE
B
D
SEATING
PLANE
b
C
0.40
PITCH
WLCSP6 0.86x1.70x0.265
CASE 567UK
ISSUE A
BACKSIDE
COATING
A1
DETAIL A
A0.05BC
DATE 22 MAY 2017
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DATUM C, THE SEATING PLANE, IS DEFINED BY
THE SPHERICAL CROWNS OF CONTACT BALLS.
4. COPLANARITY APPLIES TO SPHERICAL CROWNS
OF CONTACT BALLS.
5. DIMENSION b IS MEASURED AT THE MAXIMUM
CONTACT BALL DIAMETER PARALLEL TO DATUM C.
A3
MILLIMETERS
DIMAMINNOM
0.24
A10.04 REF
A3
b0.120.17
D
E1.651.70
e0.40 BSC
0.265
0.025 REF
0.810.86
MAX
0.29
0.22
0.91
1.75
GENERIC
MARKING DIAGRAM*
XXXX
ALYW
A= Assembly Location
L= Wafer Lot
Y= Year
W= Work Week
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
6X
0.40
PITCH
DIMENSIONS: MILLIMETERS
0.17
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
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