28 V / 5 A Rated OVP with
Low On-resistance and
Integrated TVS
FPF3381
Description
FPF3381UCX is an OVP with integrated ultra−low on−resistance
single channel switch. The device contains an N−MOSFET that can
operate over an input voltage range of 2.8 V to 23 V and can support
a maximum continuous current of 5 A.
When the input voltage exceeds the over−voltage threshold,
the internal FET is turned off immediately to prevent damage
to the protected downstream components.
The device has integrated ±110 V surge protection TVS base
on IEC61000−4−5 standards.
FPF3381 is available in a small 12−bumps WLCSP package
and operate over the free−air temperature range of −40°C to +85°C.
Features
• Over−voltage Protection Up to +28 V
• Integrated TVS: ±110 V for IEC61000−4−5
• Internal Low RDS(on) NMOS Transistors: Typical 15 mW
• Programmable Over−voltage Lockout (OVLO)
♦ Externally Adjustable via OVLO Pin
• Active−low Enable Pin (OVLO) for Device
• Super−fast OVLO Response Time: Typical 40 ns
• Over Temperature Protection (Thermal Shutdown)
• Robust ESD Performance
♦ ±4 kV Human Body Model (HBM)
♦ ±2 kV Charged Device Model (CDM)
• System Level ESD (IEC61000−4−2)
♦ ±10 kV Contact Discharge
♦ ±15 kV Air Gap Discharge
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WLCSP−12
CASE 567WP
MARKING DIAGRAM
3RZZ
YWA
3R = Specific Device Code
ZZ = Assembly Lot Code
Y = Year
W = Work Week
A = Assembly Location
(Note: Microdot may be in either location)
PIN ASSIGNMENT
ENB
OUT
OUT
GND
Typical Applications
• Mobile Phones
• PDAs
• GPS
© Semiconductor Components Industries, LLC, 2021
March, 2021 − Rev. 0
ACOKB
OVLO
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
1 Publication Order Number:
OUT
IN
(Top View)
IN
IN
GND
GND
FPF3381/D
FPF3381
Travel
Adapter
Legacy USB /
USB Type C connector
IN
VBUS
IN
1uF
OUT
FPF3381
R1
OVLO
R2
Figure 1. Application Schematic – Adjustable Option
Discharge
GND
Driver
Gate Drive
HV Battery
Charger
1uF
OUT
1.2 V
OVLO
0.2 V
GND
Control
ENB
ACOKB
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin # Name Description
B3, C2, C3 IN Power Input: Switch Input and Device Supply
A2, A3, B2 OUT Power Output: Switch Output to Load
A1 ENB
B1 ACOKB Power Good Acknowledge Output: Open−drain output to indicate Power Good condition
C1 OVLO OVLO Input: Over Voltage Lockout Adjustment Input
A4, B4, C4 GND Ground
Enable Input: Active Low. 0: Switch enabled. 1: Switch disabled. 1 MW Pull−down resistor integrated.
ORDERING INFORMATION
Device Marking Package Shipping
FPF3381UCX 3R WLCSP−12L 4000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
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2
FPF3381
Table 1. MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage Range (Note 1) V
Output Voltage Range V
Adjustable Input Range V
Internal FET Continuous Current I
Internal FET Peak Current (pulse width no longer than 100 ms)
Maximum Junction Temperature T
Storage Temperature Range T
ESD Capability, Human Body Model (Note 2) ESD
ESD Capability, Charged Device Model (Note 2) ESD
IEC 61000−4−2 SYSTEM Level ESD
in
out
OVLO
OUT
I
PEAK
J(max)
STG
HBM
CDM
Contact 10
Air Gap 15
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
T
SLD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS
, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101)
Latch−up Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
−0.3 to +28 V
−0.3 to (Vin + 0.3) V
−0.3 to +24 V
0 to 6.25 A
7 A
150 °C
−65 to 150 °C
4
2
260 °C
kV
Table 2. THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, WLCSP−12 (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
R
θJA
84.1 °C/W
4. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
5. Values based on 2S2P JEDEC std. PCB.
Table 3. RECOMMENDED OPERATING RANGES
Rating Symbol Min Max Unit
Supply Voltage on VIN V
I/O pins V
Output Current (Note 6) I
IN Capacitor C
OUT Capacitor C
Ambient Temperature T
in
OVLO
out
in
out
A
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Life time, under maximum current, > 5 years base on Temperature < 85°C and no longer than 12 hours per day.
2.8 25 V
0 5.5 V
0 5 A
0.1
0.1
mF
mF
−40 85 °C
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3
FPF3381
Table 4. ELECTRICAL CHARACTERISTICS V
= 5.0 V, IIN v 3 A, CIN = 0.1 mF, TA = 25°C, for min/max values TA = −40°C to 85°C; unless otherwise noted.
V
IN
Parameter
= 2.8 to 23 V, CIN = 0.1 mF, C
IN
= 0.1 mF, TA = −40 to 85°C; For typical values
OUT
Test Conditions Symbol Min Typ Max Unit
LEAKAGE AND QUIESCENT CURRENTS
Input Quiescent Current on IN
VIN = 5 V, V
VIN = 23 V, V
Supply Current during Over Voltage VIN = 23 V, V
OVLO Input Leakage Current V
OVLO
= V
OVLO_TH
OVLO
OVLO
OVLO
= 0.6 V, V
= 0.6 V, V
= 1.8 V, V
= 0 V
ENB
= 0 V 150
ENB
= V
OUT
= 0 V I
ENB
I
IN_Q
I
OVLO
Q
90 mA
150
−100 100 nA
mA
OVER VOLTAGE AND UNDER VOLTAGE LOCKOUT, I/O
Input Clamping Voltage
IIN = 10 mA
V
IN_CLAMP
32
V
IIN = 30A (Note 7) 37
Under−Voltage Rising Trip Level for VIN VIN rising, TA = −40 to 85°C V
Under−Voltage Falling Trip Level for VIN VIN falling, TA = −40 to 85°C V
Default Over−Voltage Trip Level VIN rising, V
OVLO Set Threshold V
= 1.1 V to 1.3 V, the voltage of OVLO pin
OVLO
to trigger Over Voltage condition
= GND V
OVLO
OVLO Threshold Hysteresis V
OVLO Input Threshold Voltage
Voltage Increasing, Logic High
Voltage Decreasing, Logic Low
High
Low
ENB Input Threshold Voltage
Voltage Increasing, Logic High
Voltage Decreasing, Logic Low
Output Low Voltage of ACOKB I
ACOKB Leakage Current V
High
Low
= 1 mA, Logic Low Asserted V
ACOKB
= 3.3 V, ACOKB De−asserted, V
I/O
ENB
= 0 V I
IN_UV_R
IN_UV_F
IN_OVLO
V
OVLO_TH
HYS_OVLO
V
IH_OVLO
V
IL_OVLO
V
IH_ENB
V
IL_ENB
OL
ACOKB
2.4 2.55 2.7 V
2.45 V
13.5 14.0 14.5 V
1.165 1.20 1.235 V
3 %
V
0.2
0.1
V
0.9
0.3
0.4 V
−0.5 0.5 uA
RESISTANCE
On−resistance of Power FET
VIN = 5 V, I
= 200 mA, TA = 25°C
OUT
VIN = 5 V to 23 V, I
= 0.1 A to 5 A (Note 10) 25
OUT
Pull−down Resistor on ENB 1
Discharge on IN VIN = 5 V, V
= 1.8 V 800
ENB
r
ON
15 20 mW
MW
W
TIMING
De−bounce Time of Power FET
Turned On
Soft−Start Time of Power FET
Turned On
Switch Turn−On Rising Time (Note 10)
Switch Turn−Off Time (Note 10)
Time from 2.5 V < VIN < V
V
= 0.1 × V
OUT
IN
Time from 2.5 V < VIN < V
0.2 × V
I/O
with V
= 1.8 V and RPU = 10 kW
I/O
VIN = 5 V, RL = 100 W, CL = 22 mF, V
0.1 × V
to 0.9 × V
IN
IN
IN_OVLO
IN_OVLO
to
to V
OUT
RL = 10 W, CL = 0 mF, time from VIN > V
V
= 0.9 × VIN (Note 11)
OUT
time from V
ENB
> V
IH_ENB
to V
OUT
= 0.9 × V
AOCKB
from
OVLO
to
IN
t
SW_DEB
=
t
SS
t
R
t
OVP
t
OFF
15 ms
30 ms
2 ms
40 ns
2
ms
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 10)
Thermal Shutdown Hysteresis (Note 10) T
T
SD
SH
− 130 − °C
− 20 − °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. The spec is only for surge event. Guaranteed by design and characterization.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Refer to the APPLICATION INFORMATION
section.
= TA = 25°C. Low
J
10.Values based on design and/or characterization.
11.Depends on the capacitance on OVLO pin.
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4
FPF3381
FUNCTION DESCRIPTION
General
FPF3381 is an OVP power switch to protect next stage
system which is optimized to lower voltage working
condition. The device includes ultra−low on−resistance
power FET (15 mW) and internal TVS for surge event
protection base on IEC61000−4−5. The super−fast OVP
response time is only 40 ns for default OVP condition.
Power MOSFET
The FPF3381 integrates an N−type MOSFET with 15 mW
resistance. The power FET can work under 2.8 V ~ 25 V and
up to 5 A DC current capability.
Power Supply
The FPF3381 is supplied by IN.
IN will be firstly supplied by OUT when the device is
working under USB On−The−Go (OTG) condition.
Enable Control
FPF3381 has an active low enable pin ENB. When ENB
pin is connected to a high level, the internal FET will be
turned off. When ENB pin is connected to low level, the FET
will be turned on as long as V
is not higher than
IN
Over−Voltage threshold.
Under Voltage Lockout
FPF3381 power switch will be turned off when
the voltage on IN is lower than the UVLO threshold
V
IN_UV_F
.
Whenever VIN voltage ramps up to higher than
V
IN_UV_R
after t
, the power FET will be turned on automatically
de−bounce time if there is no OV or OT condition.
DEB
Over Voltage Lockout
The power FET will be turned off whenever IN voltage
higher than V
IN_OVLO
external resistor ladder or just be default value V
When V
OVLO
decided by default value. When V
V
IH_OVLO
> V
, the power switch will be turned off once V
OVLO_TH
. The external resistor ladder can be decided
. The value of V
is smaller than V
IN_OVLO
IL_OVLO
OVLO
can be set by
IN_OVLO
, V
OVLO
will be
is larger than
OVLO
according to the following equation:
V
IN_OVLO
+ V
OVLO_TH
ǒ1 ) R1ńR2
Ǔ
(eq. 1)
where R1 and R2 are the resistors in Figure 1.
Power OK indicator
FPF3381 has an Open−Drain output ACOKB. By
implement connection to external supply through a resistor,
ACOKB can indicate the status on IN (or VBUS). When
VIN is between V
IN_UV_R
and V
IN_OVLO
more than 30 ms,
ACOKB will be pulled down to ground. If the input voltage
is out of this range, ACOKB will present as a floating node
and the voltage will be pulled high by external power supply.
Thermal Shutdown
When the device is in the switch mode, to protect
the device from over temperature, the power switch will be
turned off when the junction temperature exceeds T
SD
The switch will be turned on again when temperature drop
below T
− TSH.
SD
.
.
APPLICATIONS INFORMATION
Input Decoupling (Cin)
A ceramic or tantalum at least 0.1 mF capacitor is
recommended and should be connected close to
the FPF338x package. Higher capacitance and lower ESR
will improve the overall line and load transient response.
Output Decoupling (C
out
)
The FPF3381 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for
the output capacitor. The minimum output decoupling value
is 0.1 mF and can be augmented to fulfill stringent load
transient requirements.
Thermal Considerations
As power in the FPF3381 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the FPF3381 has good thermal conductivity through
the PCB, the junction temperature will be relatively low
with high power applications. The maximum dissipation
the FPF3381 can handle is given by:
P
D(MAX)
+
ƪ
T
J(MAX)
R
qJA
* T
ƫ
A
(eq. 2)
Since TJ is not recommended to exceed 125°C, then
the FPF3381 soldered on 645 mm
the ambient temperature (T
A
2
, 1 oz copper area, and
) is 25°C. The power dissipated
by the FPF3381 can be calculated from the following
equations:
2
Hints
Vin and V
PD[ Vin@ǒIQ@I
printed circuit board traces should be as wide
out
out
Ǔ
) I
out
@ r
ON
(eq. 3)
as possible. Place external components, especially the input
capacitor and TVS, as close as possible to the FPF3381, and
make traces as short as possible.
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WLCSP12 1.828x1.288x0.574
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
CASE 567WP
ISSUE O
DATE 25 JUN 201
DOCUMENT NUMBER:
DESCRIPTION:
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