ON Semiconductor FDG6301N User Manual

Digital FET, Dual N-Channel

FDG6301N

General Description

These dual N−Channel logic level enhancement mode field effect
transistors are produced using ON Semiconductor’s proprietary, high
cell density, DMOS technology. This very high density process is
especially tailored to minimize on−state resistance. This device has
been designed especially for low voltage applications as a replacement
for bipolar digital transistors and small signal MOSFETs.

Features

• 25 V, 0.22 A Continuous, 0.65 A Peak

♦ R
♦ R

• Very Low Level Gate Drive Requirements Allowing Direct

Operation in 3 V Circuits (V

• Gate−Source Zener for ESD Ruggedness (>6 kV Human Body

Model)

• Compact Industry Standard SC70−6 Surface Mount Package

• These Devices are Pb−Free and are RoHS Compliant

ABSOLUTE MAXIMUM RATINGS (T

Symbol Parameter FDG6301N Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

ESD Electrostatic Discharge Rating

Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.

= 4 W @ VGS = 4.5 V

DS(ON)

= 5 W @ VGS = 2.7 V

DS(ON)

< 1.5 V)

GS(th)

= 25°C unless otherwise noted)

A

Drain−Source Voltage 25 V

Gate−Source Voltage 8 V

Drain/Output Current

Maximum Power Dissipation (Note 1) 0.3 W

Operating and Storage Temperature
Range

MIL−STD−883D
Human Body Model (100 pF / 1500 W)

Continuous 0.22

Pulsed 0.65

−55 to +150 °C

6.0 kV

A

www.onsemi.com

G2

G2

D1

D2

G1

S1

SC−88/SC70−6/SOT−363

CASE 419B−02

MARKING DIAGRAM

01M

01 = Specific Device Code
M = Assembly Operation Month

PIN CONNECTIONS

1 or 4*

2 or 5

3 or 6

*The pinouts are symmetrical; pin 1 and 4 are

interchangeable.
Units inside the carrier can be of either orientation
and will not affect the functionality of the device.

6 or 3

5 or 2

4 or 1*

© Semiconductor Components Industries, LLC, 1999

June, 2020 − Rev. 6

ORDERING INFORMATION

See detailed ordering and shipping information on page 5 of
this data sheet.

1 Publication Order Number:

FDG6301N/D

FDG6301N

THERMAL CHARACTERISTICS

Symbol Parameter Ratings Unit

R

q

1. R

q

JA

mounting surface of the drain pins. R
minimum pad mounting on FR−4 board in still air.

Thermal Resistance, Junction−to−Ambient (Note 1) 415

JA

is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder

is guaranteed by design while R

q

JC

is determined by the user’s board design. R

q

CA

= 415°C/W on

q

JA

_C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Unit

OFF CHARACTERISTICS

DBV

BV

DSS

I

DSS

I

GSS

DSS

Drain−Source Breakdown Voltage

Breakdown Voltage Temperature

/ DT

J

Coefficient

Zero Gate Voltage Drain Current

VGS=0V, ID= 250 mA

ID= 250 mA, Referenced to 25_C

VDS=20V, VGS=0V − − 1

VDS=20V, VGS=0V, TJ = 55_C

Gate−Body Leakage Current VGS=8V, VDS=0V − − 100 nA

25 − − V

− 25 −

mV/_C

− − 10

mA

mA

ON CHARACTERISTICS (Note 2)

DV

V

GS(th)

GS(th)

R

DS(on)

Gate Threshold Voltage

Gate Threshold Voltage

/ DT

J

Temperature Coefficient

Static Drain−Source
On−Resistance

VDS=VGS, ID= 250 mA

ID= 250 mA, Referenced to 25_C

VGS= 4.5 V, ID= 0.22 A − 2.6 4 W

VGS= 4.5 V, ID= 0.22 A, TJ = 125_C

0.65 0.85 1.5 V

− −2.1 −

mV/_C

− 5.3 7

VGS= 2.7 V, ID= 0.19 A − 3.7 5

I

D(on)

g

FS

On−State Drain Current VGS= 4.5 V, VDS=5V 0.22 − − A

Forward Transconductance VDS=5V, ID= 0.22 A − 0.2 − S

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance

Output Capacitance − 6 − pF

Reverse Transfer Capacitance − 1.3 − pF

VDS=10V, VGS= 0 V, f = 1.0 MHz

− 9.5 − pF

SWITCHING CHARACTERISTICS (Note 2)

t

D(on)

t

t

D(off)

t

Q

Q

Q

Turn-On Delay Time

r

Turn-On Rise Time − 4.5 10 ns

Turn-Off Delay Time − 4 8 ns

f

g

gs

gd

Turn-Off Fall Time − 3.2 7 ns

Total Gate Charge

Gate−Source Charge − 0.12 − nC

Gate−Drain Charge − 0.03 − nC

VDD=5V, ID= 0.5 A,
V

GS

= 4.5 V, R

GEN

=50W

VDS=5V, ID= 0.22 A,
V

= 4.5 V

GS

− 5 10 ns

− 0.29 0.4 nC

DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

V

SD

Maximum Continuous Source Current − − 0.25 A

Drain−Source Diode Forward

VGS=0V, IS= 0.25 A (Note 2) − 0.8 1.2 V

Voltage

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%

www.onsemi.com

2

FDG6301N

TYPICAL PERFORMANCE CHARACTERISTICS

0.5

0.4

0.3

0.2

0.1

0

, DRAIN−SOURCE CURRENT (A)

D

I

V = 4.5 V

GS

3.5 V

3.0 V

2.7 V

2.5 V

012345

VDS, DRAIN−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with

1.8

I = 0.22 A

D

1.6

V = 4.5 V

GS

1.4

1.2

, NORMALIZED

1

0.8

DS(ON)

R

0.6

−50 −25 0 25 50 75 100 125 150

DRAIN−SOURCE ON−RESISTANCE

TJ, JUNCTION TEMPERATURE (°C)

Figure 3. On−Resistance Variation with

Temperature

2.0 V

5

4.5

4

3.5

, NORMALIZED

3

2.5

DS(ON)

R

2

0 0.1 0.2 0.3 0.4

V = 2.5 V

GS

2.7 V

3.0 V

DRAIN−SOURCE ON−RESISTANCE

Drain Current and Gate Voltage

20

W

16

12

8

, ON−RESISTANCE ( )

4

DS(ON)

0

R

12345

T

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 4. On−Resistance Variation with

Gate−to−Source Voltage

3.5 V

= 125°C

A

25°C

4.0 V

4.5 V

= 0.10 A

I

D

5.0 V

0.2
V

= 5 V

DS

0.15

0.1

0.05

, DRAIN CURRENT (A)

D

I

0

0.5 1 1.5 2 2.5 3

= −55°C

T

J

25 C

°

125

VGS, GATE TO SOURCE VOLTAGE (V)

°

C

0.4
V = 0 V

GS

0.1

T = 125°C

0.01

0.001

0.0001

, REVERSE DRAIN CURRENT (A)

0 0.2 0.4 0.6 0.8 1 1.2

S

I

J

25°C

-55°C

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature

www.onsemi.com

3