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FAN7529
Critical Conduction Mode PFC Controller
FAN7529 Critical Conduction Mode PFC Controller
April 2007
Features
Low Total Harmonic Distortion (THD)
Precise Adjustable Output Over-Voltage Protection
Open-Feedback Protection and Disable Function
Zero Current Detector
150µs Internal Start-up Timer
MOSFET Over-Current Protection
Under-Voltage Lockout with 3.5V Hysteresis
Low Start-up (40µA) and Operating Current (1.5mA)
Totem Pole Output with High State Clamp
+500/-800mA Peak Gate Drive Current
8-Pin DIP or 8-Pin SOP
Applications
Adapter
Ballast
LCD TV, CRT TV
SMPS
Related Application Notes
AN-6026 - Design of Power Factor Correction Circuit
Using FAN7529
Description
The FAN7529 is an active power factor correction (PFC)
controller for boost PFC applications that operates in critical conduction mode (CRM). It uses the voltage mode
PWM that compares an internal ramp signal with the
error amplifier output to generate MO SFET turn-off signal. Because the voltage-mode CRM PFC controller does
not need rectified AC line voltage inform ation, it saves the
power loss of the input voltage sensing netwo rk necessary for the current-mode CRM PFC controller.
FAN7529 provides many protection functions, such as
over-voltage protection, open-feedback protection, overcurrent protection, and under-voltage lockout protection.
The FAN7529 can be disabled if the INV pin voltage is
lower than 0.45V and the operating current decreases to
65µA. Using a new variable on-time control method,
THD is lower than the conventional CRM boost PFC ICs.
Ordering Information
Operating T emp.
Part Number
FAN7529N-40°C to +125°CYes8-DIPRailFAN7529
FAN7529M-40°C to +125°CYes8-SOPRailFAN7529
FAN7529MX-40°C to +125°CYes8-SOPTape & ReelFAN7529
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC
converter should be resistively divided to 2.5V.
This pin is the output of the transconductance error amplifier. Components for output
voltage compensation should be connected between this pin and GND.
This pin is used to set the slope of the internal ramp. The voltage of this pin is maintained at 2.9V . If a resistor is connected between this pin and GND, current flows out of
the pin and the slope of the internal ramp is proportional to this current.
This pin is the input of the over-current protection comparator. The MOSFET current is
sensed using a sensing resistor and the resulting voltage is appl ied to this pin. An
internal RC filter is included to filter switching noise.
This pin is the input of the zero current detection block. If the voltage of this pin goes
higher than 1.5V, then goes lower than 1.4V, the MOSFET is turned on.
This pin is used for the ground potential of all the pins. For proper operation, the signal
ground and the power ground should be separated.
This pin is the gate drive output. The peak sourcing and sinking current levels are
+500mA and -800mA respectively. For proper operation, the stray inductance in the
gate driving path must be minimized.
This pin is the IC supply pin. IC current and MOSFET drive current are supplied using
this pin.
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating cond itions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
SymbolParameterValueUnit
V
CC
, I
I
OH
I
clamp
I
det
V
IN
T
J
T
A
T
STG
V
ESD_HBM
V
ESD_MM
V
ESD_CDM
OL
Supply VoltageV
Peak Drive Output Current+500/-800mA
Driver Output Clamping Diodes VO>VCC or VO<-0.3V±10mA
Detector Clamping Diodes±10mA
Error Amplifier, MOT, CS Input Voltages-0.3 to 6V
Operating Junction Temperature150°C
Operating Temperature Range-40 to 125°C
Storage Temperature Range-65 to 150°C
ESD Capability, Human Body Model 2.0kV
ESD Capability, Machine Model 300V
ESD Capability, Charged Device Model 500V
= 25°C unless otherwise specified.
A
Z
V
FAN7529 Critical Conduction Mode PFC Controller
Thermal Impedance
(1)
SymbolParameterValueUnit
θ
JΑ
Thermal Resistance, Junction-to-Ambient
Note:
1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
VCC = 14V and TA = -40°C~125°C unless otherwise specified.
Symbol Parameter Condition Min.Typ.Max.Unit
ZERO CURRENT DETECT SECTION
(3)
(3)
(3)
(3)
1.351.501.65V
0.050.100.15V
= 3mA6.06.77.4V
det
= -3mA00.651.00V
det
= 1V ~ 5V-1.0-0.11.0µA
ZCD
TA = 25°C-10mA
TA = 25°C10mA
dV/dt = -1V/100ns,
from 5V to 0V
100200ns
Cl = 1nF50100ns
Cl = 1nF50100ns
V
th(ZCD)
HY
(ZCD)
V
clamp(H)
V
clamp(L)
I
b(ZCD)
I
source(zcd)
I
sink(zcd)
t
dead
Input Voltage Threshold
Detect Hysteresis
Input High Clamp VoltageI
Input Low Clamp VoltageI
Input Bias CurrentV
Source Current Capability
Sink Current Capability
Maximum Delay from ZCD to Output
Turn-on
(3)
OUTPUT SECTION
V
OH
V
OL
t
t
V
O(max)
V
O(UVLO)
r
f
Output Voltage HighIO = -100mA, TA = 25°C9.211.012.8V
Output Voltage LowIO = 200mA, TA = 25°C1.02.5V
Rising Time
Falling Time
(3)
(3)
Maximum Output VoltageVCC = 20V, IO = 100μA11.513.014.5V
Output Voltage with UVLO ActivatedVCC = 5V, IO = 100μA1V