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FAN7529
Critical Conduction Mode PFC Controller
FAN7529 Critical Conduction Mode PFC Controller
April 2007
Features
Low Total Harmonic Distortion (THD)Precise Adjustable Output Over-Voltage ProtectionOpen-Feedback Protection and Disable FunctionZero Current Detector150µs Internal Start-up Timer MOSFET Over-Current ProtectionUnder-Voltage Lockout with 3.5V HysteresisLow Start-up (40µA) and Operating Current (1.5mA)Totem Pole Output with High State Clamp+500/-800mA Peak Gate Drive Current8-Pin DIP or 8-Pin SOP
Applications
AdapterBallastLCD TV, CRT TVSMPS
Related Application Notes
AN-6026 - Design of Power Factor Correction Circuit
Using FAN7529
Description
The FAN7529 is an active power factor correction (PFC) controller for boost PFC applications that operates in crit­ical conduction mode (CRM). It uses the voltage mode PWM that compares an internal ramp signal with the error amplifier output to generate MO SFET turn-off sig­nal. Because the voltage-mode CRM PFC controller does not need rectified AC line voltage inform ation, it saves the power loss of the input voltage sensing netwo rk neces­sary for the current-mode CRM PFC controller.
FAN7529 provides many protection functions, such as over-voltage protection, open-feedback protection, over­current protection, and under-voltage lockout protection. The FAN7529 can be disabled if the INV pin voltage is lower than 0.45V and the operating current decreases to 65µA. Using a new variable on-time control method, THD is lower than the conventional CRM boost PFC ICs.
Ordering Information
Operating T emp.
Part Number
FAN7529N -40°C to +125°C Yes 8-DIP Rail FAN7529 FAN7529M -40°C to +125°C Yes 8-SOP Rail FAN7529
FAN7529MX -40°C to +125°C Yes 8-SOP Tape & Reel FAN7529
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2
Range Pb-Free Package Packing Method
Marking
Code
Typical Application Diagrams
AC
IN
Figure 1. Typical Boost PFC Application
FAN7529 Critical Conduction Mode PFC Controller
LD
N
V
AUX
R2
V
CC
AUX
R
ZCD
ZCD
FAN7529
INV
MOT
CS
COMP
R1
GND
V
O
C
O
FAN7529 Rev. 00
Internal Block Diagram
8
V
CC
8.5V
12V
5
ZCD
CS
MOT
4
3
2.9V
6.7V
40k
8pF
Ramp Signal
Saw Tooth
Generator
1.4V
0.8V
1.5V
Current Protection
Comparator
1V Offset
UVLO
Disable
Zero Current
Detector
2.5V Ref
Internal
Bias
Timer
S
R
Q
Error
Amplifier
1V~5V Range
V
ref1
Disable
Gm
OVP
V
ref1
V
CC
Drive
Output
2.675V
2.5V
0.45V 0.35V
7
OUT
1
INV
6
GND
2
COMP
FAN7529 Rev. 00
Figure 2. Functional Block Diagram of FAN7529
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2 2
Pin Assignments
FAN7529 Critical Conduction Mode PFC Controller
V
CC
OUT GND ZCD
6 58 7
YWW
FAN7529
1 2 3 4
COMP CSMOTINV
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin # Name Description
1INV
2COMP
3MOT
4CS
5ZCD
6GND
7OUT
8V
CC
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC converter should be resistively divided to 2.5V.
This pin is the output of the transconductance error amplifier. Components for output voltage compensation should be connected between this pin and GND.
This pin is used to set the slope of the internal ramp. The voltage of this pin is main­tained at 2.9V . If a resistor is connected between this pin and GND, current flows out of the pin and the slope of the internal ramp is proportional to this current.
This pin is the input of the over-current protection comparator. The MOSFET current is sensed using a sensing resistor and the resulting voltage is appl ied to this pin. An internal RC filter is included to filter switching noise.
This pin is the input of the zero current detection block. If the voltage of this pin goes higher than 1.5V, then goes lower than 1.4V, the MOSFET is turned on.
This pin is used for the ground potential of all the pins. For proper operation, the signal ground and the power ground should be separated.
This pin is the gate drive output. The peak sourcing and sinking current levels are +500mA and -800mA respectively. For proper operation, the stray inductance in the gate driving path must be minimized.
This pin is the IC supply pin. IC current and MOSFET drive current are supplied using this pin.
FAN7529 Rev. 00
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2 3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera­ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi­tion, extended exposure to stresses above the recommended operating cond itions may affect device reliability. The absolute maximum ratings are stress ratings only. T
Symbol Parameter Value Unit
V
CC
, I
I
OH
I
clamp
I
det
V
IN
T
J
T
A
T
STG
V
ESD_HBM
V
ESD_MM
V
ESD_CDM
OL
Supply Voltage V Peak Drive Output Current +500/-800 mA Driver Output Clamping Diodes VO>VCC or VO<-0.3V ±10 mA Detector Clamping Diodes ±10 mA Error Amplifier, MOT, CS Input Voltages -0.3 to 6 V Operating Junction Temperature 150 °C Operating Temperature Range -40 to 125 °C Storage Temperature Range -65 to 150 °C ESD Capability, Human Body Model 2.0 kV ESD Capability, Machine Model 300 V ESD Capability, Charged Device Model 500 V
= 25°C unless otherwise specified.
A
Z
V
FAN7529 Critical Conduction Mode PFC Controller
Thermal Impedance
(1)
Symbol Parameter Value Unit
θ
JΑ
Thermal Resistance, Junction-to-Ambient
Note:
1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2 4
8-DIP 110 °C/W
8-SOP 150 °C/W
FAN7529 Critical Conduction Mode PFC Controller
Electrical Characteristics
VCC = 14V and TA = -40°C~125°C unless otherwise specified.
Symbol Parameter Condition Min. Typ. Max. Unit
UNDER-VOLTAGE LOCKOUT SECTION
V
th(start)
V
th(stop)
HY
(uvlo)
V
SUPPLY CURRENT SECTION
I
I
CC
I
dcc
I
CC(dis)
ERROR AMPLIFIER SECTION
V
ref1
ΔV ΔV
I
b(ea)
I
source
I
sink
V
eao(H)
V
eao(Z)
g
MAXIMUM ON-TIME SECTION
V
mot
T
on(max)
CURRENT SENSE SECTION
V
CS(limit)
I
b(cs)
t
d(cs)
Start Threshold Voltage VCC increasing 1 1 12 13 V Stop Threshold V oltage VCC decreasing 7.5 8.5 9.5 V UVLO Hysteresis 3.0 3.5 4.0 V Zener Voltage ICC = 20mA 20 22 24 V
Z
Start-up Supply Current VCC = V
st
- 0.2V 40 70 µA
th(start)
Operating Supply Current Output no switching 1.5 3.0 mA Dynamic Operating Supply Current 50kHz, Cl=1nF 2.5 4.0 mA Operating Current at Disable V
= 0V 20 65 95 µA
inv
Voltage Feedback Input Threshold1 TA = 25°C 2.465 2.500 2.535 V Line Regulation VCC = 14V ~ 20V 0.1 10.0 mV
ref1
Temperature Stability of V
ref2
Input Bias Current V Output Source Current V Output Sink Current V Output Upper Clamp Voltage V
ref1
(2)
20 mV
= 1V ~ 4V -0.5 0.5 µA
inv
= V
inv inv inv
- 0.1V -12 µA
ref1
= V
+ 0.1V 12 µA
ref1
= V
- 0.1V 5.4 6.0 6.6 V
ref1
Zero Duty Cycle Output Voltage 0.9 1.0 1.1 V Transconductance
m
Maximum On-Time Voltage R Maximum On-Time Programming R
Current Sense Input Threshold Voltage Limit
(2)
90 115 140 µmho
= 40.5kΩ 2.784 2.900 3.016 V
mot
= 40.5kΩ, TA = 25°C192429µs
mot
0.7 0.8 0.9 V Input Bias Current VCS = 0V ~ 1V -1.0 -0.1 1.0 µA Current Sense Delay to Output
(2)
dV/dt = 1V/100ns, from 0V to 5V
350 500 ns
Note:
2. These parameters, although guaranteed by design, are not tested in production.
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2 5
FAN7529 Critical Conduction Mode PFC Controller
Electrical Characteristics (Continued)
VCC = 14V and TA = -40°C~125°C unless otherwise specified.
Symbol Parameter Condition Min. Typ. Max. Unit
ZERO CURRENT DETECT SECTION
(3)
(3)
(3)
(3)
1.35 1.50 1.65 V
0.05 0.10 0.15 V
= 3mA 6.0 6.7 7.4 V
det
= -3mA 0 0.65 1.00 V
det
= 1V ~ 5V -1.0 -0.1 1.0 µA
ZCD
TA = 25°C-10mA TA = 25°C10mA dV/dt = -1V/100ns,
from 5V to 0V
100 200 ns
Cl = 1nF 50 100 ns Cl = 1nF 50 100 ns
V
th(ZCD)
HY
(ZCD)
V
clamp(H)
V
clamp(L)
I
b(ZCD)
I
source(zcd)
I
sink(zcd)
t
dead
Input Voltage Threshold Detect Hysteresis Input High Clamp Voltage I Input Low Clamp Voltage I Input Bias Current V Source Current Capability Sink Current Capability Maximum Delay from ZCD to Output
Turn-on
(3)
OUTPUT SECTION
V
OH
V
OL
t
t
V
O(max)
V
O(UVLO)
r f
Output Voltage High IO = -100mA, TA = 25°C 9.2 11.0 12.8 V Output Voltage Low IO = 200mA, TA = 25°C1.02.5V Rising Time Falling Time
(3)
(3)
Maximum Output Voltage VCC = 20V, IO = 100μA 11.5 13.0 14.5 V Output Voltage with UVLO Activated VCC = 5V, IO = 100μA1V
RESTART TIMER SECTION
t
d(rst)
Restart Timer Delay 50 150 300 µs
OVER-VOLTAGE PROTECTION SECTION
OVP Threshold Voltage TA = 25°C 2.620 2.675 2.730 V OVP Hysteresis TA = 25°C 0.120 0.175 0.230 V
HY
V
ovp
(ovp)
ENABLE SECTION
V HY
th(en)
(en)
Enable Threshold Voltage 0.40 0.45 0.50 V Enable Hysteresis 0.05 0.10 0.15 V
Note:
3. These parameters, although guaranteed by design, are not tested in production.
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7529 Rev. 1.0.2 6
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