ON Semiconductor EVBUM2758/D User Manual
Digital Isolator
Evaluation Board
User's Manual
EVBUM2758/D
Description
The P9002EVB evaluation board is a convenient platform for
designers to evaluate, characterize and verify the performance of
ON Semiconductor’s digital isolator devices. The setup includes
a16−pin digital isolator sample in SOIC W package, mounted across
two isolated power and ground systems. All pins are individually
accessible through connection headers and test points.
This evaluation board is available in two options: P90022EVB with
mounted bi−directional dual−channel digital isolator NCID9211; and
P90024EVB with mounted bi−directional quad−channel digital
isolator NCID9411. The board can be reconfigured also to evaluate
other ON Semiconductor’s digital isolators with 2 to 4 channels in
SOIC16 W package.
P9002EVB is intended as a tool for quick validation of the datasheet
parameters of digital isolators. Refer to this manual for the board
contents and setup. Refer to the device datasheet for the operating
conditions and details of the electrical and switching characteristics.
Features
• Convenient Connection Headers for External Power Supplies and
Test Points for Measurement Probes
• Two Isolated Systems in Compact Board Layout
• Allows Bi−directional Digital Communication
• Selectable Jumper for Output Enable Function (Primary and
Secondary side)
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EVAL BOARD USER’S MANUAL
Figure 1. P9002EVB Evaluation Board
CAUTION: This evaluation board is not intended for
HIGH VOLTAGE tests. Do not use this board to verify
Insulation Ratings and Isolation Characteristics.
© Semiconductor Components Industries, LLC, 2020
March, 2021 − Rev. 1
1 Publication Order Number:
EVBUM2758/D
EVBUM2758/D
Digital Isolators
Digital isolators allow digital signals to communicate
between isolated systems without conducting ground loops
or hazardous voltages. The input digital data is modulated
with a high−frequency carrier signal and transmitted across
a capacitive isolation barrier. The barrier signal is detected
at the receiver side and demodulated to generate the output
digital data. The barrier utilizes ON Semiconductor’s
patented galvanic off−chip capacitor isolation technology.
With thick insulation distance of >0.5 mm, digital isolators
NCID9211 NCID9301 NCID9311
offers reliable high voltage insulation that meets UL and
VDE safety standards.
P9002EVB supports evaluation of digital isolators with 2
to 4 communication channels with output Enable. They are
available in dual−channel NCID9211; triple−channel
NCID9301 and NCID9311; and quad−channel NCID9401
and NCID9411. They are housed in 16−pin wide body small
outline package. The pinouts and channel configurations are
shown in Figure 2.
V
GND1
NC
EN1
V
V
NC
GND1
1
DD1
2
3
4
5
OA
6
INB
7
8
ISOLATION
16
15
14
13
12
11
10
9
V
DD2
GND2
NC
EN2
V
INA
V
OB
NC
GND2
V
GND1
V
V
V
NC
NC
GND1
1
DD1
2
3
INA
4
INB
5
INC
6
7
8
ISOLATION
16
15
14
13
12
11
10
9
V
DD2
GND2
V
OA
V
OB
V
OC
NC
EN2
GND2
V
GND1
V
V
V
NC
EN1
GND1
1
DD1
2
3
INA
4
INB
5
OC
6
7
8
ISOLATION
16
15
14
13
12
11
10
9
V
DD2
GND2
V
OA
V
OB
V
INC
NC
EN2
GND2
NCID9401 NCID9411
V
GND1
V
V
V
V
NC
GND1
1
DD1
2
3
INA
4
INB
5
INC
6
IND
7
8
ISOLATION
16
15
14
13
12
11
10
9
V
DD2
GND2
V
OA
V
OB
V
OC
V
OD
EN2
GND2
V
GND1
V
V
V
V
EN1
GND1
1
DD1
2
3
INA
4
INB
5
INC
6
OD
7
8
ISOLATION
16
15
14
13
12
11
10
9
V
DD2
GND2
V
OA
V
OB
V
OC
V
IND
EN2
GND2
Figure 2. Channel and Pin Configuration
Evaluation Board Setup and Operation
The P9002EVB evaluation board enables users to make
a quick and accurate assessment of digital isolator data
transmission between two isolated systems. The top and
bottom board photos in Figure 3 show the separation
between the isolated system grounds GND1 and GND2.
The basic setup shown in Figure 4 requires two isolated
power supply sources. Refer to the board schematic in
Figure 7 for the allocated connection headers; J1 (2−1) or J3
(1−3) for VDD1 power supply; J2 (1−2) or J4 (2−4) for
VDD2 power supply. Represent the input digital data VINX
using signal or logic data generator. Monitor the output
digital data VOX using oscilloscope or logic analyzer.
Figure 5 shows VINX and VOX sample waveforms.
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Output Enable pins can be left open or connected to
separate voltage or signal sources. For added convenience,
the Enable pins can also be tied to the power or ground pins
using jumpers J3 (4−2/6) for EN1 and J4 (3−1/5) for EN2,
as shown in Figure 6. Recommended operating voltage for
the power supplies, input, output and enable signals ranges
from 2.5 V to 5.5 V.
Connection headers and test points are allocated for all the
16 pins of the device package to enable the user to evaluate
any of the digital isolator channels. Two or more channels in
opposite direction can be monitored simultaneously to
demonstrate bi−directional communication.
2
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