ON Semiconductor ESDL1531 User manual
ESDL1531
3.3V ESD Protection Diodes
Ultra Low Capacitance ESD Protection
Diode for High Speed Data Line
The ESDL1531 ESD protection diodes are designed to protect high
speed data lines from ESD. Ultra−low capacitance and low ESD
clamping voltage make this device an ideal solution for protecting
voltage sensitive high speed data lines.
Features
• Low Capacitance (0.15 pF Typ, I/O to GND)
• Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
• Low ESD Clamping Voltage
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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ESDL1531
X4DFN2 (01005)
CASE 718AA
J = Device Code
M = Date Code
MARKING
DIAGRAM
JM
Typical Applications
• USB 2.0/3.x
• Thunderbolt
• MHL 2.0
• eSATA
MAXIMUM RATINGS (T
Rating
Operating Junction Temperature Range T
Storage Temperature Range T
Lead Solder Temperature −
Maximum (10 Seconds)
IEC 61000−4−2 Contact
IEC 61000−4−2 Air
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
= 25°C unless otherwise noted)
J
Symbol Value Unit
J
stg
T
L
ESD ±30
−55 to +150 °C
−55 to +150 °C
260 °C
±30
kV
kV
PIN CONFIGURATION
AND SCHEMATIC
12
=
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
May, 2019 − Rev. 0
1 Publication Order Number:
ESDL1531/D
ESDL1531
I
HOLD
I
I
PP
R
DYN
I
T
I
R
I
R
I
T
I
HOLD
−I
PP
DYN
V
)
HOLD
V
RWM
V
V
V
BR
C
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
V
V
V
I
HOLD
R
RWM
HOLD
I
V
Working Peak Voltage
I
Maximum Reverse Leakage Current @ V
R
Breakdown Voltage @ I
BR
I
Test Current
T
Holding Reverse Voltage
Holding Reverse Current
Dynamic Resistance
DYN
Maximum Peak Pulse Current
PP
Clamping Voltage @ I
C
VC = V
HOLD
+ (IPP * R
PP
DYN
T
)
ELECTRICAL CHARACTERISTICS (T
RWM
= 25°C unless otherwise specified)
A
V
BR
V
CVRWMVHOLD
VC = V
R
HOLD
DYN
+ (IPP * R
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage V
Breakdown Voltage V
Reverse Leakage Current I
Reverse Holding Voltage V
Holding Reverse Current I
Clamping Voltage
TLP (Note 1)
RWM
HOLD
HOLD
V
I/O Pin to GND 3.3 V
IT = 1 mA, I/O Pin to GND 5.5 8.6 V
BR
V
R
= 3.3 V, I/O Pin to GND 1.0
RWM
I/O Pin to GND 2.1 V
I/O Pin to GND 17 mA
IPP = 8 A IEC 61000−4−2 Level 2 equivalent
C
6.5
(±4 kV Contact, ±4 kV Air)
IPP = 16 A
IEC 61000−4−2 Level 2 equivalent
10.2
(±8 kV Contact, ±15 kV Air)
Reverse Peak Pulse Current
Clamping Voltage (8/20 ms)
Dynamic Resistance R
Junction Capacitance C
I
PP
V
DYN
IEC61000−4−5 (8/20 ms)
IPP = 5.7 A 5.6 6.5 V
C
5.7 7.5 A
I/O Pin to GND 0.46
VR = 0 V, f = 1 MHz 0.15 0.3 pF
J
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z
= 50 W, tp = 100 ns, tr = 1 ns, averaging window; t1 = 70 ns to t2 = 90 ns.
0
mA
V
W
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2
ESDL1531
TYPICAL CHARACTERISTICS
110
100
90
80
70
60
50
40
VOLTAGE (V)
30
20
10
0
−10
−20 0 20 40 60 80 100 120
TIME (ns)
Figure 1. ESD Clamping Voltage − Pin 1 to Pin 2
8 kV Contact per IEC61000−4−2
10
0
−10
−20
−30
−40
−50
−60
VOLTAGE (V)
−70
−80
−90
−100
−110
−20 0 20 40 60 80 100 120140
TIME (ns)
Figure 2. ESD Clamping Voltage − Pin 2 to Pin 1
8 kV Contact per IEC61000−4−2
140
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3
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