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ESD7371
User Manual
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ON Semiconductor ESD7371, SZESD7371 User Manual

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ESD7371, SZESD7371 Series
ESD Protection Diode
Ultra−Low Capacitance
Features
• Industry Leading Capacitance Linearity Over Voltage
• Low Capacitance (0.7 pF Max, I/O to GND)
• Stand−off Voltage: 5.3 V
• Low Leakage: < 1 nA
• Low Dynamic Resistance < 1 W
• IEC61000−4−2 Level 4 ESD Protection
• 1000 ESD IEC61000−4−2 Strikes ±8 kV Contact / Air Discharged
• SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• RF Signal ESD Protection
• RF Switching, PA, and Antenna ESD Protection
• Near Field Communications
• USB 2.0, USB 3.0
MAXIMUM RATINGS (T
IEC 61000−4−2 (ESD) (Note 1) 20 kV IEC 61000−4−5 (ESD) (Note 2) 3.0 A Total Power Dissipation (Note 3) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient Junction and Storage Temperature Range TJ, T
Lead Solder Temperature − Maximum (10 Second Duration)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at T
2. Non−repetitive current pulse at T
3. Mounted with recommended minimum pad size, DC board FR−4
= 25°C unless otherwise noted)
A
Rating
= 25°C, per IEC61000−4−2 waveform.
A
= 25°C, per IEC61000−4−5 waveform.
A
Symbol Value Unit
°P
°
stg
300 400mW°C/W
−55 to +150
260 °C
°C
D
R
q
JA
T
L
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MARKING
DIAGRAMS
2
1
1
Cathode
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
SOD−323
CASE 477
2
SOD−523
CASE 502
SOD−923
CASE 514AB
X, XX = Specific Device Code M = Date Code
PIN CONFIGURATION
AND SCHEMATIC
1
ORDERING INFORMATION
12
Anode
AG
AE M
2
AG
M
M
© Semiconductor Components Industries, LLC, 2014
August, 2018 − Rev. 3
1 Publication Order Number:
ESD7371/D
ESD7371, SZESD7371 Series
See Application Note AND8308/D for further description of survivability specs.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
V
I
PP
V
RWM
I
V
I
Maximum Reverse Peak Pulse Current Clamping Voltage @ I
C
Working Peak Reverse Voltage Maximum Reverse Leakage Current @ V
R
Breakdown Voltage @ I
BR
Test Current
T
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Parameter
PP
T
RWM
VCV
BR
V
RWM
Uni−Directional
I
I
F
I
V
R
F
I
T
I
PP
V
RWM
BR R
C C J
DYN
= 25°C unless otherwise specified)
A
5.3 V IT = 1 mA 7.0 V V
= 5.3 V < 1.0 50 nA
RWM
IPP = 1 A 11 15 V IPP = 3 A 14 20 V VR = 0 V, f = 1 MHz
V
= 0 V, f < 1 GHz
R
0.43
0.39
0.7
0.7 TLP Pulse 0.45
pF
W
ELECTRICAL CHARACTERISTICS (T
Parameter
Reverse Working Voltage V Breakdown Voltage (Note 4) V Reverse Leakage Current I Clamping Voltage (Note 5) V Clamping Voltage (Note 5) V Junction Capacitance C
Dynamic Resistance R
Symbol Conditions Min Typ Max Unit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
5. Non−repetitive current pulse at T
= 25°C, per IEC61000−4−5 waveform.
A
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2
ESD7371, SZESD7371 Series
1.E−03
1.E−04
1.E−05
1.E−06
1.E−07
I (A)
1.E−08
1.E−09
1.E−10
1.E−11
1.E−12 0123456789101112
V (V)
Figure 1. IV Characteristics Figure 2. CV Characteristics
2 0
−2
−4
−6
dB
−8
−10
−12
−14 1E8 1E9 1E10
FREQUENCY (Hz)
Figure 3. RF Insertion Loss Figure 4. Capacitance over Frequency
2E10
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
CAPACITANCE (pF)
0.2
0.1 0
0123456
V
(V)
bias
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
CAPACITANCE (pF)
0.4
0.2
0.0
0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5
FREQUENCY
16 14
12 10
8 6
TLP CURRENT (A)
4 2 0
0 2 4 6 8 101214161820
VOLTAGE (V)
Figure 5. Positive TLP I−V Curve
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8
6
4
2
0
(kV)
(kV)
(kV)
IEC
IEC
IEC
EQUIVALENT V
EQUIVALENT V
EQUIVALENT V
3
−14
−12
−10
−8
−6
TLP CURRENT (A)
−4
−2 0
02468101214161820
VOLTAGE (V)
Figure 6. Negative TLP I−V Curve
8−16
6
(kV)
4
2
EQUIVALENT V
0
IEC
ESD7371, SZESD7371 Series
IEC 61000−4−2 Spec.
Test Volt-
Level
age (kV)
1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8
ESD Gun
First Peak
Current
(A)
Current at
30 ns (A)
Device
Under
Test
50 W
Cable
IEC61000−4−2 Waveform
I
peak
Current at
60 ns (A)
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 7. IEC61000−4−2 Spec
Oscilloscope
50 W
tP = 0.7 ns to 1 ns
Figure 8. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D.
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 9. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 10 where an 8 kV IEC 61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels.
L
Attenuator
S
50 W Coax
Cable
÷
50 W Coax
Cable
10 MW
V
C
Figure 9. Simplified Schematic of a Typical TLP
System
I
M
V
M
Oscilloscope
DUT
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4
ESD7371, SZESD7371 Series
Figure 10. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
ORDERING INFORMATION
Device Package Shipping
ESD7371HT1G, SZESD7371HT1G*
ESD7371XV2T1G, SZESD7371XV2T1G*
ESD7371XV2T5G, SZESD7371XV2T5G*
ESD7371P2T5G, SZESD7371P2T5G*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
SOD−323 (Pb−Free)
SOD−523 (Pb−Free)
SOD−523 (Pb−Free)
SOD−923 (Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
†
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
2
1
1
STYLE 1 STYLE 2
SCALE 4:1
1
b
C
NOTE 3
NOTE 5
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
2
H
E
D
E
2
L
A1
0.63
0.025
1.60
0.063
2.85
0.112
SOD−323
CASE 477−02
ISSUE H
0.83
0.033
A3
DATE 13 MAR 2007
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS SPECIFIED PER L/F DRAWING WITH SOLDER PLATING.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
5. DIMENSION L IS MEASURED FROM END OF RADIUS.
MILLIMETERS
DIM MIN NOM MAX
A 0.80 0.90 1.00 A1 0.00 0.05 0.10 A3 0.15 REF
b 0.25 0.32 0.4
C 0.089 0.12 0.177
D 1.60 1.70 1.80
A
E 1.15 1.25 1.35
0.08
L
H
2.30 2.50 2.70
E
INCHES
MIN NOM MAX
0.031 0.035 0.040
0.000 0.002 0.004
0.006 REF
0.010 0.012 0.016
0.003 0.005 0.007
0.062 0.066 0.070
0.045 0.049 0.053
0.003
0.090 0.098 0.105
GENERIC
MARKING DIAGRAM*
XX M
STYLE 1 STYLE 2
XX = Specific Device Code M = Date Code
*This information is generic. Please refer to
device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present.
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
XX M
STYLE 2:
NO POLARITY
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB17533C
SOD−323
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
2
1
1
STYLE 1 STYLE 2
SCALE 4:1
b2X
M
0.08 X Y
c
2
−X−
D
−Y−
E
12
TOP VIEW
A
H
E
SIDE VIEW
2X
L
SOD−523
CASE 502−01
ISSUE E
DATE 28 SEP 2010
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PRO­TRUSIONS, OR GATE BURRS.
DIM MIN NOM MAX
A 0.50 0.60 0.70 b 0.25 0.30 0.35 c 0.07 0.14 0.20 D 1.10 1.20 1.30 E 0.70 0.80 0.90
H 1.50 1.60 1.70
L 0.30 REF
L2 0.15 0.20 0.25
MILLIMETERS
E
GENERIC
MARKING DIAGRAM*
XX
M
12
STYLE 1 STYLE 2
XX
M
12
2X
L2
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.48
PACKAGE
OUTLINE
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
1.80
2X
0.40
DIMENSION: MILLIMETERS
98AON11524D
SOD−523
XX = Specific Device Code M Date Code
*This information is generic. Please refer to
device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present.
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
STYLE 2:
NO POLARITY
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
STYLE 1 STYLE 2
SCALE 8:1
0.08 XY
b2X
TOP VIEW
c
H
SIDE VIEW
−X−
D
−Y−
E
21
A
E
2X
L
SOD−923
CASE 514AB
ISSUE D
DATE 03 SEP 2020
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
5. DIMENSION L WILL NOT EXCEED 0.30mm.
MILLIMETERS
DIM MIN NOM MAX
A 0.34 0.37 0.40 b 0.15 0.20 0.25 c 0.07 0.12 0.17 D 0.75 0.80 0.85 E 0.55 0.60 0.65
H
0.95 1.00 1.05
E
L 0.19 REF
L2 0.05 0.10 0.15 0.002 0.004 0.006
INCHES
MIN NOM MAX
0.013 0.015 0.016
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.007 REF
GENERIC
MARKING DIAGRAM*
2X
L2
BOTTOM VIEW
SOLDERING FOOTPRINT*
2X
0.36
PACKAGE
OUTLINE
See Application Note AND8455/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
1.20
2X
0.25
DIMENSIONS: MILLIMETERS
X M
X M
STYLE 1 STYLE 2
X = Specific Device Code M = Date Code
*This information is generic. Please refer to
device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present.
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
STYLE 2:
NO POLARITY
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON23284D
SOD−923, 1.0X0.6X0.37, MAX HEIGHT 0.40
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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