ON Semiconductor CS8182 Technical data

查询CS8182YDF8供应商

CS8182

Micropower 200 mA
Low Dropout Tracking
Regulator/Line Driver

The CS8182 is a monolithic integrated low dropout tracking

regulator designed to provide adjustable buffered output voltage that
closely tracks (±10 mV) the reference input. The output delivers up to
200 mA while being able to be configured higher, lower or equal to the
reference voltages.

The output has been designed to operate over a wide range (2.8 V to
45 V) while still maintaining excellent DC characteristics. The
CS8182 is protected from reverse battery, short circuit and thermal
runaway conditions. The device also can withstand 45 V load dump
transients and −50 V reverse polarity input voltage transients. This
makes it suitable for use in automotive environments.

The V
the input voltage as a reference for the output and it also can be pulled
low to place the device in sleep mode where it nominally draws less
than 30A from the supply.

Features

• 200 mA Source Capability

• Output Tracks within ±10 mV Worst Case

• Low Dropout (0.35 V Typ. @ 200 mA)

• Low Quiescent Current

• Thermal Shutdown

• Short Circuit Protection

• Wide Operating Range

• Internally Fused Leads in SO−8 Package

• For Automotive and Other Applications Requiring Site and Change

Control

V

IN

/ENABLE lead serves two purposes. It is used to provide

REF

V

OUT

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8

1

SO−8

DF SUFFIX

CASE 751

1

PIN CONNECTIONS AND

MARKING DIAGRAMS

1

V

OUT

GND
GND

Adj

CS8182

AWLYWW

1

A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week

ALYW

8182

V

IN

GND
GND
V

REF

Tab GND
Pin 1. V

5

D2PAK−5

DPS SUFFIX

CASE 936AC

/ENABLE

IN

2. V

OUT

3. GND

4. Adj

5. V

REF

Current Limit &

SAT Sense

−

ENABLE

+

Thermal

Shutdown

 Semiconductor Components Industries, LLC, 2004

August, 2004 − Rev. 21

Figure 1. Block Diagram

ORDERING INFORMATION*

Device Package Shipping

CS8182YDF8

Adj

V

/ENABLE

REF

+

GND

−

2.0 V

1 Publication Order Number:

CS8182YDFR8
CS8182YDPS5
CS8182YDPSR5
*Consult your local sales representative for SO−8 with

exposed pads package option.

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

SO−8
SO−8

2

D

PAK 5−PIN

2

PAK 5−PIN

D

95 Units/Rail

2500 Tape & Reel

50 Units/Rail

750 Tape & Reel

†

CS8182/D

CS8182

PACKAGE PIN DESCRIPTION

Package Lead Number

SO−8 D2PAK 5−PIN

8 1 V
1 2 V

2, 3, 6, 7 3 GND Ground.

4 4 Adj Adjust lead.
5 5 V

MAXIMUM RATINGS

Rating Value Unit

Storage Temperature −65 to 150 °C
Supply Voltage Range (continuous) −15 to 45 V
Supply Voltage Range (normal, continuous) 3.4 to 45 V
Peak Transient Voltage (VIN = 14 V, Load Dump Transient = 31 V) 45 V
Voltage Range (Adj, V
Maximum Junction Temperature 150 °C
Package Thermal Resistance, SO−8:

Junction−to−Case, R
Junction−to−Ambient, R

Package Thermal Resistance, D2PAK, 5−Pin:

Junction−to−Case, R
Junction−to−Ambient, R

ESD Capability (Human Body Model)
(Machine Model)

Lead Temperature Soldering: Reflow: (SO−8)
(Note 1) (D2PAK)

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.

1. 60 second maximum above 183°C.

2. −5°C/+0°C allowable conditions.
*Depending on thermal properties of substrate. R

OUT





, V

/ENABLE) −10 to 45 V

REF

JC



JA

JC



JA

= R





JA

JC

Lead Symbol Function

Input voltage.
Regulated output.

+ R

IN

OUT

/ENABLE Reference voltage and ENABLE input.

REF



CA

25

110

4.0

10−50**

2.0

200

240 peak
225 peak

(Note 2)

°C/W
°C/W

°C/W
°C/W

kV

V

°C

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2

CS8182

ELECTRICAL CHARACTERISTICS (V

0.1  < C

OUT−ESR

< 1.0 @ 10 kHz, unless otherwise specified.)

Parameter

= 14 V; V

IN

/ENABLE > 2.75 V; −40°C < TJ < +125°C; C

REF

OUT

≥ 10 F;

Test Conditions Min Typ Max Unit

Regular Output

V

− V

REF

OUT

V

Tracking Error

OUT

Dropout Voltage (VIN − V

OUT

4.5 V ≤ VIN ≤ 26 V, 100 A ≤ I
V

= 12 V, I

IN

) I

OUT

I

OUT

I

OUT

= 100 A
= 30 mA
= 200 mA

= 30 mA, V

OUT

≤ 200 mA, Note 3

OUT

= 5.0 V, Note 3

REF

−10

−5.0

−

−

−

−

−

100

−

350

10

5

150
500

600
Line Regulation 4.5 V ≤ VIN ≤ 26 V, Note 3 − − 10 mV
Load Regulation 100 A ≤ I

≤ 200 mA, Note 3 − − 10 mV

OUT

Adj Lead Current Loop in Regulation − 0.2 1.0 A
Current Limit VIN = 14 V, V
Quiescent Current (IIN − I

Reverse Current V

) VIN = 12 V, I

OUT

V
V

IN
IN

OUT

= 12 V, I
= 12 V, V

= 5.0 V, VIN = 0 V − 0.2 1.5 mA

Ripple Rejection f = 120 Hz, I

= 5.0 V, V

REF

= 200 mA

OUT

= 100 A

OUT

/ENABLE = 0 V

REF

= 200 mA, 4.5 V ≤ VIN ≤ 26 V 60 − − dB

OUT

= 90% of V

OUT

, Note 3 225 − 700 mA

REF

−

−

−

15
75
30

25

150

55

Thermal Shutdown GBD 150 180 210 °C

V

/ENABLE

REF

Enable Voltage − 0.80 2.00 2.75 V
Input Bias Current V

3. V

connected to Adj lead.

OUT

/ENABLE − 0.2 1.0 A

REF

mV
mV

mV
mV
mV

mA

A
A

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3

CS8182

TYPICAL CHARACTERISTICS

18
16
14
12
10

8
6
4

QUIESCENT CURRENT (mA)

2
0

0 20 40 60 80 100 120 140 160 180 200

OUTPUT CURRENT (mA)

Figure 2. Quiescent Current vs. Output Current

1

0.9

0.8

0.7

0.6

0.5

0.4

I (V

OUT

) = 20 mA

0.3

0.2

QUIESCENT CURRENT (mA)

0.1
0

0 5 10 15 20 25 30 35 40 45

I (V

) = 1 mA

OUT

V

, INPUT VOLTAGE (V)

IN

Figure 3. Quiescent Current vs. Input Voltage

(Operating Mode)

20

* Graph is duplicate for VIN > 1.6 V.

18

**Dip (@5 V) shifts with V

16

(mA)

14

OUT

12
10

8

VIN = 6 V*
V

= 5 V**

REF

CURRENT INTO V

6
4
2
0

0 5 10 15 20 25

FORCED V

REF

VIN = 0 V

VOLTAGE (V)

OUT

voltage.

100

90
80
70
60
50
40
30
20

QUIESCENT CURRENT (A)

10

0

0 5 10 15 20 25 30 35 40 45

V

, INPUT VOLTAGE (V)

IN

V

/ ENABLE = 0 V

REF

Figure 4. Quiescent Current vs. Input Voltage

(Sleep Mode)

140

* Graph is duplicate for VIN > 1.6 V.
**Dip (@5 V) shifts with V

120

(mA)

100

OUT

80

60

40

CURRENT INTO V

20

0

0 5 10 15 20 25

FORCED V

voltage.

REF

VOLTAGE (V)

OUT

VIN = 6 V*
V

REF

30 35 40

VIN = 0 V

= 5 V**

Figure 5. V

Reverse Current Figure 6. V

OUT

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4

Reverse Current

OUT

CS8182

CIRCUIT DESCRIPTION

ENABLE Function

By pulling the V

/ENABLE lead below 2.0 V typically,

REF

(see Figure 10 or Figure 11), the IC is disabled and enters a
sleep state where the device draws less than 55 A from
supply . W h e n th e V
V

tracks the V

OUT

, 200 mA

V

Loads

Loads

OUT

C2**

10 F

Figure 7. Tracking Regulator at the Same Voltage

, 200 mA

V

OUT

C2**

10 F

/ENABLE lead i s g reater t han 2 .75 V,

REF

/ENABLE lead normally.

REF

V

OUT

GND
GND
Adj

V

OUT

V

OUT

GND
GND
Adj

V
GND
GND

CS8182

V

REF

ENABLE

 V

REF

V
GND
GND

CS8182

V

REF

ENABLE

IN

/

C3***
10 nF

IN

/

C3***

R2

10 nF

C1*

1.0 F

C1*

1.0 F

R1

B+

5.0 V

B+

V

REF

Output Voltage

The output is capable of supplying 200 mA to the load
while configured as a similar (Figure 7), lower (Figure 9), or
higher (Figure 8) voltage as the reference lead. The Adj lead
acts as the inverting terminal of the op amp and the V

REF

lead as the non−inverting.

The device can also be configured as a high−side driver as
displayed in Figure 12.

, 200 mA

V

C2**

10 F

OUT

R

R

V

OUT

GND

F

A

V

GND
Adj

OUT

V
GND
GND

CS8182

V

REF

ENABLE

 V

REF

IN

/

(1 

C3***
10 nF

R

E

R

A

C1*

1.0 F

)

Figure 8. Tracking Regulator at Higher Voltages

, 200 mA

V

C2**

10 F

OUT

V

OUT

GND
GND
Adj

V
GND
GND

CS8182

V

REF

ENABLE

IN

/

C3***
10 nF

C1*

1.0 F

R

B+

V

B+

V

REF

REF

Loads

from MCU

V

OUT

 V

REF

R2

(

R1  R2

)

Figure 9. Tracking Regulator at Lower Voltages

6.0 V−40 V

5.0 V

To Load

(e.g. sensor)

100 nF

10 F

V

IN

NCV8501

V

OUT

GND
GND
Adj

V
GND
GND

CS8182

V

REF

ENABLE

IN

V

(5.0 V)

REF

C1*

1.0 F

I/O

/

C3***
10 nF

Figure 11. Alternative ENABLE Circuit

* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.

Figure 10. Tracking Regulator with ENABLE Circuit

V

IN

GND
GND

CS8182

V

REF

ENABLE

 B V

/

C3***
10 nF

SAT

C

V

V
GND
GND
Adj

OUT

OUT

Figure 12. High−Side Driver

B+200 mA

MCU

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5

APPLICATION NOTES

V

Short to Battery

OUT

The CS8182 will survive a short to battery when hooked
up the conventional way as shown in Figure 13. No damage
to the part will occur. The part also endures a short to battery
when powered by an isolated supply at a lower voltage as in

Short to battery

CS8182

Figure 14. In this case the CS8182 supply input voltage is set
at 7 V when a short to battery (14 V typical) occurs on V
which normally runs at 5 V. The current into the device
(ammeter in Figure 14) will draw additional current as
displayed in Figure 15.

OUT

V

70 mA

C2**

10 F

OUT

V

OUT

GND

GND

Adj

V

OUT

GND

GND

CS8182

V

ENABLE

= V

REF

Loads

Figure 13.

Short to battery

A

Automotive Battery
typically 14 V

* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.

Loads

C2**

10 F

V

OUT

70 mA

Figure 14.

V

REF

B+

IN

/

V

GND

GND

Adj

OUT

V

C3***
10 nF

OUT

C1*

1.0 F

V

GND

GND

CS8182

V

REF

ENABLE

= V

REF

IN

+

Automotive Battery
typically 14 V

−

5.0 V

+

5.0 V

−

B+

7 V

5.0 V

+

5.0 V

−

+

−

C1*

1.0 F

/

C3***
10 nF

2.0

1.8

1.6

1.4

1.2

1.0

0.8

CURRENT (mA)

0.6

0.4

0.2
0

6510152025

7 8 9 11121314 16171819 21222324 26

V

VOLTAGE (V)

OUT

Figure 15. V

Short to Battery

OUT

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Switched Application

The CS8182 has been designed for use in systems where

the reference voltage on the V

/ENABLE pin is

REF

continuously on. Typically, the current into the
V

/ENABLE pin will be less than 1.0 A when the

REF

voltage on the VIN pin (usually the ignition line) has been
switched out (VIN can be at high impedance or at ground.)
Reference Figure 16.

Ignition

V

OUT

C2

10 F

V

OUT

GND

GND

Adj

V

GND

GND

CS8182

V

REF

ENABLE

IN

/

< 1.0 A

Figure 16.

6

Switch

C1

1.0 F

V

REF

5.0 V

V

BAT

CS8182

External Capacitors

The output capacitor for the CS8182 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.

The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.

The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to −40°C, a capacitor rated at that temperature
must be used.

More information on capacitor selection for SMART
REGULATORs is available in the SMART R EGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through our
website at http://www.onsemi.com.

Calculating Power Dissipation in a Single Output
Linear Regulator

The maximum power dissipation for a single output
regulator (Figure 17) is:

PD(max) {VIN(max)  V

 VIN(max)I

Q

OUT

(min)}I

OUT

(max)

(1)

where:

V

V

I

OUT(max)

is the maximum input voltage,

IN(max)
OUT(min)

is the minimum output voltage,

is the maximum output current, for the
application,and
IQ is the quiescent current the regulator consumes at
I

OUT(max)

.
Once the value of PD(max) is known, the maximum

permissible value of R

R

can be calculated:

JA



150°C  T



JA

A

P

D

(2)

The value of R

can then be compared with those in the

JA



package section of the data sheet. Those packages with
R

’s less than the calculated value in equation 2 will keep

JA



the die temperature below 150°C.

In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.

I

V

Heatsinks

IN

IN

Figure 17. Single Output Regulator with Key

Performance Parameters Labeled

SMART

REGULATOR

Control
Features

I

Q



I

OUT

V

OUT

A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.

Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R

R

 R

JA

JC



JA:

 R

CS

 R

SA

(3)

where:

R

= the junction−to−case thermal resistance,

JC



R

= the case−to−heatsink thermal resistance, and

CS



R

= the heatsink−to−ambient thermal resistance.

SA



appears in the package section of the data sheet. Like

R

JC



R

, it is a function of package type. R

JA



CS



and R

are

SA



functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heatsink manufacturers.

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7

−Y−

−Z−

CS8182

PACKAGE DIMENSIONS

SOIC−8

DF SUFFIX

CASE 751−07

ISSUE AB

NOTES:

−X−
A

58

B

1

S

0.25 (0.010)

4

M

M

Y

K

G

N

C

SEATING
PLANE

0.10 (0.004)

H

D

0.25 (0.010) Z

M

Y

SXS

X 45



M

J

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8



N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244

INCHES

SOLDERING FOOTPRINT

7.0

0.275

0.6

0.024

Figure 18. SOIC−8

1.52

0.060

4.0

0.155

1.270

0.050

SCALE 6:1



inches

mm



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8

CS8182

PACKAGE DIMENSIONS

D2PAK−5

DP SUFFIX

CASE 936AC−01

ISSUE O

A

K

S

B

H

W

G

D

R

−A−

C

L

E

M

N

P

TERMINAL 6

V

U

NOTES:

1. DIMENSIONS AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. PACKAGE OUTLINE EXCLUSIVE OF
MOLD FLASH AND METAL BURR.

4. PACKAGE OUTLINE INCLUSIVE OF
PLATING THICKNESS.

5. FOOT LENGTH MEASURED AT
INTERCEPT POINT BETWEEN DATUM A
AND LEAD SURFACE.

DIM MIN MAX MIN MAX

A 0.396 0.406 10.05 10.31
B 0.330 0.340 8.38 8.64
C 0.170 0.180 4.31 4.57
D 0.026 0.036 0.66 0.91
E 0.045 0.055 1.14 1.40
G 0.067 REF 1.70 REF
H 0.580 0.620 14.73 15.75
K 0.055 0.066 1.40 1.68
L 0.000 0.010 0.00 0.25
M 0.098 0.108 2.49 2.74
N 0.017 0.023 0.43 0.58
P 0.090 0.110 2.29 2.79
R 0 8



S 0.095 0.105 2.41 2.67
U 0.30 REF 7.62 REF
V 0.305 REF 7.75 REF
W 0.010 0.25

MILLIMETERSINCHES

0 8



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9

CS8182

SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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CS8182/D

10