CM1420, CM1422
LCD EMI Filter Array with
ESD Protection
Description
The CM1420 and CM1422 are EMI filter arrays with ESD
protection, which integrate six and eight Pi−filters (C−R−C),
respectively. The CM1420/22 has component values of 15 pF −
100 − 15 pF. These devices include ESD protection diodes on every
pin, which provide a very high level of protection for sensitive
electronic components that may be subjected to electrostatic discharge
(ESD). The ESD diodes connected to the filter ports safely dissipate
ESD strikes of ±15 kV, well beyond the maximum requirement of the
IEC 61000−4−2 international standard. Using the MIL−STD−883
(Method 3015) specification for Human Body Model (HBM) ESD, the
pins are protected for contact discharges at greater than ±30 kV.
This device is particularly well suited for portable electronics (e.g.
wireless handsets, PDAs, notebook computers) because of its small
package format and easy−to−use pin assignments. In particular, the
CM1420/22 is ideal for EMI filtering and protecting data lines from
ESD for the LCD display in clamshell handsets.
The CM1420 and CM1422 incorporate OptiGuardt coating which
results in improved reliability at assembly. The CM1420 and CM1422
are available in space−saving, low−profile chip scale packages with
RoHS compliant lead−free finishing.
Features
• Functionally and Pin Compatible with CSPEMI606 (CM1420) and
CSPEMI608 (CM1422) Devices
• OptiGuardtCoated for Improved Reliability at Assembly
• Six and Eight Channels of EMI Filtering
• ±15 kV ESD Protection on Each Channel
(IEC 61000−4−2 Level 4, Contact Discharge)
• ±30 kV ESD Protection on Each Channel (HBM)
• Better than 30 dB of Attenuation at 1 GHz to 3 GHz
• Chip Scale Package Features Extremely Low Lead Inductance for
Optimum Filter and ESD Performance
• 15−Bump, 2.960 mm x 1.330 mm Footprint Chip Scale Package
(CM1420)
• 20−Bump, 4.000 mm x 1.458 mm Footprint Chip Scale Package
(CM1422)
• These Devices are Pb−Free and are RoHS Compliant
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WLCSP15
CP SUFFIX
CASE 567BS
MARKING DIAGRAM
N203
CM1420
15−Bump CSP Package
N203 = CM1420−03CP
N223 = CM1422−03CP
ORDERING INFORMATION
Device Package Shipping
CM1420−03CP CSP−15
(Pb−Free)
CM1422−03CP CSP−20
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
WLCSP20
CP SUFFIX
CASE 567BZ
N223
CM1422
20−Bump CSP Package
†
3500/Tape & Reel
3500/Tape & Reel
Applications
• LCD Data Lines in Clamshell Wireless Handsets
• EMI Filtering & ESD Protection for High−Speed I/O Data Ports
• Wireless Handsets / Cell Phones
• Notebook Computers
• PDAs / Handheld PCs
• EMI Filtering for High−Speed Data Lines
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 4
1 Publication Order Number:
CM1420/D
CM1420, CM1422
BLOCK DIAGRAM
100
FILTERn*
15 pF 15 pF
GND
(Pins B1−Bn)
1 of n EMI Filtering + ESD Channels
(n = 6 for CM1420, 8 for CM1422)
*See Package/Pinout Diagrams for expanded pin information.
PACKAGE / PINOUT DIAGRAMS
FILTERn*
Bottom View
(Bumps Up View)
C3 C4
B1
B2
A3 A4
C3 C4
B2
A3 A4
C5 C6
B3
A5 A6
C5 C6
B3
A5 A6
Orientation
Marking
Orientation
Marking
A
B
C
123
+
A
B
C
(Bumps Down View)
123
+
Top View
564
N203
CM1420 CSP Package
56748
N223
CM1422 CSP Package
Orientation
Marking
Orientation
Marking
C1 C2
A1 A2
A1
C1 C2
B1
A1 A2
A1
Table 1. PIN DESCRIPTIONS
CM1420 CM1422
Pin(s) Pin(s) Pin(s) Pin(s)
A1 A1 FILTER1 Filter Channel 1 C1 C1 FILTER1 Filter Channel 1
A2 A2 FILTER2 Filter Channel 2 C2 C2 FILTER2 Filter Channel 2
A3 A3 FILTER3 Filter Channel 3 C3 C3 FILTER3 Filter Channel 3
A4 A4 FILTER4 Filter Channel 4 C4 C4 FILTER4 Filter Channel 4
A5 A5 FILTER5 Filter Channel 5 C5 C5 FILTER5 Filter Channel 5
A6 A6 FILTER6 Filter Channel 6 C6 C6 FILTER6 Filter Channel 6
− A7 FILTER7 Filter Channel 7 − C7 FILTER7 Filter Channel 7
− A8 FILTER8 Filter Channel 8 − C8 FILTER8 Filter Channel 8
B1−B3 B1−B4 GND Device Ground
Name Description
CM1420 CM1422
Name Description
C7 C8
B4
A7 A8
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2
CM1420, CM1422
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter Rating Units
Storage Temperature Range −65 to +150 °C
DC Power per Resistor 100 mW
DC Package Power Rating 500 mW
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD OPERATING CONDITIONS
Parameter Rating Units
Operating Temperature Range −40 to +85 °C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol Parameter Conditions Min Typ Max Units
R Resistance 80 100 120
C Capacitance At 2.5 V DC, 1 MHz,
12 15 18 pF
30 mV AC
V
DIODE
I
LEAK
V
V
ESD
R
DYN
f
1. T
A
2. ESD applied to input and output pins with respect to GND, one at a time.
Diode Standoff Voltage
Diode Leakage Current (reverse bias) V
Signal Clamp Voltage
SIG
Positive Clamp
Negative Clamp
In−system ESD Withstand Voltage
a) Human Body Model, MIL−STD−883, Method 3015
b) Contact Discharge per IEC 61000−4−2 Level 4
Dynamic Resistance
Positive
Negative
Cut−off Frequency
C
= 25 °C unless otherwise specified.
Z
SOURCE
= 50 , Z
LOAD
= 50
I
= 10 A
DIODE
= 3.3 V 100 200 nA
DIODE
I
= 10 mA
LOAD
(Note 3)
5.6
−1.5
6.0 V
6.8
−0.8
(Note 2)
±30
±15
2.30
0.90
R = 100 , C = 15 pF
120
9.0
−0.4
3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1, then clamping
voltage is measured at Pin C1.
V
kV
MHz
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3
CM1420, CM1422
PERFORMANCE INFORMATION
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1)
Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1)
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4
CM1420, CM1422
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2)
Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2)
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5
CM1420, CM1422
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3)
Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3)
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6
CM1420, CM1422
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 7. Insertion Loss vs. Frequency
(A7−C7 to GND B4, CM1422 Only)
Figure 8. Insertion Loss vs. Frequency
(A8−C8 to GND B4, CM1422 Only)
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7
CM1420, CM1422
PERFORMANCE INFORMATION (Cont’d)
Figure 9. Filter Capacitance vs. Input Voltage over Temperature
(normalized to capacitance at 2.5 VDC and 255C)
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8
CM1420, CM1422
APPLICATION INFORMATION
Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS
Parameter Value
Pad Size on PCB 0.240 mm
Pad Shape Round
Pad Definition Non−Solder Mask defined pads
Solder Mask Opening 0.290 mm Round
Solder Stencil Thickness 0.125 − 0.150 mm
Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.300 mm Round
Solder Flux Ratio 50/50 by volume
Solder Paste Type No Clean
Pad Protective Finish OSP (Entek Cu Plus 106A)
Tolerance − Edge To Corner Ball
Solder Ball Side Coplanarity
Maximum Dwell Time Above Liquidous 60 seconds
Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste 260°C
±50 m
±20 m
Non−Solder Mask Defined Pad
0.240 mm DIA.
Solder Stencil Opening
0.300 mm DIA.
Solder Mask Opening
0.290 mm DIA.
Figure 10. Recommended Non−Solder Mask Defined Pad Illustration
250
200
150
100
Temperature (5C)
50
0 1:00.0 2:00.0 3:00.0 4:00.0
Time (minutes)
Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile
OptiGuardt is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SCALE 4:1
PIN A1
REFERENCE
2X
2X
0.05 C
0.05 C
0.05 C
D
TOP VIEW
WLCSP15, 2.96x1.33
CASE 567BS−01
ISSUE O
A
B
E
A2
DATE 26 JUL 2010
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
MILLIMETERS
DIMAMIN MAX
A1
A2 0.40 REF
b 0.29 0.35
D 2.96 BSC
E
eD 0.50 BSC
eE 0.435 BSC
0.65
0.56
0.21 0.27
1.33 BSC
NOTE 3
0.03
0.05 C
15X
A0.05 BC
C
A1
b
SIDE VIEW
C
B
A
123 789
456
BOTTOM VIEW
eD/2
eD
A
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
15X
0.25
eE
C
SEATING
PLANE
A1
0.87
0.44
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON49826E
WLCSP15, 2.96X1.33
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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