ON Semiconductor CAT5191 User Manual

CAT5191

256‐position I2C Compatible Digital Potentiometer (POT)

The CAT5191 is a 256-position digital linear taper potentiometer ideally suited for replacing mechanical potentiometers and variable resistors.

The wiper settings are controlled through an I interface. Upon power-up, the wiper assumes a midscale position and may be repositioned anytime after the power is stable. The device can be programmed to reset the wiper position to midscale or to go to a shutdown state during operation. An address input pin, AD0, allows the connection of two devices onto the same I

The CAT5191 operates from 2.7 V to 5.5 V, while consuming less than 2 mA. This low operating current, combined with a small package footprint, makes the CAT5191 ideal for battery-powered portable applications.

The CAT5191, designed as a pin for pin replacement for the AD5245, is o f fered in the 8-lead SOT23 package and operates over the

−40°C to +125°C industrial temperature range.

Features

• 256-position

• End-to-End Resistance: 50 kW, 100 kW

• I

C Compatible Interface

• Power-on Preset to Midscale

• Single Supply 2.7 V to 5.5 V

• Low Temperature Coefficient 100 ppm/°C

• Low Power, I

2 mA max

• Extended Operating Temperature −40°C to +125°C

• SOT−23 8-lead (2.9 mm × 3 mm) Package

• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS

Compliant

C-compatible digital

C bus.

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SOT23−8

TP, TB SUFFIX

CASE 527AK

MARKING DIAGRAM

AKYM

AK = 50 kW AL = 100 kW Y = Production Year

Y = (Last Digit)

M = Production Month

M = (1 − 9, A, B, C)

PIN CONNECTIONS

ALYM

Typical Applications

• Potentiometer Replacement

• Transducer Adjustment of Pressure, Temperature, Position,

Chemical, and Optical Sensors

• RF Amplifier Biasing

• Gain Control and Offset Adjustment

November, 2016 − Rev. 0

GND

SCL

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.

1 Publication Order Number:

(Top View)

A B AD0 SDA

CAT5191/D

CAT5191

SCL

SDA

AD0

I2C Interface

and

Control

Power On

Midscale

GND

Figure 1. Functional Block Diagram

Table 1. ORDERING INFORMATION

Part Number Resistance Temperature Range Package Shipping

CAT5191TBE−50GT3 CAT5191TBE−00GT3

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

1. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device

Nomenclature document, TND310/D, available at www.onsemi.com

50 kW

100 kW

−40°C to +125°C

SOT−23−8

(Pb-Free)

3000 / Tape & Reel 3000 / Tape & Reel

†

Table 2. PIN FUNCTION DESCRIPTION

Pin No. Pin Name Description

1 W Resistor’s Wiper Terminal 2 V 3 GND Digital Ground 4 SCL Serial Clock Input 5 SDA Serial Data Input 6 AD0 I2C Address bit 0 input 7 B Bottom Terminal of resistive element 8 A Top Terminal of resistive element

Positive Power Supply

Table 3. ABSOLUTE MAXIMUM RATINGS (Note 2)

Rating Value Unit

VDD to GND −0.3 to 6.5 V VA, VB, VW to GND V I

MAX

Digital Inputs and Output Voltage to GND 0 to 6.5 V Operating Temperature Range −40 to +125 °C Maximum Junction Temperature (T Storage Temperature −65 to +150 °C Lead Temperature (Soldering, 10 sec) 300 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

2. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and

maximum applied voltage across any two of the A, B, and W terminals at a given resistance.

) 150 °C

JMAX

±20 mA

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CAT5191

Table 4. ELECTRICAL CHARACTERISTICS: 50 kW and 100 kW Versions

= 2.7 V to 5.5 V; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Typ

Parameter

Test Conditions Symbol Min

DC CHARACTERISTICS — RHEOSTAT MODE

Resistor Differential Nonlinearity (Note 4)

RWB, VA = no connection R−DNL −1 ±0.1 +1 LSB Resistor Integral Nonlinearity (Note 4) RWB, VA = no connection R−INL −2 ±0.4 +2 LSB Nominal Resistor Tolerance (Note 5) T

= 25°C nR

−20 +20 % Resistance Temperature Coefficient VAB = VDD, Wiper = no connection nRAB/nT 100 ppm/°C Wiper Resistance

VDD = 5 V, IW = ±3 mA

VDD = 3 V, IW = ±3 mA 100 250

DC CHARACTERISTICS — POTENTIOMETER DIVIDER MODE

Resolution

N 8 Bits Differential Nonlinearity (Note 6) DNL −1 ±0.1 +1 LSB Integral Nonlinearity (Note 6) INL −1 ±0.4 +1 LSB Voltage Divider Temperature Coefficient Code = 0x80 nVW/nT 100 ppm/°C Full-Scale Error Code = 0xFF V Zero-Scale Error Code = 0x00 V

WFSE WZSE

−3 −1 0 LSB

RESISTOR TERMINALS

Voltage Range (Note 7) Capacitance (Note 8) A, B f = 1 MHz, measured to GND,

Code = 0 x 80

Capacitance (Note 8) W f = 1 MHz, measured to GND,

Code = 0 x 80

Common-Mode Leakage (Note 8) VA = VB = VDD/2 I

A,B,W

A,B

GND V

DIGITAL INPUTS

Input Logic High

VDD = 5 V V Input Logic Low VDD = 5 V V Input Logic High VDD = 3 V V Input Logic Low VDD = 3 V V Input Current VIN = 0 V or 5 V I

0.7 x V

IH IL

0.7 x V

IH IL

POWER SUPPLIES

Power Supply Range

DD RANGE

Supply Current VIH = 5 V or VIL = 0 V I Power Dissipation (Note 8) VIH = 5 V or VIL = 0 V, VDD = 5 V P

DISS

2.7 5.5 V

Power Supply Sensitivity nVDD = +5 V ±10%, Code = Midscale PSS ±0.05 %/%

DYNAMIC CHARACTERISTICS (Notes 8 and 10)

Bandwidth –3 dB

RAB = 50 kW / 100 kW, Code = 0x80

Total Harmonic Distortion VA =1 V rms, VB = 0 V,

= 10 kW

VW Settling Time (50 kW/100 kW)

f = 1 kHz, R

VA = 5 V, VB = 0 V, ±1 LSB error band t

BW 100/40 kHz

THD

3. Typical specifications represent average readings at +25°C and VDD = 5 V.

4. Resistor position nonlinearity error R−INL is the deviation from an ideal value measured between the maximum resistance and the mini-

mum resistance wiper positions. R−DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

= VDD, Wiper (VW) = no connect.

5. V

6. INL and DNL are measured at VW with the digital potentiometer configured as a potentiometer divider similar to a voltage output D/A con-

verter. V

7. Resistor terminals A, B, W have no limitations on polarity with respect to each other.

= VDD and VB = 0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

8. Guaranteed by design and not subject to production test.

9. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and

maximum applied voltage across any two of the A, B, and W terminals at a given resistance.

10.All dynamic characteristics use V

= 5 V.

(Note 3)

50 120

Max Unit

0 1 3 LSB

45 pF

60 pF

1 nA

V V V V

0.3V

0.3V ±1

0.3 2

0.2 mW

0.05 %

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CAT5191

Table 5. CAPACITANCE

TA = 25°C, f = 1.0 MHz, VDD = 5 V

Symbol

I/O

(Note 11)

Input/Output Capacitance (SDA, SCL) V

Table 6. POWER UP TIMING (Notes 11 and 12)

Symbol

PUR

PUW

Power-up to Read Operation 1 ms Power-up to Write Operation 1 ms

11.This parameter is tested initially and after a design or process change that affects the parameter.

12.t

PUR

and t

are delays required from the time VCC is stable until the specified operation can be initiated.

PUW

Table 7. DIGITAL POTENTIOMETER TIMING

Symbol Parameter Min Max Units

WRPO

Wiper Response Time After Power Supply Stable 50 Wiper Response Time: SCL falling edge after last bit of wiper position data byte to

wiper change

Table 8. A.C. CHARACTERISTICS

VDD = +2.7 V to +5.5 V, −40°C to +125°C unless otherwise specified.

Symbol

SCL

HIGH

LOW

SU:STA

HD:STA

SU:DAT

HD:DAT

SU:STO

BUF

Clock Frequency 400 kHz Clock High Period 600 ns Clock Low Period 1300 ns Start Condition Setup Time (for a Repeated Start Condition) 600 ns Start Condition Hold Time 600 ns Data in Setup Time 100 ns Data in Hold Time 0 ns Stop Condition Setup Time 600 ns Time the bus must be free before a new transmission can start 1300 ns SDA and SCL Rise Time 300 ns SDA and SCL Fall Time 300 ns Data Out Hold Time 100 ns Noise Suppression Time Constant at SCL, SDA Inputs 50 ns SCL Low to SDA Data Out and ACK Out 1

Test Conditions Max Units

= 0V 8 pF

I/O

Parameter Max Units

Parameter Min Typ Max Units

ms ms

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