This transistor is designed for general purpose amplifier
applications. It is housed in the SOT−563 which is designed for low
power surface mount applications.
• Lead−Free Solder Plating
MAXIMUM RATINGS − NPN
RatingSymbolValueUnit
Collector−Emitter VoltageV
Collector−Base VoltageV
Emitter−Base VoltageV
Collector Current −
Continuous
CEO
CBO
EBO
I
C
MAXIMUM RATINGS − PNP
RatingSymbolValueUnit
Collector−Emitter VoltageV
Collector−Base VoltageV
Emitter−Base VoltageV
Collector Current −
Continuous
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously . If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
CEO
CBO
EBO
I
C
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device DissipationTA = 25°C
Derate above 25°C
Thermal Resistance −
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
T
= 25°C
A
Derate above 25°C
Thermal Resistance −
Junction-to-Ambient
Junction and Storage
Temperature Range
1. FR−4 @ Minimum Pad
SymbolMaxUnit
P
D
R
q
JA
SymbolMaxUnit
P
D
R
q
JA
TJ, T
stg
45V
50V
6.0V
100mAdc
−45V
−50V
−5.0V
−100mAdc
357
(Note 1)
2.9
(Note 1)
350
(Note 1)
500
(Note 1)
4.0
(Note 1)
250
(Note 1)
−55 to +150°C
mW
mW/°C
°C/W
mW
mW/°C
°C/W
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(3)
Q
1
(4)(5)(6)
BC847BPDX6T1
4
5
6
2
1
SOT−563
CASE 463A
PLASTIC
(1)(2)
Q
2
3
MARKING DIAGRAM
4F MG
G
1
4F = Specific Device Code
M = Month Code
G= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
DevicePackageShipping
BC847BPDXV6T1SOT−5634 mm pitch
BC847BPDXV6T1G SOT−563
(Pb−Free)
BC847BPDXV6T5SOT−5634 mm pitch
BC847BPDXV6T5G SOT−563
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
INFORMATION FOR USING THE SOT−563 SURFACE MOUNT PACKAGE
e
n
e
s
g
-
n
s
e
.
-
e
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
1.35
interface between the board and the package. With th
correct pad geometry, the packages will self align whe
subjected to a solder reflow process.
0.3
0.45
1.0
0.50.5
Dimensions in mm
SOT−563
SOT−563 POWER DISSIPATION
The power dissipation of the SOT−563 is a function of
the pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T
of the die, R
junction to ambient, and the operating temperature, T
, the maximum rated junction temperature
J(max)
, the thermal resistance from the device
JA
θ
A
Using the values provided on the data sheet for the
SOT−563 package, P
can be calculated as follows:
D
T
− T
PD =
J(max)
R
A
θ
JA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T
of 25°C,
A
one can calculate the power dissipation of the device which
in this case is 150 milliwatts.
The melting temperature of solder is higher than th
rated temperature of the device. When the entire device i
heated to a high temperature, failure to complete solderin
within a short time could result in device failure. There
fore, the following items should always be observed i
order to minimize the thermal stress to which the device
.
are subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of th
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
SOLDERING PRECAUTIONS
• The soldering temperature and time shall not exceed
150°C − 25°C
PD =
833°C/W
= 150 milliwatts
The 833°C/W for the SOT−563 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 150 milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT−563 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad
®
. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces
sive thermal shock and stress which can result in damag
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6
D
−X−
6
12 3
e
45
b
0.08 (0.003)X
E
−Y−
6 5 PL
BC847BPDXV6T1, BC847BPDXV6T5
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A−01
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
L
H
E
C
M
Y
SOLDERING FOOTPRINT*
0.3
0.0118
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
BC847BPDXV6T1, BC847BPDXV6T5
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
BC847CBPDXV6T1/D
8
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