Datasheet BAS19LT1 Datasheet (ON Semiconductor)

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SEMICONDUCTOR TECHNICAL DATA

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MAXIMUM RATINGS

Rating Symbol Value Unit

Continuous Reverse Voltage V
Peak Forward Current I
Peak Forward Surge Current I

FM(surge)

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation FR–5 Board

TA = 25°C

Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation

Alumina Substrate,

Derate above 25°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature TJ, T

(2)

TA = 25°C

(1)

DEVICE MARKING

BAS19LT1 = JP

3

CATHODE

R

F

P

D

R

q

JA

P

D

R

q

JA

stg

120 Vdc
200 mAdc
625 mAdc

225

1.8
556 °C/W
300

2.4
417 °C/W

–55 to +150 °C

1

ANODE

mW

mW/°C

mW

mW/°C

Motorola Preferred Device

3

1

2

CASE 318–08, STYLE 8

SOT–23 (TO–236AB)

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25°C unless otherwise noted)

A

OFF CHARACTERISTICS

Reverse Voltage Leakage Current

(VR = 100 Vdc)
(VR = 100 Vdc, TJ = 150°C)

Reverse Breakdown Voltage

(IBR = 100 µAdc)

Forward Voltage

(IF = 100 mAdc)
(IF = 200 mAdc)

Diode Capacitance

(VR = 0, f = 1.0 MHz)

Reverse Recovery Time

(IF = IR = 30 mAdc, RL = 100 Ω)

1. FR–5 = 1.0  0.75  0.062 in.

2. Alumina = 0.4  0.3  0.024 in. 99.5% alumina.

Preferred devices are Motorola recommended choices for future use and best overall value.

Thermal Clad is a trademark of the Bergquist Company

Symbol Min Max Unit

V

I

R

(BR)

V

F

C

D

t

rr

—
—

120 — Vdc

—
—

— 5.0 pF

— 50 ns

0.1

100

1000
1250

µAdc

mV

Motorola Small–Signal Transistors, FETs and Diodes Device Data

 Motorola, Inc. 1999

1

BAS19LT1

820

Ω

+10 V

0.1 µF

2.0 k
100

I

t

t

r

0.1

µ

I

F

µ

H

F

p

10%

t

F

t

rr

t

50 Ω OUTPUT

PULSE

GENERATOR

3500

3000

2500

2000

1500

1000

FORWARD VOLTAGE (mV)

500

0

0.2 0.5 21

D.U.T.

50

Ω

INPUT

SAMPLING

OSCILLOSCOPE

Notes: 1. A 2.0 kΩ variable resistor adjusted for a Forward Current (IF) of 30 mA.

Notes: 2. Input pulse is adjusted so I
Notes: 3. tp » t

rr

V

R

R(peak)

90%

INPUT SIGNAL

is equal to 30 mA.

Figure 1. Recovery Time Equivalent Test Circuit

7000
6000
5000

TA = –55°C

TA = 155°C

TA = 25°C

5 10 20 50 100 2000.1

FORWARD CURRENT (mA)

4000
3000

REVERSE CURRENT (nA)

6
5
4
3
2
1
0

21

5 10 20 50 100 200

I

R

TA = 155°C

TA = 25°C

TA = –55°C

REVERSE VOLTAGE (V)

OUTPUT PULSE

(IF = IR = 30 mA; MEASURED

at i

i

R(REC)

R(REC)

= 3.0 mA

= 3.0 mA)

300

Figure 2. Forward Voltage Figure 3. Reverse Leakage

2

Motorola Small–Signal Transistors, FETs and Diodes Device Data

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

BAS19LT1

Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection

0.037

0.95

0.035

0.9

SOT–23 POWER DISSIP ATION

The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T
die, R
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:

The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.

The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.

, the maximum rated junction temperature of the

J(max)

, the thermal resistance from the device junction to

θJA

PD =

T

PD =

150°C – 25°C

556°C/W

J(max)

R

θJA

– T

A

= 225 milliwatts

0.031

0.8

SOT–23

interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.

0.037

0.95

0.079

2.0

inches

mm

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.

• Always preheat the device.

• The delta temperature between the preheat and

soldering should be 100°C or less.*

• When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.

• The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

• When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

• After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.

• Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.

Motorola Small–Signal Transistors, FETs and Diodes Device Data

3

BAS19LT1

P ACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

A

L

3

1

2

S

B

GV

C

D

H

K

J

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.

INCHES

DIMAMIN MAX MIN MAX

0.1102 0.1197 2.80 3.04

B 0.0472 0.0551 1.20 1.40
C 0.0350 0.0440 0.89 1.11
D 0.0150 0.0200 0.37 0.50
G 0.0701 0.0807 1.78 2.04
H 0.0005 0.0040 0.013 0.100
J 0.0034 0.0070 0.085 0.177
K 0.0140 0.0285 0.35 0.69
L 0.0350 0.0401 0.89 1.02
S 0.0830 0.1039 2.10 2.64
V 0.0177 0.0236 0.45 0.60

STYLE 8:

PIN 1. ANODE

MILLIMETERS

2. NO CONNECTION

3. CATHODE

CASE 318–08

ISSUE AF

SOT–23 (TO–236AB)

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Motorola Small–Signal Transistors, FETs and Diodes Device Data

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BAS19LT1/D