ON Semiconductor AMIS-42770 User Manual

AMIS-42770

Dual High Speed CAN Transceiver

General Description

Controller Area Network (CAN) is a serial communication protocol, which supports distributed real−time control and multiplexing with h igh safety level. Typical applications of CAN−based networks can be found in automotive and industrial environments.

The AMIS−42770 Dual−CAN transceiver is the interface between up to two physical bus lines and the protocol controller and will be used for serial data interchange between different electronic units at more than one bus line. It can be used for both 12 V and 24 V systems.

The circuit consists of following blocks:

• Two differential line transmitters

• Two differential line receivers

• Interface to the CAN protocol handler

• Interface to expand the number of CAN busses

• Logic block including repeater function and the feedback suppression

• Thermal shutdown circuit (TSD)

Due to the wide common−mode voltage range of the receiver inputs, the AMIS−42770 is able to reach outstanding levels of electromagnetic susceptibility (EMS). Similarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals.

Key Features

• Fully Compatible with the ISO 11898−2 Standard

• Certified “Authentication on CAN Transceiver Conformance (d1.1)”

• Wide Range of Bus Communication Speed (up to 1 Mbit/s in

Function of the Bus Topology)

• Allows Low Transmit Data Rate in Networks Exceeding 1 km

• Ideally Suited for 12 V and 24 V Industrial and Automotive

Applications

• Low EME: Common−mode−choke is No Longer Required

• Differential Receiver with Wide Common−mode Range (±35 V) for

High EMS

• No Disturbance of the Bus Lines with an Un−powered Node

• Prolonged Dominant Time−out Function Allowing Communication

Speeds Down to 1 kbit/s

• Thermal Protection

• Bus Pins Protected against Transients

• Short Circuit Proof to Supply Voltage and Ground

• This is a Pb−Free Device*

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SOIC 20

IC SUFFIX

CASE 751AQ

AMIS42770

ICAW−N

AWLYYWWG

A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

November, 2014 − Rev. 4

1 Publication Order Number:

AMIS−42770/D

AMIS−42770

ORDERING INFORMATION

Part Number Package Shipping Configuration Temperature Range

AMIS42770ICAW1G SOIC−20 300

(Pb−Free, Green)

AMIS42770ICAW1RG SOIC−20 300

(Pb−Free, Green)

T able 1. TECHNICAL CHARACTERISTICS

Symbol Parameter Conditions Min. Max. Unit

CANHx

CANLx

o(dif)(bus_dom)

CM−range Input common−mode range for comparator Guaranteed differential receiver

CM−peak

CM−step

1. The parameters V

DC voltage at pin CANH1/2 0 < VCC < 5.25 V; no time limit −45 +45 V DC voltage at pin CANL1/2 0 < VCC < 5.25 V; no time limit −45 +45 V Differential bus output voltage in dominant state

Common−Mode peak See Figures 10 and 11 (Note 1) −1000 +1000 mV Common−Mode step See Figures 10 and 11 (Note 1) −250 +250 mV

CM−peak

and V

guarantee low EME.

CM−step

VCC

38 / Tube −40°C to 125°C

1500 / Tape & Reel −40°C to 125°C

42.5 W < RLT < 60 W

1.5 3 V

−35 +35 V

threshold and leakage current

CANH1

CANL1

13 14

CC/2

−

i(cm)

shutdown

REF

Thermal

Driver

control

COMP

Timer

ENB1

POR

AMIS−42770

Logic

Unit

Feedback Suppression

3792

Feedback Suppression

RintTx0Text

Figure 1. Block Diagram

Timer

ENB2

2x timer

clock

Driver

control

COMP

5 6 15 16 17

CANH2

CANL2

i(cm)

CC/2

−

i(cm)

GNDRx0

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AMIS−42770

TYPICAL APPLICATION

Application Description

AMIS−42770 is especially designed to provide the link between a CAN controller (protocol IC) and two physical busses. It is able to operate in three different modes:

• Dual CAN

• A CAN−bus extender

• A CAN−bus repeater

Application Schematics

VBAT

5 V−reg

VBAT

5 V−reg

VCC

CAN

controller

100 nF

EN1 EN2

Rx0 Tx0

Text

Rint

VCC

7 4 3 9

AMIS−42770

6 15 16 17

Vref

GND

CANH1

CANL1

CANH2

CANL2

R 60 W

Figure 2. Application Diagram CAN−bus Repeater

100 nF100 nF

AMIS−42770

6 15 16 17

Vref

GND

VCC

4 3

EN1 EN2 Rx0

Tx0

Text

Rint

CANH1

CANL1

CANH2

CANL2

60 W

CAN BUS 2CAN BUS 1

Figure 3. Application Diagram Dual−CAN

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AMIS−42770

VBAT

5 V−reg

VCC

CAN

controller

GND

OptoCoupler

Dual

EN1 EN2

Rx0 Tx0

Text

Rint

VCC

2 7 4 3 9

EN1 EN2

Rx0 Tx0

Text

Rint

AMIS−42770

6 15 16 17

VCC

2 7 4 3 9

100 nF100 nF

AMIS−42770

6 15 16 17

100 nF

Vref

GND

CANH1

CANL1

CANH2

CANL2

isolated +5

Vref

GND

60 W

CANH1

CANL1

CANH2

CANL2

60 W

CAN BUS 2CAN BUS 1

CAN BUS 4CAN BUS 3

Figure 4. Application Diagram CAN−bus Extender

EN2

Text

Tx0 GND GND

Rx0

Vref1

Rint

EN1

2 3 4

AMIS−42770

5 6 7 8 9

201 19 18 17 16 15 14 13 12 11

NC CANH2 CANL2 GND GND GND CANL1 CANH1 VCC NC

Figure 5. Pin Out (top view)

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AMIS−42770

Table 2. PIN DESCRIPTION

Pin Name Description

1 NC Not connected 2 ENB2 Enable input, bus system 2; internal pull−up 3 Text Multi−system transmitter Input; internal pull−up 4 Tx0 Transmitter input; internal pull−up 5 GND Ground connection (Note 2) 6 GND Ground connection (Note 2) 7 Rx0 Receiver output 8 V

9 Rint Multi−system receiver output 10 ENB1 Enable input, bus system 1; internal pull−up 11 NC Not connected 12 VCC Positive supply voltage 13 CANH1 CANH transceiver I/O bus system 1 14 CANL1 CANL transceiver I/O bus system 1 15 GND Ground connection (Note 2) 16 GND Ground connection (Note 2) 17 GND Ground connection (Note 2) 18 CANL2 CANL transceiver I/O bus system 2 19 CANH2 CANH transceiver I/O bus system 2 20 NC Not connected

2. In order to ensure the chip performance, all these pins need to be connected to GND on the PCB.

REF1

Reference voltage

FUNCTIONAL DESCRIPTION

Overall Functional Description

AMIS−42770 is specially designed to provide the link between the protocol IC (CAN controller) and two physical bus lines. Data interchange between those two bus lines is realized via the logic unit inside the chip. To provide an independent switch−off of the transceiver units for both bus systems by a third device (e.g. the °C), enable−inputs for the corresponding driving and receiving sections are provided. As long as both lines are enabled, they appear as one logical bus to all nodes connected to either of them.

The bus lines can have two logical states, dominant or recessive. A bus is in the recessive state when the driving sections of all transceivers connected to the bus are passive. The differential voltage between the two wires is approximately zero. If at least one driver is active, the bus changes into the dominant state. This state is represented by a differential voltage greater than a minimum threshold and therefore by a current flow through the terminating resistors of the bus line. The recessive state is overwritten by the dominant state.

In case a fault (like short circuit) is present on one of the bus lines, it remains limited to that bus line where it occurs. Data interchange from the protocol IC to the other bus system and on this bus system itself can be continued.

AMIS−42770 can be also used for only one bus system. If the connections for the second bus system are simply left open it serves as a single transceiver for an electronic unit. For correct operation, it is necessary to terminate the open bus by the proper termination resistor.

Logic Unit and CAN Controller Interface

The logic unit inside AMIS−42770 provides data transfer from/to the digital interface to/from the two busses and from one bus to the other bus. The detailed function of the logic unit is described in Table 3.

All digital input pins, including ENBx, have an internal pull−up resistor to ensure a recessive state when the input is not connected o r i s a ccidentally interrupted. A d ominant s tate on the bus line is represented by a low−level at the digital interface; a recessive state is represented by a high−level.

Dominant state received on any bus (if enabled) causes a dominant state on both busses, pin Rint and pin Rx0. Dominant signal o n a ny o f the i nput p ins T x0 and T ext c auses transmission of dominant on both bus lines (if enabled).

Digital inputs Tx0 and Text are used for connecting the internal logic’s of several IC’s to obtain versions with more than two bus outputs (see Figure 4). They have also a direct logical link to pins Rx0 and Rint independently on the EN1x pins – dominant on Tx0 is directly transferred to both Rx0 and Rint pins, dominant on T ext is only transferred to Rx0.

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