ON Semiconductor A5191HRTNGEVB User Manual

A5191HRTNGEVB

A5191HRTNGEVB
Evaluation Board User's
Manual

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EVAL BOARD USER’S MANUAL

Introduction

The A5191HRTNGEVB evaluation board includes all
external components needed for operating the
A5191HRT IC and demonstrates the small PCB surface area
such an implementation requires. The EVB allows easy
design of HART® implementations using A5191HRT.

Overview

The A5191HRT is a single−chip, CMOS modem for use
in highway addressable remote transducer (HART) field
instruments and masters. The modem and a few external
passive components provide all of the functions needed to
satisfy HART physical layer requirements including
modulation, demodulation, receive filtering, carrier detect,
and transmit−signal shaping.

The A5191HRT uses phase continuous frequency shift
keying (FSK) at 1200 bits per second. To conserve power the
receive circuits are disabled during transmit operations and
vice versa. This provides the half−duplex operation used in
HART communications.

Features

• Single−chip, Half−duplex 1200 Bits per Second FSK

Modem

• Bell 202 Shift Frequencies of 1200 Hz and 2200 Hz

• 3.0 V − 5.5 V Power Supply

• Transmit−signal Wave Shaping

• Receive Band−pass Filter

• Low Power: Optimal for Intrinsically Safe Applications

• Compatible with 3.3 V or 5 V Microcontroller

• Internal Oscillator Requires 460.8 kHz Crystal or

Ceramic Resonator

• Meets HART Physical Layer Requirements

• Industrial Temperature Range of −40°C to +85°C

• A vailable in 28−pin PLCC, 32−pin QFN and 32−pin

LQFP Packages

Applications

• HART Multiplexers

• HART Modem Interfaces

• 4 – 20 mA Loop Powered Transmitters

© Semiconductor Components Industries, LLC, 2016

July, 2016 − Rev. 5

Figure 1. A5191HRTNGEVB Evaluation Board

1 Publication Order Number:

EVBUM2130/D

A5191HRTNGEVB

ELECTRICAL CHARACTERISTICS

Table 1. ELECTRICAL CHARACTERISTICS OF THE A5191HRTNGEVB BOARD

Symbol Parameter / Condition

V

DD

CURRENT CONSUMPTION

I

DD

I

DD

I

DD

I

DD

TRANSMITTED FREQUENCY

f

M

f

S

LEVELS

V

TxA

V

CD

REFERENCE VOLTAGES

V

AREF

V

CDREF

Supply voltage 2.78 3 6.00 V

VDD = 2.78V, idle 417
VDD = 3.00 V, idle 420
VDD = 6.00V, idle 780
External clock, VDD = 3.00 V, idle 350

Mark “1” 1197 Hz
Space “0” 2194 Hz

Amplitude Transmit Output 500 mV
Carrier Detect Level 110 mV

AREF 1.212 V
CDREF 1.128 V

Min Typ Max

Value

Unit

mA
mA
mA
mA

pp
pp

A5191HRT DESCRIPTION

The A5191HRT modem is a single−chip CMOS modem
for use in HART field instruments and masters. It includes
on−chip oscillator and a modulator and demodulator module
communicating with a UART without internal buffer. The
A5191HRT requires some external filter components and a

460.8 kHz clock source. This clock source can either be the
interface oscillator by using a crystal or ceramic resonator,

When the device is transmitting data, the receive module
is shut down and vice versa to conserve power. With simple
power−saving maneuvers, the IC can be made to operate
with a current consumption of as little as 250 mA. For more
information related to this subject see the application note
AND9030 “A5191HRT Design for Low−Power
Environments”.

or an external clock signal.

TEST AND MEASUREMENT TOOLS

Listed below are the tools used to acquire the values presented in this Evaluation Board User’s Manual.

• Oscilloscope Tektronix DPO4034 350 MHz

• Signal Generator Agilent 33120A

• Network Analyzer AP Instruments 300

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Schematic Diagram

A5191HRTNGEVB

A5191HRTNGEVB DESCRIPTION

Figure 2. Schematic of A5191HRTNEVB

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A5191HRTNGEVB

BOM List

Table 2. A5191HRTNEVB BILL OF MATERIALS

Quantity Reference Value; Size Manufacturer & Comments

4 C1, C2, C4, C6 100 nF, 0603
3 C3, C5, C7 220 pF, 0603
2 C8, C9 1 nF, 0603
2 C10, C11 470 pF, 0603
3 FB1, FB2, FB3 600Z, 0805
3 IDC1, IDC2, IDC3 0.1” header, 10 pin
1 J1 Barrel connector Not populated
1 J2 SMB connector Not populated
4 R1, R2, R6, R21 200k, 0603
1 R3 0R, 0603
2 R4, R11 14k7, 0603
2 R7, R14 499k, 0603
3 R8, R16, R17 215k, 0603
1 R12 1k, 0603
1 R10 422k, 0603
1 R13 3M, 0603
1 R15 787k, 0603
1 R18 24k, 0603
1 R20 DNP, 0603 Not populated
1 U1 CAT808NTDI−27GT3 ON Semiconductor
1 U2 A5191HRT ON Semiconductor
1 U3 TLV431ASNT1G ON Semiconductor
1 Y1 460.8 kHz ECS Crystal ZTBF−460.8−E

General Overview

The A5191HRTNGEVB evaluation board demonstrates
the external components required for the operation of the IC.
We will cover the different sections below as well as possible

Figure 3. Board Drawing With Indication of Different Sections

alternatives. A drawing of the board where the different
sections are indicated is shown below.

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Power Supply and References

Power Supply

A5191HRTNGEVB

Figure 4. Supply Voltage and Power on Reset

The A5191HRTNGEVB is designed for a nominal
voltage of 3 V. However, A5191HRT can be operated up to
6 V. For optimal functioning of the board, the values of
several resistors should be changed for operation at voltages

Current consumption of the module is very limited,
making it ideal to be battery or loop−powered.
Measurements of the power consumption of the module are
listed in Table 3.

higher than 3 V. See the sections on reference voltages and
bias for more information on this.

Table 3. MODULE CURRENT CONSUMPTION

Symbol Condition Current Consumption

I

DD

I

DD

I

DD

I

DD

I

DD

I

DD

I

DD

I

DD

The module will use less power when clock signal is
applied externally, as this allows the modem to shut down
the oscillator circuit. As is to be expected, a higher supply
voltage increases current consumption.

It is advised to use a voltage supervisor such as CAT808
to prevent the modem to begin operation when the supply
voltage is not yet reliable. This will guarantee correct

VDD = 2.78 V, Transmit
VDD = 2.78 V, Receive
VDD = 3 V, Transmit
VDD = 3 V, Receive
VDD = 6 V, Transmit
VDD = 6 V, Receive
VDD = 3 V, Transmit, Ext. Osc.
VDD = 3 V, Receive, Ext. Osc.

428 mA
417 mA
443 mA
419 mA
837 mA
781 mA
362 mA
350 mA

The voltage supervisor will keep the RESETB pin low
until its threshold value is reached (2.7 V on the
A5191HRTNGEVB). This ensures that some time has
passed after the supply voltage reaches the turn−on voltage
level of 2.5 V.

The RESETB and VDD pin signals during startup are
shown in Figure 5. The measured start−up delay is 2.6 ms.

operation of the digital circuitry.

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A5191HRTNGEVB

Figure 5. Power and RESETB Waveform During Startup, Showing 2.63 ms Startup Delay

C1, C2 and C6 are 100 nF ceramic decoupling capacitors
located directly adjacent to each power pin. For analog
power pins, an additional large−value ceramic capacitor
may be needed in addition to the 100 nF decoupling
capacitor when the application is intended for high−noise
environments.

For loop powered devices, additional decoupling with a
large value capacitor is advised to prevent digital noise from
being transmitted on the current loop.

The ferrite beads FB1, FB2 and FB3 in series with power
supply lines help to reduce EMI.

Reference voltages and comparator bias

A5191HRT needs an external analog reference voltage
for the receiver or demodulator (RX) comparator and carrier
detect (CD).

The AREF reference voltage sets the trip point of the
demodulation operational amplifier of the 5191HRT. The
AREF reference voltage is also used in setting the DC
operating point of the received signal after it has passed
through the band−pass receive filter. The ideal value for the
AREF reference voltage depends on the voltage supply, and
is chosen roughly half−way the operating range of the
operational amplifiers. This ensures the range of the
operational amplifier is maximized. For operation at 3 V, a

1.24 V reference voltage is recommended. For operation at
5 V, a 2.5 V reference voltage is recommended.

For A5191HRTNGEVB, the TLV431 shunt regulator is
used with an internal reference of 1.24 V. This reference is

compared against the output voltage, and the shunt transistor
base is adjusted until it sinks enough current to drop the
output to 1.24 V.

A simple low pass filter formed by R12 and C11 is added
to increase reference stability. A slight voltage drop is
observed over this filter caused by loading of the reference
voltage. However, the voltage drop

and the influence on the

operation of the IC is minimal. Measurements show a
voltage drop of 22 mV over R12, indicating a current of 22
mA. Of this current ca. 5 mA is consumed by the CDREF
resistor division. The rest (ca. 17 mA) is used internally by
the IC through the AREF pin. Current consumption through
the CDREF pin is negligible.

The CDREF reference voltage sets the threshold for the
carrier detect comparator. As the received signal is biased at
AREF, the difference between CDREF and AREF will
determine the minimum amplitude needed for the carrier
detect comparator to flip. A (AREF−CDREF) of 80 mV
corresponds to signal of approximately 100 mV
peak−to−peak at the input of the receive filter. The CDREF
reference voltage on the A5191HRTNGEVB is generated
by a resistor division of the AREF reference. This will create
an extra load on the low pass filter of AREF. However, the
drop on the resistor of the low pass can be considered
negligible.

An external resistor is required to set the bias current. The
voltage over the bias resistor is regulated to AREF, so that
the resistor determines a bias current. This bias current

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