ON Semiconductor 74FST3257 User Manual

74FST3257
Quad 2:1 Multiplexer/ Demultiplexer Bus Switch
The ON Semiconductor 74FST3257 is a quad 2:1, high performance multiplexer/demultiplexer bus switch. The device is CMOS TTL compatible when operating between 4 and 5.5 Volts. The device exhibits extremely low R The device adds no noise or ground bounce to the system.
Features
R
t 4 W Typical
ON
Less Than 0.25 ns−Max Delay Through Switch
Nearly Zero Standby Current
No Circuit Bounce
Control Inputs are TTL/CMOS Compatible
Pin−For−Pin Compatible With QS3257, FST3257, CBT3257
All Popular Packages: SOIC−16, TSSOP−16, QFN16
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
and adds nearly zero propagation delay.
ON
16
SOIC−16
D SUFFIX
CASE 751B
16
TSSOP−16 DT SUFFIX
CASE 948F
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16
1
1
MARKING
DIAGRAMS
FST3257G
AWLYWW
1
16
FST
3257
ALYW G
G
1
SV
1
1B
2
1
1B
3
2
1A
4
2B
5
1
2B
6
2
2A
7
GND 3A
89
16 15 14 13 12 11 10
OE 4B
4B
4A 3B
3B
CC
1B
1 2
1
2
1B
1A
2B 2B
2A
Figure 1. 16−Lead Pinout Diagrams
S
X L H
OE
H
L L
Function
Disconnect
Figure 2. Truth Table
2
1
3
2
4 5
1
6
2
7
A = B A = B
V
S
CC
1
16
GND
89
GND 3A
1 2
15 14 13 12 11 10
OE 4B
4B
4A 3B
3B
1
QFN16
MN SUFFIX
1 2
1
2
CASE 485AW
A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package
(Note: Microdot may be in either location)
3257
ALYWG
G
PIN NAMES
Pin
OE1, OE
B1, B2, B3, B
2
S0, S
1
A Bus A
4
Description
Bus Switch Enables
Select Inputs
Bus B
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
May, 2018 − Rev. 8
1 Publication Order Number:
74FST3257/D
74FST3257
1A
2A
3A
4A
FLOW CONTROL
1B
1B
2B
2B
3B
3B
4B
4B
OE
S
2
1
2
1
2
1
2
Figure 3. Logic Diagram
ORDERING INFORMATION
Device Order Number Package Shipping
74FST3257DR2G NLV74FST3257DR2G* 74FST3257DTR2G TSSOP−16
SOIC−16
(Pb−Free)
2500 Units / Tape & Reel
2500 Units / Tape & Reel
(Pb−Free)
74FST3257MNTWG QFN16
3000 Units / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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2
74FST3257
MAXIMUM RATINGS
Symbol Parameter Value Units
V
CC
V
V
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T T
q
JA
MSL Moisture Sensitivity Level 1
F
V
ESD
I
Latchup
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
DC Supply Voltage −0.5 to +7.0 V DC Input Voltage −0.5 to +7.0 V
I
DC Output Voltage −0.5 to +7.0 V
O
DC Input Diode Current
V
t GND −50
I
DC Output Diode Current
V
t GND −50
O
DC Output Sink Current 128 mA DC Supply Current per Supply Pin ±100 mA DC Ground Current per Ground Pin ±100 mA Storage Temperature Range −65 to +150 Lead Temperature, 1 mm from Case for 10 Seconds 260
L
Junction Temperature Under Bias +150
J
Thermal Resistance
Flammability Rating
R
SOIC TSSOP QFN
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
125 170 N/A
ESD Withstand Voltage
Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3)
u2000
u200
N/A
Latchup Performance
Above V
and Below GND at 85_C (Note 4)
CC
±500
mA
mA
_C _C _C
_C/W
V
mA
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Units
V
CC
V
V
T
Dt/DV
Supply Voltage
Operating, Data Retention Only
Input Voltage (Note 5) 0 5.5 V
I
Output Voltage (HIGH or LOW State) 0 5.5 V
O
Operating Free−Air Temperature −40 +85
A
4.0 5.5
Input Transition Rise or Fall Rate Switch Control Input Switch I/O V
= 5.0 V ± 0.5 V
CC
0
DC
5
5. Unused control inputs may not be left open. All control inputs must be tied to a high or low logic input voltage level.
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3
V
_C
ns/V
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