ON NUP4201MR6 Schematic [ru]
NUP4201MR6
Transient Voltage
Suppressors
ESD Protection Diodes with Low
Clamping Voltage
The NUP4201MR6 transient voltage suppressor is designed to
protect high speed data lines from ESD, EFT, and lighting.
Features
• Low Clamping Voltage
• Stand−Off Voltage: 5 V
• Low Leakage
• TSOP−6 is footprint compatible with SC−74, SC−59 6 Lead and
SOT−23 6 Lead
• Protection for the Following IEC Standards:
IEC 61000−4−2 Level 4 ESD Protection
• UL Flammability Rating of 94 V−0
• Pb−Free Package is Available
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TSOP−6 LOW CAPACITANCE
DIODE TVS ARRAY
500 WATTS PEAK POWER
6 VOLTS
PIN CONFIGURATION
AND SCHEMATIC
I/O 1
VN 2
6 I/O
5 V
P
Typical Applications
• High Speed Communication Line Protection
• USB 1.1 and 2.0 Power and Data Line Protection
• Digital Video Interface (DVI)
• Monitors and Flat Panel Displays
MAXIMUM RATINGS (T
Rating Symbol Value Unit
Peak Power Dissipation
8 x 20 mS @ TA = 25°C (Note 1)
Operating Junction Temperature Range T
Storage Temperature Range T
Lead Solder Temperature −
Maximum (10 Seconds)
NUP4201MR6T1
NUP4201MR6T1G
Human Body Model (HBM)
Machine Model (MM)
IEC 61000−4−2 Air (ESD)
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−4 (5/50 ns) EFT 40 A
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Non−repetitive current pulse per Figure 5 (Pin 5 to Pin 2)
See Application Note AND8308/D for further description of
survivability specs.
= 25°C unless otherwise noted)
J
P
pk
J
stg
T
L
ESD 16000
500 W
−40 to +125 °C
−55 to +150 °C
235
260
400
20000
20000
°C
°C
V
I/O 3
6
1
TSOP−6
CASE 318G
PLASTIC
MARKING DIAGRAM
M
63
G
63 = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary
depending upon manufacturing location.
ORDERING INFORMATION
Device Package Shipping
NUP4201MR6T1 TSOP−6 3000/Tape & Reel
NUP4201MR6T1G TSOP−6
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
(Pb−Free)
4 I/O
G
3000/Tape & Reel
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 5
1 Publication Order Number:
NUP4201MR6/D
NUP4201MR6
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
I
V
V
RWM
V
V
P
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T
Reverse Working Voltage V
Breakdown Voltage V
Reverse Leakage Current I
Clamping Voltage V
Clamping Voltage V
Maximum Peak Pulse Current I
Junction Capacitance C
Junction Capacitance C
Clamping Voltage V
Clamping Voltage V
2. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT.
4. Non−repetitive current pulse per Figure 5 (Pin 5 to Pin 2)
5. Non−repetitive current pulse per FIgure 5 (Any I/O Pins)
6. Surge current waveform per Figure 5.
7. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Maximum Reverse Peak Pulse Current
PP
Clamping Voltage @ I
C
Working Peak Reverse Voltage
I
Maximum Reverse Leakage Current @ V
R
Breakdown Voltage @ I
BR
I
Test Current
T
I
Forward Current
F
Forward Voltage @ I
F
Peak Power Dissipation
pk
PP
VCV
RWM
T
F
C Capacitance @ VR = 0 and f = 1.0 MHz
=25°C unless otherwise specified)
J
Parameter Symbol Conditions Min Typ Max Unit
RWM
(Note 2) 5.0 V
IT=1 mA, (Note 3) 6.0 V
BR
V
R
C
C
PP
J
J
C
C
= 5 V 5.0
RWM
IPP = 5 A (Note 4) 12.5 V
IPP = 8 A (Note 4) 20 V
8x20 ms Waveform (Note 4)
VR = 0 V, f=1 MHz between I/O Pins and GND 3.0 5.0 pF
VR = 0 V, f=1 MHz between I/O Pins 1.5 3.0 pF
@ IPP = 1 A (Notes 5 and 6) 16.6 V
Per IEC 61000−4−2 (Note 7) Figure 1 and 2 V
I
I
F
V
RWM
BR
I
V
R
F
I
T
I
PP
Uni−Directional TVS
25 A
), which should be equal or greater than the DC
RWM
V
mA
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
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Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
2
NUP4201MR6
IEC 61000−4−2 Spec.
Test
Voltage
Level
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
(kV)
ESD Gun
First Peak
Current
(A)
Current at
30 ns (A)
TVS
50 W
Cable
IEC61000−4−2 Waveform
I
peak
Current at
60 ns (A)
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 3. IEC61000−4−2 Spec
Oscilloscope
50 W
tP = 0.7 ns to 1 ns
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
90
80
70
60
50
40
30
20
% OF PEAK PULSE CURRENT
10
0
020406080
PEAK VALUE I
t
P
Figure 5. 8 X 20 ms Pulse Waveform
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
@ 8 ms
RSM
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I
t, TIME (ms)
/2 @ 20 ms
RSM
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