ON NCP3064BDR2G, NCP3064DR2G, NCV3064DR2G, NCP3064BMNTXG, NCP3064BPG Schematics

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NCP3064, NCP3064B, NCV3064

1.5 A, Step-Up/Down/ Inverting Switching Regulator with ON/OFF Function

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The NCP3064 Series is a higher frequency upgrade to the popular MC33063A and MC34063A monolithic DC−DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series was specifically designed to be incorporated in Step−Down and Step−Up and Voltage−Inverting applications with a minimum number of external components. The ON/OFF

pin provides a low power

shutdown mode.

Features

• Input Voltage Range from 3.0 V to 40 V

• Logic Level Shutdown Capability

• Low Power Standby Mode, Typical 100 mA

• Output Switch Current to 1.5 A

• Adjustable Output Voltage Range

• 150 kHz Frequency Operation

• Precision 1.5% Reference

• Internal Thermal Shutdown Protection

• Cycle−by−Cycle Current Limiting

• NCV Prefix for Automotive and Other Applications Requiring Site

and Control Changes

• These are Pb−Free Devices

Applications

• Step−Down, Step−Up and Inverting supply applications

• High Power LED Lighting

• Battery Chargers

ON/OFF

GND

sense

ON/OFF

Ipk

NCP3064

SWC

ÇÇ

SWE

ÇÇ

GND

ÇÇ

OUT

GND

DIAGRAMS

SOIC−8

D SUFFIX

CASE 751

PDIP−8

P, P1 SUFFIX

CASE 626

DFN8

MN SUFFIX

CASE 488AF

NCP3064 = Specific Device Code x=B A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package

(Note: Microdot may be in either location)

MARKING

3064x

ALYWG

V3064

ALYWG

NCP3064x

AWL

YYWWG

NCV3064

AWL

YYWWG

NCP

3064x

ALYWG

NCV 3064

ALYWG

Figure 1. Typical Buck Application Circuit

July, 2009 − Rev. 8

See detailed ordering and shipping information in the package

ORDERING INFORMATION

dimensions section on page 17 of this data sheet.

1 Publication Order Number:

NCP3064/D

NCP3064, NCP3064B, NCV3064

SOIC−8/PDIP−8 DFN8

Switch Collector

Switch Emitter

Timing Capacitor

GND

(Top View)

Figure 2. Pin Connections

ON/OFF

Ipk Sense

ON/OFF

Bias

Comparator

−

0.2 V

ON/OFF

Ipk Sense

Comparator Inverting Input

Switch Collector

Switch Emitter

Timing Capacitor

GND

NOTE: EP Flag must be tied to GND Pin 4 on PCB

EP Flag

(Top View)

ON/OFF

Ipk Sense

Comparator Inverting Input

Figure 3. Pin Connections

TSD

Switch Collector

Switch Emitter

Timing Capacitor

Oscillator

Comparator

Comparator Inverting Input

1.25 V

−

Reference

Regulator

GND

Figure 4. Block Diagram

PIN DESCRIPTION

Pin No. Pin Name Description

1 Switch Collector Internal Darlington switch collector

2 Switch Emitter Internal Darlington switch emitter

3 Timing Capacitor Timing Capacitor Oscillator Input, Timing Capacitor

4 GND Ground pin for all internal circuits

5 Comparator

6 V

7 Ipk Sense Peak Current Sense Input to monitor the voltage drop across an external resistor to limit the peak

8 ON/OFF ON/OFF Pin. Pulling this pin to High level turns the device in Operating. To switch into mode with

Inverting Input

Inverting input pin of internal comparator

Voltage supply

current through the circuit

low current consumption this pin has to be in Low level or floating.

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NCP3064, NCP3064B, NCV3064

MAXIMUM RATINGS (measured vs. Pin 4, unless otherwise noted)

RATING

VCC (Pin 6) V

Comparator Inverting Input (Pin 5) V

Darlington Switch Emitter (Pin 2) (Transistor OFF) V

Darlington Switch Collector (Pin 1) V

Darlington Switch Collector to Emitter (Pins 1 and 2) V

Darlington Switch Peak Current I

Ipk Sense Voltage (Pin 7) V

Timing Capacitor Pin Voltage (Pin 3) V

Moisture Sensitivity Level MSL 1

Lead Temperature Soldering

Reflow (SMD Styles Only), Pb−Free Versions

ON/OFF Pin Voltage V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

THERMAL CHARACTERISTIC

Rating Symbol Value Unit

PDIP−8 (Note 5) Thermal Resistance Junction−to−Air

SOIC−8 (Note 5) Thermal Resistance Junction−to−Air

DFN−8 (Note 5) Thermal Resistance Junction−to−Air

Storage temperature range T

Maximum junction temperature T

Operation Junction Temperature Range (Note 3) NCP3064

1. This device series contains ESD protection and exceeds the following tests:

Pins 1 through 8:

Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115 Machine Model Method 200 V

2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.

3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is T

4. The pins which are not defined may not be loaded by external signals.

5. 1 oz copper, 1 in

copper area.

Thermal Resistance Junction−to−Case

NCP3064B, NCV3064

SYMBOL VALUE UNIT

CII

SWE

SWC

SWCE

IPK

SLD

ON/OFF

STG

J MAX

−0.3 to 42 V

−0.3 to V

−0.6 to V

−0.3 to 42 V

1.5 A

−0.3 to (VCC + 0.3 V) V

−0.2 to +1.4 V

260

(−0.3 to 25) < V

100 °C/W

180

°C/W

−65 to +150 °C

+150 °C

0 to +70

−40 to +125

= TA + RQ @ PD.

°C

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NCP3064, NCP3064B, NCV3064

ELECTRICAL CHARACTERISTICS (V

= 5.0 V, −40°C < TJ < +125°C for NCP3064B and NCV3064, 0°C < TJ < +70°C for

NCP3064 unless otherwise specified)

Symbol

Characteristic Conditions Min Ty p Max Unit

OSCILLATOR

OSC

DISCHG

CHG

DISCH

IPK

Frequency (V

Discharge to Charge Current Ratio (Pin 7 to VCC, TJ = 25°C) 5.5 6.0 6.5 −

Capacitor Charging Current (Pin 7 to VCC, TJ = 25°C) 275

Capacitor Discharging Current (Pin 7 to VCC, TJ = 25°C) 1.65 mA

Current Limit Sense Voltage (TJ = 25°C) 165 200 235 mV

5 = 0 V, CT = 2.2 nF,

= 25°C)

110 150 190 kHz

OUTPUT SWITCH (Note 6)

SWCE

C(OFF)

Darlington Switch Collector to Emitter Voltage Drop

(ISW = 1.0 A, TJ = 25°C)

(Note 6)

1.0 1.3 V

Collector Off−State Current (VCE = 40 V) 1.0 10

COMPARATOR

Threshold Voltage

TJ = 25°C 1.25 V

NCP3064 −1.5 +1.5 %

NCP3064B, NCV3064 −1.5 +1.5 %

REG

CII in

Threshold Voltage Line Regulation (VCC = 3.0 V to 40 V) −6.0 2.0 6.0 mV

LiNE

Input Bias Current (Vin = Vth) −1000 −100 1000 nA

ON/OFF FEATURE

ON/OFF Pin Logic Input Level High V

= Nominal Output Voltage

OUT

ON/OFF Pin Logic Input Level Low V

= 0 V

OUT

ON/OFF Pin Input Current ON/OFF

Pin = 5 V (ON)

ON/OFF Pin Input Current ON/OFF

Pin = 0 V (OFF)

TJ = 25°C

= −40°C to +125°C

TJ = 25°C

= −40°C to +125°C

2.2

2.4

−

TJ = 25°C 15

TJ = 25°C 1.0

−

1.0

0.8

TOTAL DEVICE

STBY

SHD

SHDHYS

Supply Current (VCC = 5.0 V to 40 V,

CT = 2.2 nF, Pin 7 = V

5 > Vth, Pin 2 = GND,

remaining pins open)

Standby Quiescent Current ON/OFF Pin = 0 V (OFF)

= 25°C

= −40°C to +125°C

85 100

Thermal Shutdown Threshold 160 °C

Hysteresis 10 °C

7.0 mA

100

6. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.

7. The V

depends on comparator response time and di/dt current slope. See the Operating Description section for details.

(Sense) Current Limit Sense Voltage is specified at static conditions. In dynamic operation the sensed current turn−off value

IPK

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NCP3064, NCP3064B, NCV3064

350

300

250

200

150

100

OSCILATOR FREQUENCY (kHz)

0 1 2 3 4 5 6 7 8 9 1011 121314 1516 171819 2021

CT, CAPACITANCE (nF)

Figure 5. Oscilator Frequency vs. Timing

Capacitor C

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

1.5

1.4

1.3

VOLTAGE DROP (V)

1.2

1.1

1.0

0.9

−40 −20 0 20 40 60 80 100 120 140

1 A

0.75 A

0.5 A

ICE = 0.25 A

, JUNCTION TEMPERATURE (°C)

1.25 A

Figure 7. Emitter Follower Configuration Output Darlington Switch Voltage Drop vs. Temperature

150

CT = 2.2 nF T

145

140

135

130

FREQUENCY (kHz)

125

120

= 25°C

0 5 10 15 20 25 30 35 4

VCC, SUPPLY VOLTAGE (V)

Figure 6. Oscillator Frequency vs. Supply

Voltage

1.3

1.2

1.1

1.0

0.9

0.8

VOLTAGE DROP (V)

0.7

0.6

−40 −20 0 20 40 60 80 100 120 140

0.75 A

0.5 A

ICE = 0.25 A

, JUNCTION TEMPERATURE (°C)

1 A

1.25 A

Figure 8. Common Emmitter Configuration Out

Darlington Switch Voltage Drop vs. Temperatur

1.29

1.27

1.25

1.23

1.21

COMP. THRESHOLD VOLTAGE (V)

1.19

−40 −20 0 20 40 60 80 100 120 140

, JUNCTION TEMPERATURE (°C)

Figure 9. Comparator Threshold Voltage vs.

Temperature

1.6

1.5

1.4

1.3

1.2

1.1

ON/OFF COMP. THRESHOLD VOLTAGE (V)

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−40 −20 0 20 40 60 80 100 120 14

, JUNCTION TEMPERATURE (°C)

Figure 10. ON/OFF Comparator Threshold

Voltage vs. Temperature

NCP3064, NCP3064B, NCV3064

0.20

0.19

0.18

0.17

VOLTAGE (V)

, CURRENT LIMIT SENSE

0.16

ipk

0.15

−40 −20 0 20 40 60 80 100 120 140

TJ, JUNCTION TEMPERATURE (°C)

Figure 11. Current Limit Sense Voltage vs.

Temperature

450

400

350

300

250

200

150

100

STANDBY SUPPLY CURRENT (mA)

0 5 10 15 20 25 30 35 40

VIN, INPUT VOLTAGE (V)

Figure 12. Standby Current vs. Supply Voltage

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NCP3064, NCP3064B, NCV3064

INTRODUCTION

The NCP3064 is a monolithic power switching regulator optimized for dc to dc converter applications. The combination of its features enables the system designer to directly implement step−up, step−down, and voltage−inverting converters with a minimum number of external components. Potential applications include cost sensitive consumer products as well as equipment for industrial markets. A representative block diagram is shown in Figure 4.

Operating Description

The NCP3064 is a hysteric, dc−dc converter that uses a gated oscillator to regulate output voltage. In general, this mode of operation is some what analogous to a capacitor charge pump and does not require dominant pole loop compensation for converter stability. The Typical Operating Waveforms are shown in Figure 13. The output voltage waveform shown is for a step−down converter with the ripple and phasing exaggerated for clarity. During initial converter startup, the feedback comparator senses that the output voltage level is below nominal. This causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator, thus pumping up the output filter

capacitor. When the output voltage level reaches nominal, the output switch next cycle turning on is inhibited. The feedback comparator will enable the switching immediately when the load current causes the output voltage to fall below nominal. Under these conditions, output switch conduction can be enabled for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles.

Oscillator

The oscillator frequency and off−time of the output switch are programmed by the value selected for the timing capacitor C

. Capacitor CT is charged and discharged by a

1 to 6 ratio internal current source and sink, generating a positive going sawtooth waveform at Pin 3. This ratio sets the maximum t

/(tON + t

) of the switching converter as

OFF

6/(6 + 1) or 0.857 (typical).

The oscillator peak and valley voltage difference is 500 mV typically. To calculate the C

capacitor value for the

required oscillator frequency, use the equation found in Figure 15. An Excel® based design tool can be found at www.onsemi.com

on the NCP3064 product page.

Figure 13. Typical Operating Waveform

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