ON NCP551SN15T1G, NCP551SN18T1G, NCP551SN25T1G, NCP551SN27T1G, NCP551SN28T1G Schematic [ru]
...
NCP551, NCV551
150 mA CMOS Low Iq
Low-Dropout Voltage
Regulator
The NCP551 series of fixed output low dropout linear regulators are
designed for handheld communication equipment and portable battery
powered applications which require low quiescent. The NCP551
series features an ultra−low quiescent current of 4.0 mA. Each device
contains a voltage reference unit, an error amplifier, a PMOS power
transistor, resistors for setting output voltage, current limit, and
temperature limit protection circuits.
The NCP551 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 0.1 mF. The
device is housed in the TSOP−5 surface mount package. Standard
voltage versions are 1.4, 1.5, 1.8, 2.5, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3,
3.6, 3.8 and 5.0 V. Other voltages are available in 100 mV steps.
Features
• Low Quiescent Current of 4.0 mA Typical
• Maximum Operating Voltage of 12 V
• Low Output Voltage Option
• High Accuracy Output Voltage of 2.0%
• Industrial Temperature Range of −40°C to 85°C
(NCV551, T
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Battery Powered Instruments
• Hand−Held Instruments
• Camcorders and Cameras
V
= −40°C to +125°C)
A
in
1
V
out
5
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5
1
TSOP−5
(SOT23−5, SC59−5)
SN SUFFIX
CASE 483
PIN CONNECTIONS AND
MARKING DIAGRAM
1
V
in
2GND
Enable
xxx = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
3
ORDERING INFORMATION
xxxAYWG
G
(Top View)
V
5
out
N/C
4
Thermal
Shutdown
Enable
OFF
© Semiconductor Components Industries, LLC, 2016
January , 2016 − Rev. 19
ON
3
Figure 1. Representative Block Diagram
Driver w/
Current
Limit
GND
2
1 Publication Order Number:
NCP551/D
NCP551, NCV551
PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4
5
MAXIMUM RATINGS
Input Voltage
Enable Voltage V
Output Voltage
Power Dissipation P
Operating Junction Temperature
Operating Ambient Temperature NCP551
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
Charge Device Model (CDM) tested C3B per EIA/JESD22−C101.
2. Latchup capability (85°C) "100 mA DC with trigger voltage.
Pin Name
V
in
GND
Enable
N/C
V
out
Description
Positive power supply input voltage.
Power supply ground.
This input is used to place the device into low−power standby. When this input is pulled low, the
device is disabled. If this function is not used, Enable should be connected to V
.
in
No Internal Connection.
Regulated output voltage.
Rating Symbol Value Unit
NCV551
V
in
EN
V
out
D
T
J
T
A
T
stg
0 to 12
−0.3 to V
−0.3 to V
+0.3 V
in
+0.3
in
Internally Limited W
+150
−40 to +85
°C
°C
−40 to +125
−55 to +150
°C
V
V
THERMAL CHARACTERISTICS
Rating Symbol Test Conditions Typical Value Unit
Junction−to−Ambient
PSIJ−Lead 2
R
q
JA
Y
J−L2
1 oz Copper Thickness, 100 mm
1 oz Copper Thickness, 100 mm
NOTE: Single component mounted on an 80 x 80 x 1.5 mm FR4 PCB with stated copper head spreading area. Using the following
boundary conditions as stated in EIA/JESD 51−1, 2, 3, 7, 12.
2
2
250
°C/W
68 °C/W
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2
NCP551, NCV551
ELECTRICAL CHARACTERISTICS
(V
= V
in
Output Voltage (TA = 25°C, I
1.4 V
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
3.6 V
3.8 V
5.0 V
Output Voltage (TA = T
1.4 V
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
3.6 V
3.8 V
5.0 V
Line Regulation (Vin = V
Load Regulation (I
Output Current (V
1.4 V−2.0 V (V
2.1 V−3.0 V (V
3.1 V−4.0 V (V
4.1 V−5.0 V (V
Dropout Voltage (I
1.4 V
1.5 V, 1.8 V, 2.5 V
2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 3.2 V, 3.3 V, 3.6 V, 3.8 V, 5.0 V
Quiescent Current
(Enable Input = 0 V)
(Enable Input = Vin, I
1.4 V−2.0 V options, V
2.1 V−3.0 V options, V
3.1 V−4.0 V options, V
4.1 V−5.0 V options, V
Output Voltage Temperature Coefficient T
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
+ 1.0 V, VEN = Vin, Cin = 1.0 mF, C
out(nom.)
Characteristic
= 10 mA)
out
to T
low
high
+ 1.0 V to 12 V, I
out
= 10 mA to 150 mA, Vin = V
out
= (V
out
= 4.0 V)
in
= 5.0 V)
in
= 6.0 V)
in
= 8.0 V)
in
out
at I
out
= 10 mA, Measured at V
= 1.0 mA to I
out
= 4.0 V
in
= 5.0 V
in
= 6.0 V
in
= 8.0 V
in
, I
= 10 mA)
out
= 100 mA) −3%)
out
o(nom.)
= 1.0 mF, TA = 25°C, unless otherwise noted.)
out
= 10 mA) Reg
out
+ 2.0 V) Reg
out
−3.0%)
out
)
Symbol Min Typ Max Unit
V
V
I
o(nom.)
Vin−V
I
V
th(en)
out
out
line
load
out
Q
c
1.358
1.455
1.746
2.425
2.646
2.744
2.842
2.940
3.038
3.136
3.234
3.528
3.724
4.90
1.344
1.440
1.728
2.400
2.619
2.716
2.813
2.910
3.007
3.104
3.201
3.492
3.686
4.850
1.4
1.5
1.8
2.5
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.6
3.8
5.0
1.4
1.5
1.8
2.5
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.6
3.8
5.0
1.442
1.545
1.854
2.575
2.754
2.856
2.958
3.060
3.162
3.264
3.366
3.672
3.876
5.10
1.456
1.560
1.872
2.600
2.781
2.884
2.987
3.090
3.193
3.296
3.399
3.708
3.914
5.150
− 10 30 mV
− 40 65 mV
150
150
150
150
−
−
−
−
−
−
−
−
−
170
130
40
0.1
4.0
−
−
−
−
250
220
150
1.0
8.0
− "100 − ppm/°C
1.3
−
−
−
−
0.3
V
V
mA
mV
mA
V
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3
NCP551, NCV551
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
in
Output Short Circuit Current (V
1.4 V−2.0 V (V
2.1 V−3.0 V (V
3.1 V−4.0 V (V
4.1 V−5.0 V (V
3. Maximum package power dissipation limits must be observed.
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. NCP551 T
NCV551 T
+ 1.0 V, VEN = Vin, Cin = 1.0 mF, C
out(nom.)
= 4.0 V)
in
= 5.0 V)
in
= 6.0 V)
in
= 8.0 V)
in
T
J(max)
PD +
= −40°CT
low
= −40°CT
low
out
R
= 0 V)
qJA
high
high
* T
A
= +85°C
= +125°C.
= 1.0 mF, TA = 25°C, unless otherwise noted.)
out
I
out(max)
160
160
160
160
350
350
350
350
600
600
600
600
mA
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4
NCP551, NCV551
DEFINITIONS
Load Regulation
The change in output voltage for a change in output
current at a constant temperature.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output d rops 3 % b elow its
nominal. The junction temperature, load current, and
minimum input supply r equirements a ffect t he d ropout l evel.
Maximum Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specifications.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias, etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
Line Regulation
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by u s i n g p u l s e t e c hnique such that the average
chip temperature is not significantly affected.
Line Transient Response
Typical over and undershoot response when input voltage
is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 160°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Package Power Dissipation
The maximum power package dissipation is the power
dissipation level at which the junction temperature reaches
its maximum operating value, i.e. 125°C. Depending on the
ambient power dissipation and thus the maximum available
output current.
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5
3.35
3.3
3.45
0
4
OUTPUT VOLTAGE
V
, INPUT
60
V
out
= 2.8 V
NCP551, NCV551
V
3.4
= 3.3 V
out
GROUND CURRENT (mA)
3.25
3.2
3.15
3.1
3.05
0
I
, OUTPUT CURRENT (mA)
out
755025
100 150125
GROUND CURRENT (mA)
3.35
3.3
3.25
3.2
3.15
Figure 2. Ground Pin Current versus
Output Current
4
3.5
3
2.5
2
1.5
1
GROUND PIN CURRENT (mA)
0.5
V
I
out(nom)
= 25 mA
out
= 2.8 V
0
086421012
14
Vin, INPUT VOLTAGE (VOLTS)
3.5
2.5
1.5
GROUND PIN CURRENT (mA)
0.5
0
I
, OUTPUT CURRENT (mA)
out
755025
100 15
125
Figure 3. Ground Pin Current versus
Output Current
4
3
2
1
0
086421012
, INPUT VOLTAGE (VOLTS)
V
in
V
out(nom)
= 25 mA
I
out
= 3.3 V
1
8
6
in
4
VOLTAGE (V)
400
200
0
−200
DEVIATION (mV)
−400
Figure 4. Ground Pin Current versus
Input Voltage
Vin = 3.8 V to 4.8 V
V
C
I
out
0
600
400200
800 1600
TIME (ms)
Figure 6. Line Transient Response Figure 7. Line Transient Response
= 2.8 V
out
= 1 mF
out
= 10 mA
12001000 1400
, INPUT
in
V
VOLTAGE (V)
400
200
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
−600
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6
Figure 5. Ground Pin Current versus
Input Voltage
6
4
0
0
600400200 800 1
TIME (ms)
Vin = 3.8 V to 4.8 V
= 2.8 V
V
out
C
= 1 mF
out
I
= 100 mA
out
12001000 1400
NCP551, NCV551
OUTPUT VOLTAGE
V
, INPUT
0
OUTPUT VOLTAGE
V
, INPUT
00
6
4
in
VOLTAGE (V)
400
200
0
−200
DEVIATION (mV)
−400
−600
6
4
in
800
VOLTAGE (V)
600
400
200
0
−200
DEVIATION (mV)
−400
−600
6
4
, INPUT
in
V
Vin = 3.8 V to 4.8 V
= 2.8 V
V
out
C
= 1 mF
out
I
= 150 mA
out
VOLTAGE (V)
400
200
Vin = 4.3 V to 5.3 V
= 3.3 V
V
out
C
= 1 mF
out
I
= 10 mA
out
0
−200
DEVIATION (mV)
−400
OUTPUT VOLTAGE
−600
0
600
400200
800 1600
12001000 1400
0
TIME (ms)
600400200 800 160
12001000 1400
TIME (ms)
Figure 8. Line Transient Response Figure 9. Line Transient Response
6
4
, INPUT
in
V
Vin = 4.3 V to 5.3 V
= 3.3 V
V
out
C
= 1 mF
out
I
= 100 mA
out
VOLTAGE (V)
600
400
200
0
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
−600
700 1900
500
300100
1100900 1700
15001300
TIME (ms)
0
400 800 20
TIME (ms)
Vin = 4.3 V to 5.3 V
= 3.3 V
V
out
C
= 1 mF
out
I
= 150 mA
out
1200
1600
150
, OUTPUT
out
I
CURRENT (mA)
0
0
−500
−1000
DEVIATION (mV)
OUTPUT VOLTAGE
0
Figure 10. Line Transient Response Figure 11. Line Transient Response
I
= 3.0 mA − 150 mA
out
V
= 2.8 V
out
C
= 10 mF
out
150
, OUTPUT
out
I
CURRENT (mA)
0
I
= 3.0 mA − 150 mA
out
V
C
= 2.8 V
out
= 10 mF
out
1000
500
0
−500
DEVIATION (mV)
321
456789
TIME (ms)
OUTPUT VOLTAGE
0321 456789
TIME (ms)
Figure 12. Load Transient Response ON Figure 13. Load Transient Response OFF
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7
150
00
2
, OUTPUT
out
I
CURRENT (mA)
0
1000
500
0
−500
DEVIATION (mV)
OUTPUT VOLTAGE
0321456789 0321 456789
I
out
V
C
TIME (ms)
NCP551, NCV551
= 3.0 mA − 150 mA
= 3.3 V
out
= 10 mF
out
I
150
, OUTPUT
out
I
CURRENT (mA)
0
−500
−1000
DEVIATION (mV)
OUTPUT VOLTAGE
= 3.0 mA − 150 mA
out
V
= 3.3 V
out
C
= 10 mF
out
TIME (ms)
3
2
1
ENABLE
0
VOLTAGE (V)
3
2
1
, OUTPUT
out
VOLTAGE (V)
V
0
0
3
2.5
2
1.5
1
, OUTPUT VOLTAGE (VOLTS)
0.5
out
V
0
0
Figure 14. Load Transient Response OFF
Vin = 4.3 V
= 3.3 V
V
out
R
= 3.3 k
O
V
= 2.0 V
EN
400200
600
Co = 1 mF
800 200012001000 1400
TIME (ms)
Co = 10 mF
1600 1800 0
Figure 16. T urn−On Response
Vin = 0 V to 12 V
V
I
C
C
V
642
V
, INPUT VOLTAGE (VOLTS)
in
out(nom)
= 10 mA
out
= 1 mF
in
= 1 mF
out
= V
EN
81210
= 2.8 V
in
3
2
1
ENABLE
0
VOLTAGE (V)
3
2
1
, OUTPUT
out
VOLTAGE (V)
V
0
3.5
3
2.5
2
1.5
1
, OUTPUT VOLTAGE (VOLTS)
0.5
out
V
0
0
Figure 15. Load Transient Response ON
Vin = 3.8 V
= 2.8 V
V
out
R
= 2.8 k
O
V
= 2.0 V
EN
400200
600
Co = 1 mF
Co = 10 mF
800 20
12001000 1400
1600 1800
TIME (ms)
Figure 17. T urn−On Response
Vin = 0 V to 12 V
= 3.3 V
V
out
I
= 10 mA
out
C
= 1 mF
in
C
= 1 mF
out
= V
V
EN
in
642
V
, INPUT VOLTAGE (VOLTS)
in
81
10
Figure 18. Output Voltage versus Input Voltage Figure 19. Output Voltage versus Input Voltage
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8
NCP551, NCV551
APPLICATIONS INFORMATION
A typical application circuit for the NCP551 series is
shown in Figure 20.
Input Decoupling (C1)
A 0.1 mF capacitor either ceramic or tantalum is
recommended and should be connected close to the NCP551
package. Higher values and lower ESR will improve the
overall line transient response.
Output Decoupling (C2)
The NCP551 is a stable Regulator and does not require
any specific Equivalent Series Resistance (ESR) or a
minimum output current. Capacitors exhibiting ESRs
ranging from a few mW up to 3.0 W can thus safely be used.
The minimum decoupling value is 0.1 mF and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. Larger values improve noise rejection and
load regulation transient response.
Enable Operation
The enable pin will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to V
Hints
.
in
Please be sure the Vin and GND lines are sufficiently wide.
When the impedance of these lines is high, there is a chance
to pick up noise or cause the regulator to malfunction.
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads as short as
possible.
Thermal
As power across the NCP551 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature effect the rate of temperature rise for the part.
This is stating that when the NCP551 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is
given by:
PD +
T
J(max)
R
qJA
* T
A
If junction temperature is not allowed above the
maximum 125°C, then the NCP551 can dissipate up to
400 mW @ 25°C.
The power dissipated by the NCP551 can be calculated
from the following equation:
tot
+
ƪ
Vin*I
gnd(Iout
P
ƫ
)
)
[
Vin* V
out
]
*I
out
or
V
inMAX
+
)
P
tot
I
GND
V
out
) I
*
out
I
out
If a 150 mA output current is needed then the ground
current from the data sheet is 4.0 mA. For an
NCP551SN30T1 (3.0 V), the maximum input voltage will
then be 5.6 V.
Battery or
Unregulated
Voltage
ON
OFF
+
C1
Figure 20. Typical Application Circuit
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1
2
3
9
5
4
V
out
+
C2
NCP551, NCV551
Output
Input
Output
Input
R1
t
F
out
.
Q1
R
1
1.0 mF 1.0 mF
2
3
5
4
Figure 21. Current Boost Regulator Figure 22. Current Boost Regulator with
The NCP551 series can be current boosted with a PNP transistor. Resistor R in conjunction with V
when the pass transistor begins conducting; this circuit is not
short circuit proof. Input/Output differential voltage minimum is
increased by V
of the pass resistor.
BE
Input
1
1.0 mF
2
Enable
3
1
1.0 mF 1.0 mF
2
of the PNP determines
BE
Output
5
1.0 mF
4
Output
5
Q1
R2
Q2
1.0 mF 1.0 mF
R3
1
5
2
3
4
Short Circuit Limit
Short circuit current limit is essentially set by the V
Input
R1. I
R
SC
= ((V
− ib * R2) / R1) + I
BEQ2
Q1
1.0 mF
O(max) Regulator
1
2
3
11 V
of Q2 and
BE
5
4
Outpu
1.0 m
R
3
C
4
Figure 23. Delayed T urn−on
If a delayed turn−on is needed during power up of several voltages then the above schematic can be used. Resistor R, and
capacitor C, will delay the turn−on of the bottom regulator.
Figure 24. Input Voltages Greater than 12 V
A regulated output can be achieved with input voltages that
exceed the 12 V maximum rating of the NCP551 series with
the addition of a simple pre−regulator circuit. Care must be
taken to prevent Q1 from overheating when the regulated
output (V
) is shorted to GND
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10
NCP551, NCV551
ORDERING INFORMATION
Nominal
Device
NCP551SN15T1G
NCP551SN18T1G
NCP551SN25T1G
NCP551SN27T1G
NCP551SN28T1G 2.8 LAS TSOP−5
NCP551SN29T1G 2.9 LJL TSOP−5
NCP551SN30T1G 3.0 LAT TSOP−5
NCP551SN31T1G 3.1 LJM TSOP−5
NCP551SN32T1G 3.2 LIV TSOP−5
NCP551SN33T1G 3.3 LAU TSOP−5
NCP551SN50T1G 5.0 LAV TSOP−5
NCV551SN14T1G* 1.4 AAT TSOP−5
NCV551SN15T1G* 1.5 LFZ TSOP−5
NCV551SN18T1G* 1.8 LGA TSOP−5
NCV551SN25T1G* 2.5 LGB TSOP−5
NCV551SN27T1G* 2.7 LGC TSOP−5
NCV551SN28T1G* 2.8 LGD TSOP−5
NCV551SN30T1G* 3.0 LGE TSOP−5
NCV551SN31T1G* 3.1 LJR TSOP−5
NCV551SN32T1G* 3.2 LFR TSOP−5
NCV551SN33T1G* 3.3 LGG TSOP−5
NCV551SN36T1G* 3.6 AEJ TSOP−5
NCV551SN38T1G* 3.8 AD5 TSOP−5
NCV551SN50T1G* 5.0 LGF TSOP−5
NOTE: Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specific-
ations Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PP AP
Capable.
Output Voltage
1.5 LAO
1.8 LAP
2.5 LAQ
2.7 LAR
Marking Package Shipping
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
†
www.onsemi.com
11
NCP551, NCV551
P
al
PACKAGE DIMENSIONS
TSOP−5
SN SUFFIX
CASE 483−02
ISSUE K
NOTE 5
2X
2X
T0.10
B
A
54
B
123
G
A
T0.20
TOP VIEW
0.05
H
SIDE VIEW
D
0.205XC AB
M
S
K
DETAIL Z
DETAIL Z
J
C
C
SEATING
PLANE
END VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
MILLIMETERS
DIM MIN MAX
A 3.00 BSC
B 1.50 BSC
C 0.90 1.10
D 0.25 0.50
G 0.95 BSC
H 0.01 0.10
J 0.10 0.26
K 0.20 0.60
M 0 10
__
S 2.50 3.00
SOLDERING FOOTPRINT*
1.9
0.95
0.037
1.0
0.039
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/ Patent− Marking.pdf . S CILLC reserves t he right to m ake changes wit hout further notice to any products h erein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical e xperts. SCILLC does not convey any license under i ts p atent rights nor the rights of others. S CILLC p roduct s a re n ot d esigned, i nt ended,
or authorized for use as components in systems intended for surgic al i mplant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, em ployees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable at torney f ees a r ising o ut o f, d irectly o r indirectly, any claim o f p ersonal i njury o r d eath a ssociated w ith s uch u nint ended o r u nauthorized u se, e ven if such claim
alleges that SCILLC was negligent r egarding the design o r manuf acture o f t he p art. SCILLC is an E qual O pportunity/Af firmat ive A ction E mployer . T his l iterature i s subject to all a pplicable
copyright laws and is not for resale in any manner.
0.074
0.028
0.7
2.4
0.094
SCALE 10:1
ǒ
inches
mm
Ǔ
UBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
Sales Representative
NCP551/D
12
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