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NCP1392BDR2G
Schematic [ru]
20 pgs277.78 Kb0

ON NCP1392BDR2G Schematic [ru]

NCP1392B
High-Voltage Half-Bridge Driver with Inbuilt Oscillator
Features
• Wide Operating Frequency Range − from 25 kHz to 250 kHz
• Minimum frequency adjust accuracy $3%
• Fixed Dead Time − 0.6 ms
• Adjustable Brown−out Protection for a Simple PFC Association
• 100 ms PFC Delay Timer
• Non−latched Enable Input
• Internal 16 V V
• Low Startup Current of 50 mA
• 1 A / 0.5 A Peak Current Sink / Source Drive Capability
• Operation up to 600 V Bulk Voltage
• Internal Temperature Shutdown
• SOIC−8 or PDIP−8 Package
• These are Pb−Free Devices
CC
Clamp
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DIAGRAMS
8
1
SOIC−8
CASE 751
A = Assembly Location L = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package
PINOUT
VCC
Rt
BO
GND
8
1
MARKING
1392B
ALYWW
G
Vboot
Mupper
HB
Mlower
Typical Applications
• Flat Panel Display Power Converters
• Low Cost Resonant SMPS
• High Power AC/DC Adapters for Notebooks
• Offline Battery Chargers
• Lamp Ballasts
© Semiconductor Components Industries, LLC, 2008
October, 2008 − Rev. 1
ORDERING INFORMATION
Device Package Shipping
NCP1392BDR2G SOIC−8
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
1 Publication Order Number:
(Pb−Free)
Tape & Reel
†
2500 /
NCP1392/D
NCP1392B
AC
OUTPUT
PFC FRONT STAGE
+
Cbulk
Rbo2
Rbo1
Dboot
VCC
Vboot
Rt
Mupper
Bo
GND
Mlower
NCP1392
Rf
Rfmax
Rfstart
CSS
Cboot
HB
M1
M2
Figure 1. Typical Application Example
PIN FUNCTION DESCRIPTION
Pin # Pin Name Function Pin Description
1 V
CC
2 Rt Timing Resistor Connecting a resistor between this pin and GND, sets the operating frequency
3 BO Brown−Out Detects low input voltage conditions. When brought above Vref_EN, it stops the
4 GND IC Ground
5 Mlower Low−Side Driver Output Drives the lower side MOSFET
6 HB Half−Bridge Connection Connects to the half−bridge output
7 Mupper High−Side Driver Output Drives the higher side MOSFET
8 Vboot Bootstrap Pin The floating supply terminal for the upper stage
Supplies the Driver The driver accepts up to 16 V (given by internal zener clamp)
driver. Operation is restored (without any delay) when BO pin voltage drops 100 mV below Vref_EN.
+
DC OUTPUT
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2
NCP1392B
V
DD
V
boot
UV
Detect
SRQ
M
Q
upper
Bridge
V
CC
M
lower
S
Q
+
V
V
DD
V
CC
Clamp
ref
PFC Delay
(100ms)
V
ref
PON
RESET
V
CC
Management
TSD
−
+
+
Vref
−
C
t
I
DT
0.5ms Filter
EN
Rt
V
CC
V
CC
−
+
V
ref
−
D
CLK
R
Q
Pulse
Trigger
Level
Shifter
DELAY
BO
SW
hyster
I
+
−
+
Vref
−
20ms Filter
BO
HIGH Level for 50ms After V
On
CC
GND
Figure 2. Internal Circuit Architecture
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3
NCP1392B
MAXIMUM RATINGS TABLE
Symbol Rating Value Unit
Vbridge High Voltage Bridge Pin − Pin 6 −1 to +600 V
Vboot − Vbridge
VDRV_HI High−Side Output Voltage Vbridge − 0.3 to
VDRV_LO Low−Side Output Voltage −0.3 to VCC +0.3 V
dVbridge/dt Allowable Output Slew Rate $50 V/ns
I
CC
V_Rt Rt Pin Voltage −0.3 to 5 V
R
q
R
q
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. This device contains internal zener clamp connected between V
by an external resistor when device is supplied from supply which voltage is higher than VCC specified for VBO = 0 V.
Floating Supply Voltage 0 to 20 V
Vboot + 0.3
Maximum Current that Can Flow into VCC Pin (Pin 1), (Note 1) 20 mA
Maximum Voltage, All Pins (Except Pins 4 and 5) −0.3 to 10 V
Thermal Resistance Junction−to−Air, IC Soldered on 50 mm2 Cooper 35 mm
JA
Thermal Resistance Junction−to−Air, IC Soldered on 200 mm2 Cooper 35 mm
JA
178 °C/W
147 °C/W
Storage Temperature Range −60 to +150 °C
ESD Capability, Human Body Model (All Pins Except Pins 1 , 6, 7 and 8) 2 kV
ESD Capability, Machine Model (All Pins Except Pins 1, 6, 7 and 8) 200 V
and GND terminals. Current flowing into the VCC pin has to be limited
CC
(16 V typically). The ICC parameter is
clamp
V
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4
NCP1392B
ELECTRICAL CHARACTERISTICS (For typical values T
V
= 12 V, unless otherwise noted)
CC
Characteristic
= 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C,
J
Pin Symbol Min Typ Max Unit
SUPPLY SECTION
Turn−On Threshold Level, V
Going Up 1 VCC
CC
Minimum Operating Voltage after Turn−On 1 VCC
Startup Voltage on the Floating Section 1 Vboot
Cutoff Voltage on the Floating Section, 1 Vboot
VCC Level at which the Internal Logic gets Reset 1 VCC
Startup Current, VCC < VCCON, 0°C v T
Startup Current, VCC < VCCON, −40°C v T
v +125°C 1 I
amb
< 0°C 1 I
amb
ON
min
ON
min
reset
CC
CC
10 11 12 V
8 9 10 V
7.8 8.8 9.8 V
7 8 9 V
− 6.5 − V
− − 50
− − 65
mA
mA
Internal IC Consumption, No Output Load on Pins 8/7 − 5/4, Fsw = 100 kHz 1 ICC1 − 2.2 − mA
Internal IC Consumption, 1 nF Output Load on Pins 8/7 − 5/4, Fsw = 100 kHz 1 ICC2 − 3.4 − mA
Consumption in Fault Mode (Drivers Disabled, VCC > V
Consumption During PFC Delay Period, 0°C v T
Consumption During PFC Delay Period, −40°C v T
amb
amb
v +125°C ICC4 − − 400
, RT = 3.5 kW)
CC(min)
< 0°C ICC4 − − 470
Internal IC Consumption, No Output Load on Pin 8/7 FSW = 100 kHz 8 I
Internal IC Consumption, 1 nF Load on Pin 8/7 FSW = 100 kHz 8 I
Consumption in Fault Mode (Drivers Disabled, V
boot
> Vboot
) 8 I
min
VCC Zener Clamp Voltage @ 20 mA 1 VCC
1 ICC3 − 2.56 − mA
mA
mA
boot1
boot2
boot3
clamp
− 0.3 − mA
− 1.44 − mA
− 0.1 − mA
15.4 16 17.5 V
INTERNAL OSCILLATOR
Minimum Switching Frequency,
= 35 kW on Pin 2, DT = 600 ns
R
t
Maximum Switching Frequency, Rt = 3.5 kW on Pin 2, DT = 600 ns
Reference Voltage for all Current Generations 2 V
Internal Resistance Discharging C
soft−start
2 FSW min 24.25 25 25.75 kHz
2 FSW max 208 245 282 kHz
RT 3.33 3.5 3.67 V
ref
2 Rt
discharge
− 500 −
W
Operating Duty Cycle Symmetry 5, 7 DC 48 50 52 %
NOTE: Maximum capacitance directly connected to Pin 2 must be under 100 pF.
DRIVE OUTPUT
Output Voltage Rise Time @ CL = 1 nF, 10−90% of Output Signal
5, 7 T
Output Voltage Fall Time @ CL = 1 nF, 10−90% of Output Signal 5, 7 T
Source Resistance 5, 7 R
Sink Resistance 5, 7 R
Deadtime 5,7 T
Leakage Current on High Voltage Pins to GND (600 Vdc) 6,7,8 IHV
r
f
OH
OL
dead
Leak
− 40 − ns
− 20 − ns
− 12 −
− 5 −
540 610 720 ns
− − 5
mA
W
W
PROTECTION
Brown−Out Input Bias Current
3 IBO
bias
− 0.01 −
mA
Brown−Out Level 3 VBO 0.95 1 1.05 V
Hysteresis Current, V
Reference Voltage for EN Input 3 V
< VBO 3 IBO 15.6 18.2 20.7
pin3
EN 1.9 2 2.1 V
ref
mA
Enable Comparator Hysteresis 3 EN_Hyste − 100 − mV
Propagation Delay Before Drivers are Stopped 3 EN_Delay − 0.5 −
ms
Delay Before Any Driver Restart − PFC Delay − 100 − ms
Temperature Shutdown − TSD 140 − − °C
Hysteresis − TSDhyste − 30 − °C
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5
NCP1392B
11.01
11.00
10.99
10.98
10.97
10.96
10.95
VOLTAGE (V)
10.94
10.93
10.92
10.91
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
8.85
8.80
8.75
8.70
VOLTAGE (V)
8.65
8.60
Figure 3. V
CCon
8.98
8.97
8.96
8.95
8.94
VOLTAGE (V)
8.93
8.92
8.91
8.90
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
8.10
8.05
8.00
7.95
7.90
VOLTAGE (V)
7.85
7.80
Figure 4. V
CCmin
8.55
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 5. V
20
18
16
14
12
10
8
6
RESISTANCE (W)
4
2
0
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 7. R
BOOTon
OH
7.75
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 6. V
8
7
6
5
4
3
RESISTANCE (W)
2
1
0
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 8. R
BOOTmin
OL
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