ON MC33151DG, MC33151VDR2G, MC34151DG, MC33151PG, MC34151PG Schematic

MC34151, MC33151

High Speed Dual MOSFET Drivers

The MC34151/MC33151 are dual inverting high speed drivers specifically designed for applications that require low current digital circuitry to drive large capacitive loads with high slew rates. These devices feature low input current making them CMOS and LSTTL logic compatible, input hysteresis for fast output switching that is independent of input transition time, and two high current totem pole outputs ideally suited for driving power MOSFETs. Also included is an undervoltage lockout with hysteresis to prevent erratic system operation at low supply voltages.

Typical applications include switching power supplies, dc to dc converters, capacitor charge pump voltage doublers/inverters, and motor controllers.

These devices are available in dual−in−line and surface mount packages.

Features

• Two Independent Channels with 1.5 A Totem Pole Output

• Output Rise and Fall Times of 15 ns with 1000 pF Load

• CMOS/LSTTL Compatible Inputs with Hysteresis

• Undervoltage Lockout with Hysteresis

• Low Standby Current

• Efficient High Frequency Operation

• Enhanced System Performance with Common Switching Regulator

Control ICs

• Pin Out Equivalent to DS0026 and MMH0026

• These are Pb−Free and Halide−Free Devices

V

CC

6

+

Logic Input A

Logic Input B

-

+

2

+

4

5.7V

+

Drive Output A

7

100k

+

Drive Output B

5

100k

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MARKING

DIAGRAMS

8

YYWWG

1

G

MC3x151P

AWL

8

3151V

ALYWG

G

1

PDIP−8

P SUFFIX

8

1

8

1

(Note: Microdot may be in either location)

CASE 626

8

SOIC−8

D SUFFIX

CASE 751

x = 3 or 4 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package

3x151

ALYWG

1

MC3x151 MC33151V

PIN CONNECTIONS

1 8 N.C.N.C.

2 7 Drive Output ALogic Input A

GND

36V

4 5 Drive Output BLogic Input B

(Top View)

CC

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.

GND

Figure 1. Representative Block Diagram

August, 2013 − Rev. 9

3

1 Publication Order Number:

MC34151/D

MC34151, MC33151

MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Voltage V

Logic Inputs (Note 1) V

CC

in

Drive Outputs (Note 2)

Totem Pole Sink or Source Current Diode Clamp Current (Drive Output to V

CC

)

I

O

I

O(clamp)

Power Dissipation and Thermal Characteristics

D Suffix SOIC−8 Package Case 751

Maximum Power Dissipation @ T

= 50°C

A

Thermal Resistance, Junction−to−Air

P

D

R

q

JA

P Suffix 8−Pin Package Case 626

Maximum Power Dissipation @ T Thermal Resistance, Junction−to−Air

Operating Junction Temperature T

Operating Ambient Temperature

= 50°C

A

P

D

R

q

JA

J

T

A

MC34151 MC33151 MC33151V

Storage Temperature Range T

Electrostatic Discharge Sensitivity (ESD) (Note 3)

stg

ESD Human Body Model (HBM) Machine Model (MM) Charged Device Model (CDM)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. For optimum switching speed, the maximum input voltage should be limited to 10 V or V

2. Maximum package power dissipation limits must be observed.

, whichever is less.

CC

3. ESD protection per JEDEC Standard JESD22−A114−F for HBM per JEDEC Standard JESD22−A115−A for MM per JEDEC Standard JESD22−C101D for CDM.

20 V

−0.3 to V

CC

1.5

1.0

0.56 180

1.0

100

W

°C/W

W

°C/W

+150 °C

°C

0 to +70

−40 to +85

−40 to +125

−65 to +150 °C

2000

200

1500

V

A

V

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2

MC34151, MC33151

ELECTRICAL CHARACTERISTICS (V

= 12 V, for typical values TA = 25°C, for min/max values TA is the only operating

CC

ambient temperature range that applies [Note 3], unless otherwise noted.)

Characteristics

Symbol Min Typ Max Unit

LOGIC INPUTS

Input Threshold Voltage − Output Transition High to Low State

Output Transition Low to High State

Input Current − High State (VIH = 2.6 V)

Input Current − Low State (V

= 0.8 V)

IL

V

IH

V

IL

I

IH

I

IL

−

0.8

−

DRIVE OUTPUT

Output Voltage − Low State (I

Output Voltage − Low State (I Output Voltage − Low State (I Output Voltage − High State (I Output Voltage − High State (I Output Voltage − High State (I

= 10 mA)

Sink

= 50 mA)

Sink

= 400 mA)

Sink

Source

= 10 mA) = 50 mA) = 400 mA)

Output Pulldown Resistor R

V

OL

−

V

OH

10.5

10.4

9.5

PD

− 100 −

SWITCHING CHARACTERISTICS (TA = 25°C)

= 2.5 nF

L

= 2.5 nF

= 1.0 nF)

L

t

PLH(in/out)

t

PHL(in/out)

t

r

t

f

−

Propagation Delay (10% Input to 10% Output, C

Logic Input to Drive Output Rise Logic Input to Drive Output Fall

Drive Output Rise Time (10% to 90%) CL = 1.0 nF

Drive Output Rise Time (10% to 90%) C

Drive Output Fall Time (90% to 10%) CL = 1.0 nF

Drive Output Fall Time (90% to 10%) C

L

TOTAL DEVICE

Power Supply Current

Standby (Logic Inputs Grounded) Operating (C

= 1.0 nF Drive Outputs 1 and 2, f = 100 kHz)

L

Operating Voltage V

I

CC

−

CC

6.5 − 18 V

1. For optimum switching speed, the maximum input voltage should be limited to 10 V or VCC, whichever is less.

2. Maximum package power dissipation limits must be observed.

3. T

=0°C for MC34151 T

low

−40°C for MC33151 +85°C for MC33151

= +70°C for MC34151

high

1.75

2.6

1.58

20020500

100

0.8

1.2

1.1

1.5

1.7

2.5

11.2

11.1

10.9

3536100

100

14

30

31

16

30

32

6.0

10.51015

V

−

mA

V

−

kW

ns

−

ns

−

mA

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3

Logic Input

MC34151, MC33151

12

V

4.7 0.1

+

6

+

-

+

5.7V

+

2

+

Drive Output

7

50 C

+

4

3

100k

+

5

100k

L

Logic Input

t

r

, tf ≤ 10 ns

5.0 V

0 V

10%

t

PHL

90%

t

PLH

90%

Drive Output

t

f

10%

Figure 2. Switching Characteristics Test Circuit Figure 3. Switching Waveform Definitions

2.4

VCC = 12 V T

= 25°C

2.0

A

1.6

1.2

0.8

, INPUT CURRENT (mA)

in

I

0.4

0

0 2.0 4.0 6.0 8.0 10 12 -55 -25 0 25 50 75 100 125

Vin, INPUT VOLTAGE (V)

Figure 4. Logic Input Current versus

Input Voltage

2.2

2.0

1.8

1.6

1.4

, INPUT THRESHOLD VOLTAGE (V)

1.2

th

V

1.0

VCC = 12 V

Upper Threshold

Low State Output

Lower Threshold

High State Output

TA, AMBIENT TEMPERATURE (°C)

Figure 5. Logic Input Threshold Voltage

versus Temperature

t

r

200

Overdrive Voltage is with Respect

to the Logic Input Lower Threshold

160

VCC = 12 V CL = 1.0 nF T

= 25°C

A

120

80

40

, DRIVE OUTPUT PROPAGATION DELAY (ns)

V

0

-1.6 -1.2 -0.8 -0.4 0 0 1.0 2.0 3.0 4.0 V

, INPUT OVERDRIVE VOLTAGE BELOW LOWER THRESHOLD (V)

PLH(IN/OUT)

in

t

th(lower)

Figure 6. Drive Output Low−to−High Propagation

Delay versus Logic Overdrive Voltage

200

160

Overdrive Voltage is with Respect

to the Logic Input Lower Threshold

VCC = 12 V C T

120

80

40

, DRIVE OUTPUT PROPAGATION DELAY (ns)

V

0

Vin, INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD (V)

PHL(IN/OUT)

t

th(upper)

Figure 7. Drive Output High−to−Low Propagation

Delay versus Logic Input Overdrive Voltage

= 1.0 nF

L

= 25°C

A

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4

ON MC33151DG, MC33151VDR2G, MC34151DG, MC33151PG, MC34151PG Schematic [ru]