ON ESD4238 Schematic [ru]

ESD4238

PicoGuard[ XS ESD Clamp Array with ESD Protection

Functional Description

The PicoGuard XS protection family is specifically designed for

next generation deep sub−micron high speed data line protection.

The ESD4238 is ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading and tightly controlled signal skews (with channel−to−channel matching at 2% max deviation).

The device is particularly well−suited for protecting systems using high−speed ports such as DVI or HDMI, along with corresponding ports in removable storage, digital camcorders, DVD−RW drives and other applications where extremely low loading capacitance with ESD protection are required.

The ESD4238 also features easily routed “pass−through” pinouts in a RoHS−compliant (Pb−Free), 16−lead WDFN, small footprint package.

Features

• ESD Protection for Four Pairs of Differential Channels

• ESD protection to IEC61000−4−2 Level 4:

♦ $20 kV contact discharge ♦ $25 kV air discharge

• Pass−through Impedance Matched Clamp Architecture

• Flow−through Routing for High−speed Signal Integrity

• 100 W Matched Impedance for Each Paired Differential Channel

• Capacitance Change with Temperature and Voltage

• Each I/O Pin Can Withstand Over 1000 ESD Strikes*

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

• DVI ports, HDMI Ports in Notebooks, Set−top Boxes, Digital TVs,

LCD Displays

• General Purpose High−speed Data Line ESD Protection

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WDFN16

CASE 511AU

MARKING DIAGRAM

238M

238 = Specific Device Code M G = Pb−Free Package

= Date Code

PIN CONNECTIONS

In_1+

In_1−

In_2+

In_2−

In_3+

In_3−

In_4+

(Top View)

GND

Out_1+

Out_1−

Out_2+

Out_2−

Out_3+

Out_3−

Out_4+

Out_4−

*Standard test condition is IEC61000−4−2 level 4 test circuit with each pin

subjected to $8 kV contact discharge for 1000 pulses. Discharges are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run. The part is then subjected to standard production test to verify that all of the tested parameters are within spec after the 1000 strikes.

October, 2010 − Rev. 0

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

Publication Order Number:

ESD4238/D

ESD4238

Out_1+ Out_1−

Out_2+ Out_2−

Out_3+ Out_3−

Out_4+ Out_4−

GND

Figure 1. Block Diagram

PicoGuard XS ESD Protection Architecture

Conceptually, an ESD protection device performs the following actions upon an ESD strike discharge into a protected ASIC (see Figure 2):

1. When an ESD potential is applied to the system under test (contact or air−discharge), Kirchoff’s Current Law (KCL) dictates that the Electrical Overstress (EOS) currents will immediately divide throughout the circuit, based on the dynamic impedance of each path.

2. Ideally, the classic shunt ESD clamp will switch within 1 ns to a low−impedance path and return the majority of the EOS current to the chassis shield/reference ground. In actuality, if the ESD component’s response time (t

CLAMP

) is slower than the ASIC it is protecting, or if the Dynamic Clamping Resistance (RDYN) is not significantly lower than the ASIC’s I/O cell circuitry, then the ASIC will have to absorb a large amount of the EOS energy, and be more likely to fail.

3. Subsequent to the ESD/EOS event, both devices must immediately return to their original specifications, and be ready for an additional strike. Any deterioration in parasitics or clamping

In_1+ In_1−

In_2+ In_2−

In_3+ In_3−

In_4+ In_4+

= 100 W differential matched characteristic impedance.

capability should be considered a failure, since it can then affect signal integrity or subsequent protection capability. (This is known as ”multi−strike” capability.)

In the ESD4238 PicoGuard XS architecture, the signal

line leading the connector to the ASIC routes through the ESD4238 chip which provides 100 W matched differential channel characteristic impedance that helps optimize 100 W load impedance applications such as the HDMI high speed data lines.

NOTES: When each of the channels is used individually

for single−ended signal lines protection, the individual channel provides 50 W characteristic impedance matching.

The load impedance matching feature of the ESD4238 helps to simplify system designer’s PCB layout considerations in impedance matching and also eliminates associated passive components.

The route through the PicoGuard XS architecture enables the ESD4238 to provide matched impedance for the signal path between the connector and the ASIC. Besides this function, this circuit arrangement also changes the way the parasitic inductance interacts with the ESD protection circuit and helps reduce the I

RESIDUAL

current to the ASIC.

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ESD Strike

I/O

Connector

SHUNT

ESD4238

ESD

Protection

PROTECTION

Device

DEVICE

RESIDUAL

ASIC

Figure 2. Standard ESD Protection Device Block Diagram

The PicoGuard XS Architecture Advantages

Figure 3 illustrates a standard ESD protection device. The inductor element represents the parasitic inductance arising from the bond wire and the PCB trace leading to the ESD protection diodes.

ASICConnector

Bond Wire

Inductance

ESD

Stage

Figure 3. Standard ESD Protection Model

Figure 4 illustrates one of the channels. Similarly, the inductor elements represent the parasitic inductance arising from the bond wire and PCB traces leading to the ESD protection diodes as well.

Connector ASIC

Figure 4. ESD4238 PicoGuard XS ESD Protection

ESD4238 Inductor Elements

50W

ESD

Device

Model

In the ESD4238 PicoGuard XS architecture, the inductor elements and ESD protection diodes interact differently compared to the standard ESD model. In the standard ESD protection device model, the inductive element presents high impedance against high slew rate strike voltage, i.e. during an ESD strike. The impedance increases the resistance of the conduction path leading to the ESD protection element. This limits the speed that the ESD pulse can discharge through the ESD protection element.

In the PicoGuard XS architecture, the inductive elements are in series to the conduction path leading to the protected

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