These Common Anode Silicon Epitaxial Planar Dual Diodes are
designed for use in ultra high speed switching applications. The
DAP222 device is housed in the SC−75/SOT−416 package which is
designed for low power surface mount applications, where board
space is at a premium. The DAP202U device is housed in the
SC−70/SOT−323 package.
Features
• Fast t
• Low C
• Pb−Free Packages are Available
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Figure 1. Forward VoltageFigure 2. Reverse Current
1.75
1.5
1.25
, DIODE CAPACITANCE (pF)
1.0
D
C
0.75
0
2468
VR, REVERSE VOLTAGE (VOLTS)
50
Figure 3. Diode Capacitance
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2
DAP222, DAP202U
R
A
RECOVERY TIME EQUIVALENT TEST CIRCUIT
Figure 4. Reverse Recovery Time Test Circuit for the DAP222
L
t
r
t
p
I
t
F
10%
90%
V
R
tp = 2 ms
tr = 0.35 ns
INPUT PULSEOUTPUT PULSE
t
rr
Irr = 0.1 I
IF = 5.0 mA
VR = 6 V
RL = 100 W
t
R
R
A
L
RECOVERY TIME EQUIVALENT TEST CIRCUIT
Figure 5. Reverse Recovery Time Test Circuit for the DAP202U
t
r
t
p
I
t
F
10%
90%
V
R
tp = 2 ms
tr = 0.35 ns
INPUT PULSEOUTPUT PULSE
t
rr
Irr = 0.1 I
IF = 5.0 mA
VR = 6 V
RL = 100 W
t
R
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3
DAP222, DAP202U
PACKAGE DIMENSIONS
SC−75 (SOT−416)
CASE 463−01
ISSUE F
b
3 PL
0.20 (0.008)D
M
C
−E−
3
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2
e
−D−
1
0.20 (0.008) E
H
E
A
2. CONTROLLING DIMENSION: MILLIMETER.
MILLIMETERS
DIM MIN NOM MAX
A 0.70 0.80 0.90
A1 0.00 0.05 0.10
b
0.15 0.20 0.30 0.006 0.008 0.012
C 0.10 0.15 0.25
D 1.55 1.60 1.65
E
0.70 0.80 0.90 0.027 0.031 0.035
e1.00 BSC
L 0.10 0.15 0.20
H
1.50 1.60 1.70
E
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
INCHES
MIN NOM MAX
0.027 0.031 0.035
0.000 0.002 0.004
0.004 0.006 0.010
0.059 0.063 0.067
0.04 BSC
0.004 0.006 0.008
0.061 0.063 0.065
A1
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
SCALE 10:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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4
DAP222, DAP202U
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE M
0.05 (0.002)
D
e1
3
H
E
12
e
A1
E
b
A
A2
SOLDERING FOOTPRINT*
0.65
0.025
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIMAMINNOMMAXMIN
A10.000.050.100.000
A20.7 REF
b0.300.350.400.012
c0.100.180.250.004
D1.802.102.200.071
E1.151.241.350.045
e1.201.301.400.047
e1
L
c
H
E
MILLIMETERS
0.800.901.000.032
0.65 BSC
0.425 REF
2.002.102.400.0790.0830.095
INCHES
NOMMAX
0.0350.040
0.0020.004
0.028 REF
0.0140.016
0.0070.010
0.0830.087
0.0490.053
0.0510.055
0.026 BSC
0.017 REF
L
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
SCALE 10:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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DAP222/D
5
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