Olimex STM32-H107 User guide

STM32-H107 development board

Users Manual

All boards produced by Olimex are ROHS compliant

Rev. C, June 2011

Copyright(c) 2011, OLIMEX Ltd, All rights reserved

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INTRODUCTION

STM32-H107 header board provides easy way for developing and prototyping with

the new STM32F107VCT6 connectivity line microcontroller, produced by
STMicroelectronics. STM32-H107 has JTAG port for programming and debugging,
USB_OTG, user button, two status leds, and most of the GPIOs are on extension
headers where you can connect your additional circuits.

BOARD FEATURES

- CPU: STM32F107VCT6 32 bit ARM-based microcontroller with 256 KB Flash,
64KB RAM, USB OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication
interfaces

- JTAG connector with ARM 2x10 pin layout for programming/debugging

- 25 Mhz crystal

- USB_OTG

- Power Jack

- WKUP button

- RESET button

- Two status leds

- Power-on led

- 3V battery connector

- Extension port connectors for many of microcontrollers pins

- PCB: FR-4, 1.5 mm (0,062"), soldermask, silkscreen component print

- Dimensions: 70x50mm (2.76x1.97")

ELECTROSTATIC WARNING

The STM32-H107 board is shipped in protective anti-static packaging. The board
must not be subject to high electrostatic potentials. General practice for working
with static sensitive devices should be applied when working with this board.

BOARD USE REQUIREMENTS

Cables: The cable you will need depends on the programmer/debugger you use. If
you use ARM-JTAG, you will need LPT cable, if you use ARM-USB-OCD, or ARM-

USB-OCD-H, you will need RS232 cable and 1.8 meter USB A-B cable and if you

use ARM-JTAG-EW, ARM-USB-TINY, or ARM-USB-TINY-H, you will need 1.8
meter USB A-B cable.

Hardware: Programmer/Debugger – one of the Olimex ARM Programmers: ARM­JTAG, ARM-USB-OCD ARM-USB-OCD-H, ARM-USB-TINY, ARM-USB-TINY-H,
ARM-JTAG-EW.

Software: ARM C compiler and JTAG programmer.
Note: For OpenOCD we don't offer any projects.

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PROCESSOR FEATURES

STM32-H107 board use ARM-based 32-bit microcontroller STM32F107VCT6 with

these features:

– Core: ARM 32-bit Cortex™-M3 CPU

– 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1)

performance at 0 wait state memory access

– Single-cycle multiplication and hardware division

– Memories

– 256 Kbytes of Flash memory

– 64 Kbytes of SRAM

– Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR, and programmable voltage detector (PVD)

– 25 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC with calibration

– 32 kHz oscillator for RTC with calibration

– Low power

– Sleep, Stop and Standby modes

– VBAT supply for RTC and backup registers

– 2 × 12-bit, 1 µs A/D converters (16 channels)

– Conversion range: 0 to 3.6 V

– Sample and hold capability

– Temperature sensor

– up to 2 MSps in interleaved mode

– 2 × 12-bit D/A converters

– DMA: 12-channel DMA controller

– Supported peripherals: timers, ADCs, DAC, I

2

Ss, SPIs, I2Cs and

USARTs

– Debug mode

– Serial wire debug (SWD) & JTAG interfaces

– Cortex-M3 Embedded Trace Macrocell™

– 80 fast I/O ports

– 80 I/Os, all mappable on 16 external interrupt vectors and almost all 5

V-tolerant

– 10 timers

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– four 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– 1 × 16-bit motor control PWM timer with dead-time generation and

emergency stop

– 2 × watchdog timers (Independent and Window)

– SysTick timer: a 24-bit downcounter

– 2 × 16-bit basic timers to drive the DAC

– 14 communication interfaces

– 2 × I

2

C interfaces (SMBus/PMBus)

– 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)

– 3 SPIs (18 Mbit/s), 2 with a multiplexed I

2

S interface that offers audio

class accuracy via advanced PLL schemes

– 2 × CAN interfaces (2.0B Active) with 512 bytes of dedicated SRAM

– USB 2.0 full-speed device/host/OTG controller with on-chip PHY that

supports HNP/SRP/ID with 1.25 Kbytes of dedicated SRAM

– 10/100 Ethernet MAC with dedicated DMA and SRAM (4 Kbytes):

IEEE1588 hardware support, MII/RMII available on all packages

– CRC calculation unit, 96-bit unique ID

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BLOCK DIAGRAM

Page5

MEMORY MAP

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