OKI MSM7603-003GS-K, MSM7603B-003GS-K Datasheet

E2U0064-18-82

¡ Semiconductor MSM7603/7603B

This version: Aug. 1998

¡ Semiconductor

MSM7603/7603B

Echo Canceler

GENERAL DESCRIPTION

The MSM7603/7603B is an improved version of the MSM7602 with basically the same configuration, and offers twice the cancelable echo delay time of the MSM7602. The MSM7603B I/O interface allows switching between m-law PCM and A-law PCM. The MSM7603/7603B is a low-power CMOS IC device for canceling echo (in an acoustic system or telephone line) generated in a speech path. Echo is canceled, in digital signal processing, by estimating the echo path and generating a pseudo echo signal. When used as an acoustic echo canceler, the device can cancel the acoustic echo, between the loud speaker and the microphone, which occur during hands free communication such as on a cellular phone or a conference system phone. When used as a line echo canceler, the device can cancel the line echo which returns due to impedance mismatching in a hybrid. In addition, a quality conversation is made possible by controlling the level and by preventing howling through a howling detector, double talk detector, attenuation function and a gain control function, and by controlling the low level noise by means of a center clipping function. The use of a single chip codec, such as the MSM7704 (3 V) and MSM7533 (5 V), allows an economic and efficient echo canceler to be configured.

FEATURES

• Can handle both acoustic and telephone line echoes.

• Switchable between m-law PCM and A-law PCM interfaces. (MSM7603B)

• Cancelable echo delay time:

MSM7603B-003 .............. 55 ms (max.)

• Echo attenuation : 30 dB (typ.)

• Clock frequency : 19.2 MHz

17.5 MHz to 20 MHz (when internal sync signal not used)

• Power supply voltage : 2.7 V to 5.5 V

• Package: 28-pin plastic SSOP (SSOP28-P-485-0.65-K) (Product name : MSM7603-003GS-K)

(Product name : MSM7603B-003GS-K)

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¡ Semiconductor MSM7603/7603B

BLOCK DIAGRAM

MSM7603/7603B

RIN ROUT

S/P ATT Gain

Howling Detector

Non–linear/ Linear

Double Talk Detector

Power Calculator

Linear/ Non–linear

Adaptive

FIR Filter

(AFF)

P/S

–

SOUT SIN

PWDWN

P/S

PLL

Linear/ Non–linear

Clock Generator

Center Clip

ATT

Mode Selector I/O Controller

HD m/A

Non–linear/ Linear

S/P

SCK SYNCNLP HCL ADP ATT GCSYNCOSCKOCLKIN

* For MSM7603B only

RST

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¡ Semiconductor MSM7603/7603B

PIN CONFIGURATION (TOP VIEW)

SYNC

PWDWN

[m/A]*

CLKIN

(PLL)

NLP

HCL

ADP

SCK

RST

SOUT

ROUT

SIN

RIN

NC[TEST]*

ATT

SCKO

SYNCO

NC : No connect pin

28-Pin Plastic SSOP

* Pins shown in brackets apply to MSM7603B.

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¡ Semiconductor MSM7603/7603B

PIN DESCRIPTIONS

1 NLP I

2 HCL I

3 ADP I

Symbol Type Description

This is the control pin for the center clipping function to force the SOUT output to a minimum value when the SOUT signal is below –57 dBm0. Effective for reducing low-level noise.

"H": Center clip ON "L": Center clip OFF

This is the through mode control pin. When this pin is in the through mode the RIN and SIN data are output to ROUT and SOUT. At the same time, the coefficient of the adaptive FIR filter is cleared.

"H": Through mode "L": Normal mode (echo canceler operates)

This is the AFF coefficient control pin which stops updating the adaptive FIR filter (AFF) coefficient and sets it to a fixed value, when the pin is configured to be the coefficient fix mode. Used when holding the AFF coefficient which has been once converged.

"H": Coefficient fix mode "L": Normal mode (coefficient update)

4 SYNC I

5 SCK I

This is the input pin for the sync signal for transmit/receive serial data. This pin uses the external SYNC or SYNCO. Inputs the PCM codec transmit/receive sync signal (8 kHz).

This is the clock input pin for transmit/receive serial data. It uses the external SCK or the SCKO. Input the PCM codec transmit/receive clock (64 to 2048 kHz).

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¡ Semiconductor MSM7603/7603B

PIN DESCRIPTIONS (Continued)

Symbol Type Description

8 RST I

9 PWDWN I

This is the input pin for the reset signal.

"L": Reset mode "H": Normal operation mode

Due to initialization, input signals are disabled for 100 ms after reset (after RST is returned from "L" to "H"). Input the basic clock during the reset. Output pins during the reset are in the following sates :

High impedance: SOUT, ROUT Not affected: SYNCO, SCKO

This is the power-down mode control pin for power down operation

"L": Power-down mode

"H": Normal operation mode During power-down mode, all input pins are disabled and output pins are in the following states :

High impedance : SOUT, ROUT "L": SYNCO, SCKO

Reset after the power-down mode is released.

10 HD I

11 (m/A) I

12 CLKIN I

13 V

(PLL) I

14 VSS (PLL) I 16 SYNCO O

This pin controls the howling detect function that detects and cancels a howling generated during hands-free talking for acoustic system. This function is used to cancel acoustic echoes.

"L": Howling detector ON

"H": Howling detector OFF

Used for MSM7603B only. This is the input pin for m-law PCM/A-law PCM interface select signal.

"L": A-law PCM interface

"H": m-law PCM interface For MSM7603, apply V

This is the input pin for external input for the basic clock. Input the basic clock (17.5 to 20 MHz). When the internal sync signal (SYNCO, SCKO) is used, input the basic clock of 19.2 MHz.

This is the power supply pin for the PLL circuit used for the basic clock. Insert a 0.1 mF capacitor with excellent high frequency characteristics between V

(PLL) and VSS (PLL).

This is the ground pin for the PLL circuit used for the basic clock. This is the output pin for the 8 kHz sync signal for the PCM codec. Connect to the SYNC pin and the PCM codec transmit/receive sync pin. Leave open if using an external SYNC.

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¡ Semiconductor MSM7603/7603B

PIN DESCRIPTIONS (Continued)

17 GC I

18 SCKO O

19 ATT I

Symbol Type Description

This is the pin for the input signal by which the gain controller for the RIN input is controlled. The pin also controls RIN input level and prevents howling. The gain controller adjusts the RIN input level when it is –20 dBm0 or above. RIN input levels from –20 to –11.5 dBm0 will be suppressed to –20 dBm0 in the attenuation range from 0 to 8.5 dB. RIN input levels above –11.5 dBm0 will always be attenuated by

8.5 dB.

"H": Gain control ON "L": Gain control OFF

"H" is recommended for performing echo cancellation.

This is the output pin for the transmit clock signal (256 kHz) for the PCM codec. Connect to the SCK pin and the PCM codec transmit/receive clock pin. Leave open when using an external SCK. This is the control pin for the ATT function which prevents howling by attenuators (ATT) for the RIN input and SOUT output. If there is input only to RIN, then the ATT for the SOUT output is activated. If there is no input to SIN or there is input to both SIN and RIN, then the ATT for the RIN input is activated. Either the ATT for the RIN output or the ATT for the SOUT is always activated in all cases, and the attenuation of ATT is 6 dB.

"H": ATT OFF "L": ATT ON

"L" is recommended for performing echo cancellation.

21 (TEST) O

24 RIN I

25 SIN I

26 ROUT O

27 SOUT O

This pin is for MSM7603B only and not used. Should be left open. In MSM7603 it is an NC pin.

This is the receive serial data input pin. Input the PCM signal synchronized to SYNC and SCK. Data is read at the falling edge of SCK. This is the transmit serial data input pin. Input the PCM signal synchronized to SYNC and SCK. Data is read at the falling edge of SCK. This is the output pin for receive serial data. Outputs the PCM signal synchronized to SYNC and SCK. This pin is in high impedance state during the absence of data output.

This is the output pin for transmit serial data. Outputs the PCM signal synchronized to SYNC and SCK. This pin is in high impedance state during the absence of data output.

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