Application Note Rev. 1.5 — 28th August 2009 2 of 43
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NXP Semiconductors
PN544 Antenna Design Guide
AN145715
1. 0Introduction
1.1 11B11BPurpose and scope
This application draft is intended to give a practical guide to estimate and tune antenna
components for the PN544 antenna topology. The PN544 is capable of performing
Reader/Writer (R/W) as well as target mode functionalities. This guide is not primarily
based on a strong mathematical background but on a practical approach towards PN544
antenna tuning. Therefore it is recommended to read and use this document as
described in the chapter
To get hands-on experience it is recommended to use an antenna which has
approximately the same outlines as the one used throughout this document.
This document will be adapted for upcoming versions and may contain a modification of
the following topology or even contain further antenna topologies.
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AN145715
PN544 Antenna Design Guide
2. 1B1BPN544 Topology
The PN544 topology is outlined in 51H51H50HFig 1. It can be seen that only one antenna (Z
used for Reader/Writer-and Card mode. The number of turns for this antenna topology
using the PN544 demo board is six.
CRX
ant
) is
57B56B57B56B
Fig. 1 PN544 antenna topology
The following component tolerances (maximum values) are required for an appropriate
tuning:
Component Maximum tolerance Component Maximum tolerance
L0 5% RQ 5%
C0 5% Rx
C1 2% R2
C2a 2% CRX
C2b 2% CVMID
5%
5%
5%
5%
The antenna size used throughout this document is 3 cm x 5 cm. Refer also to 52H52H51HTable 1
for more details.
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AN145715
PN544 Antenna Design Guide
3. 2B2BTuning Procedure
Please follow the steps below for tuning the antenna. The antenna is matched without
powering the PN544 IC. A detailed description of each step will follow after this chapter.
Step 1: At first the antenna has to be matched to the PN544 as described in
chapter
Outcome: Basic tuning with resonance frequency of 13.56MHz at 80Ohm
56H56H55H4. In this phase C2b is not assembled.
C
RX
RX
R
R
1
2
V
MID
C
VMID
TX1
PN544
TVSS
L
0
EMC
Filter
L
0
TX2
C
1
C
0
Matching
Circuit
C
0
C
1
R
q
C
2
Antenna
C
2
R
q
13.56MHz at
approximately
80Ohm
Matching circuitry and smith chart of antenna in step 1
Step 2: After tuning the antenna, C2b needs to be assembled to connect to ANT1 and
ANT2 pins. The C2 value is therefore split-up. This means if C2 is calculated and
assembled with 47pF in Step 1, then this values is split up into 20pF for C2a and 27pF
for C2b (see chapter
56H6B6BStep 4 – Card mode tuning).
Outcome: C2 splits into C2a and C2b. (By assembling C2b, the matching circuit
is now configured for card mode)
Note: The resonance frequency of the card mode is measured contactless as
described in
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NXP Semiconductors
AN145715
PN544 Antenna Design Guide
Step 3: This step includes the validation of the Reader/Writer matching, which is
simulated by shortening the two C2b capacitors with a 10 Ohm resistor. An
asymmetric impedance curve with R
network analyzer. Further details on fine-tuning can be found in chapter
Outcome: Asymmetric Reader/Writer tuning at 13.56MHz with R
=80Ohm at 13.56Mhz shall be seen on the
match
57H57H6.
=80Ohm
match
Smith chart of the asymmetric Reader/Writer tuning
Step 4: By removing the 10Ohm resistor, the matching circuit is configured for card
mode. The PN544 has to be powered and configured as card. The resonance
frequency should be in the range of 14.5 to 16Mhz. Further details on tuning can be
found in chapter
58H58H58H7.
Outcome: Card tuning in between 14.5MHz to 16MHz measured with impedance
analyzer.
Attention
Step 3 and Step 4 may be repeated to find a good compromise between
Reader/Writer and card mode tuning. The target of the tuning is to find component
values such that in
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AN145715
PN544 Antenna Design Guide
4. 3B3BStep 1 – Antenna Matching
The RF block diagram shows the circuitry design with all relevant components required
to connect an antenna to the PN544. It also ensures the transmission of energy and data
to the target device as well as the reception of a target device answer.
R2
R
Fig. 3 Block diagram of the complete RF part
59H59H59HFig 6 shows only the RF part. For a proper operation the supplies and the host interface
have to be connected
The EMC filter reduces 13.56MHz harmonics and performs an impedance
transformation.
The Matching Circuit acts as an impedance transformation block and joins the antenna
to the EMC-filter.
The Antenna coil itself generates the magnetic field.
The RX path provides the signal to the PN544 internal receiving stage.
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NXP Semiconductors
AN145715
PN544 Antenna Design Guide
4.1 12B12BEquivalent circuit
The following subchapters describe the matching procedure. It starts with the
determination of the antenna parameters and ends with a fine tuning of the antenna
circuitry.
4.1.1 26B26BDetermination of series equivalent circuit
The antenna loop has to be connected to an impedance or network analyzer to measure
the series equivalent components.
The equivalent circuit (see
conditions especially if the antenna will be operated in metal environment or a
ferrite will be used for shielding.
60H60H60HFig 7) must be determined under final environmental
R
a
C
a
L
a
Antenna
Fig. 4 Series equivalent circuit
Typical values:
= 0.3...3µH
L
a
= 3...30pF
C
a
= 0.3...8Ω
R
a
= self-resonance frequency of the antenna
f
ra
The antenna capacitance C
C
=
a
()
21⋅⋅
π
can be calculated with:
a
2
Lf
ara
The antenna parasitic capacitance Ca should be kept low to achieve a self-resonance
frequency > 35 MHz.
(1)
4.1.2 27B27BCalculation of damping resistor RQ
The quality factor of the antenna is calculated with
Application Note Rev. 1.5 — 28th August 2009 9 of 43
a
R
a
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NXP Semiconductors
AN145715
PN544 Antenna Design Guide
If the calculated value of Qa is higher than the target value of 35, an external damping
resistor R
has to be inserted on each antenna side to reduce the Q-factor to a value of
Q
35 (±10%).
The value of R
R
Q
(each side of the antenna) is calculated by
Q
⋅
L
ω
⎛
5.0
⋅=
a
⎜
35
⎝
⎞
−
R
⎟
a
⎠
4.1.3 28B28BDetermination of parallel equivalent circuit
The parallel equivalent circuit of the antenna together with the added external
damping resistor R
be sure to achieve the required value of Q=35.
The equivalent circuit (
especially if the antenna will be operated in metal environment or a ferrite will be
used for shielding.
has to be measured. The quality factor should be checked again to
Q
61H61H61HFig 8) must be determined under final environmental conditions
C
Fig. 5 Parallel equivalent circuit
RpaL
pa
pa
The following formula applies
=
LL
ˆ
apa
=
CC
ˆ
apa
⋅
ω
=
R
ˆ
pa
2
)(
L
a
2
⋅+
RR
Qa
R
Q
Antenna
R
Q
4.2 13B13BEMC filter design
The EMC filter circuit for the PN544 fulfills two functions: the filtering of the signal and
impedance transformation block. The main properties of the impedance transformation
are:
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PN544 Antenna Design Guide
AN145715
4.2.1 Capacitive tuning of antenna
Due to detuning effects in close distance between reader and card antennas a capacitive
tuning is recommended.
Fig. 8 Smith diagram for capacitive antenna tuning
It is accomplished by lowering C0 compared to the design guidelines given for the first
generation NFC devices.
The reason for the higher cut-off frequency is a higher stability with close coupling
devices in reader mode: less detuning effect. Minimum field strength of 1.5A/m can be
provided also with close coupling devices.
4.3 14B14BMatching circuit design
4.3.1 29B29BComponent calculation
The following formulas apply for the series and parallel matching capacitances:
Application Note Rev. 1.5 — 28th August 2009 13 of 43
1
≈2
2
ω
−
L
pa
⋅
ω
2
1
RR
⋅
⋅
patr
C
pa
4
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AN145715
PN544 Antenna Design Guide
Finally, a fine tuning of the matching circuit is often necessary, since the calculated
values are based on simplified equations and the equivalent circuit values contain some
errors as well.
4.4 15B15BTuning procedure
The matching circuit elements C
resistance R
R
+ jX
match
(X
match
is measured with an impedance or network analyzer. The Z
match
= 0) at the PN544 TX pins. The matching impedance Z
match
between TX1 and TX2 as shown in
analyzer.
and C2 must be tuned to get the required matching
1
match
point
match
62H62H62HFig 12 is the probing point for the network/impedance
=
Fig. 9 Measurement of matching impedance
63H63H63HFig 13 shows the smith chart simulation for Z
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PN544 Antenna Design Guide
All tuning and measurement of the NFC antenna has to be performed at the final
mounting position to consider all parasitic effects like metal which influences the
quality factor, the inductance and parasitic capacitance.
4.4.1 30B30BTransmitter matching resistance R
The transmitter (TX) matching resistance R
match
defines the equivalent resistance at the
match
operating frequency present between the transmitter output pins TX1 and TX2 of the
PN544. Different equivalent resistive loads lead to different transmitter supply currents.
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PN544 Antenna Design Guide
4.6 17B17BReceiver circuit design
Next step, after matching and tuning the Reader/Writer antenna, is the design and tuning
of the receiver circuit. The investigations need to be carried out for initiator and target
mode.
65H65H65HFig 17 shows the relevant components for the receiver circuit. R
divider which has to be adjusted according to the incoming voltage levels at U
Both, Initiator and Target mode of the NFC device have to be investigated, since
detuning effects on the RX path behave differently.
The voltage on RX pin U
must be measured with a low capacitance probe (< 2 pF)
RX
for continuous transmitting mode
The voltage URX must not exceed the maximum value U
antenna is detuned by a target or passive card
and R2 form a voltage
X
RX
=1.7V even when the
RXmax
and UC0.
Hence, the RX-point must be checked under following conditions:
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PN544 Antenna Design Guide
5. 4BBStep 2 – Connecting ANT1 and ANT2 pins
In step 1 we successfully tuned the matching circuit to a resonance frequency at
13.56 MHz at around 80Ohm. The circuit of step one is again outlined in
R2R
55B54B55B54B67H67H67HFig 20.
Fig. 17 Block diagram for Step 1
The goal in step 2 is now to connect the ANT1 and ANT2 pins to the matching circuit.
Therefore, we decouple the signal after the damping resistors Rq with two additional
capacitances. Refer also to
68H68H68HFig 21 for connection details.
CRX
Fig. 18 Antenna topology with connection to ANT1 and ANT2 by assembling C2b
C2a and C2b are derived from the capacitor C2. The splitting ratio must be calculated.
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AN145715
PN544 Antenna Design Guide
Therefore, the resonance formula 69H69H69H(11) is used to calculate the required capacitance for
13.56MHz in Reader/Writer and 14.5-16MHz in card mode. The inductance of the
antenna has already been measured in a previous step.
f
=
res
1
CL
⋅⋅
π
2
2
)2(
C
fres
=
1
⋅⋅
π
f
res
L
Example for a given inductance value L=3.09uH:
C
C
C
C
=44.66pF
13.56MHz
=32pF
16MHz
- C
13.56MHz
= 12.66pF
shift
16MHz
= 12.66pF
In other words, the total parallel capacitance for the reader mode needs to be 12.66pF
higher than in card mode.
With this information, C2a and C2b can be calculated.
C2 is already given from the previous steps and reflects the C
C2 = C2a + C2b
C2b = 2. C
= 12.66pF
C
shift
shift
C2b=25.32pF Æ 27pF normalized value
C2a = C2 – C2b = 47pF – 27pF = 20pF
In Step 3 and 4 the values/circuitry have to be fine-tuned, because different resonance
frequencies are required in Reader/Writer and card mode and available discrete
components.
6. 5B5BStep 3 – Reader/Writer fine-tuning
All tuning steps for the PN544 need to be done without powering the chip.
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AN145715
PN544 Antenna Design Guide
In order to simulate the Reader/Writer behavior of the antenna, C2b capacitors need to
be shortcut with a 10 Ohm resistor. In the final application this will be taken over by
PN544 so do not forget to remove the part after finishing the tuning.
What is the effect?
When shortening C2b with 10Ohm resistance C2b acts as additional capacitance parallel
to C2a and causes a frequency shift.
CRX
Fig. 19 Block diagram for Reader/Writer tuning with 10Ohm short
50B50BMeasurement of antenna tuning
The probes of the network analyzer are connected to Probe 1 and Probe 2 as indicated
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PN544 Antenna Design Guide
CRX
Fig. 21 Block diagram for card mode tuning with removed 10Ohm resistor
The measurement shall show a resonance in the range of 14.5MHz to 16Mhz.
52B52BModifications if resonance frequency does not meet the requirements
1. Resonance frequency too low:
Change the split ratio of C2a and C2b. Reducing C2a by the same amount of
capacitance which is added to C2b.
Explanation: C2b is not working in parallel to C2a in card mode. A lower value for C2a
means a higher resonance frequency in card mode. Only C2a is working as parallel
capacitance towards the antenna.
2. Resonance frequency too high:
Decrease the split ratio C2b/C2a by reducing C2b and increasing C2a by the same
capacitance value.
C2a+C2b=constant!
Perform a final check: check Reader/Write and card mode tuning again
Application Note Rev. 1.5 — 28th August 2009 28 of 43
2
ba
⋅⋅
avgavg
++⋅
⎤
⎥
⎥
22
⎞
baad
⎟
⎥
avgavgavg
⎠
⎦
bx
ln
avg
⋅=
2
()
wgNbb
+⋅
aoavg
⎡
⎢
⎢
⎢
⎣
2
⎛
⎜
⎝
ba
⋅⋅
avgavg
++⋅
⎤
⎥
⎥
22
⎞
babd
⎟
⎥
avgavgavg
⎠
⎦
Page 29
+
NXP Semiconductors
PN544 Antenna Design Guide
22
⎡
2
3
⎢
⎣
+−+⋅=
⎤
babax
avgavgavgavg
⎥
⎦
x
=
4
ba
avgavg
4
AN145715
8.1.4 37B37BNumber of turns
Depending on the antenna size, the number of turns has to be chosen in a way to
achieve an antenna inductance between 300 nH and 3 µH.
The parasitic capacitance should be kept as low as possible to achieve a self-resonance
frequency > 35 MHz.
A typical the number of turns will be in the range
N
=1 – 6,
a
which is suitable for various applications and antenna sizes.
Due to the coupling coefficient, a low number of turns is preferred. The lower the
numbers of turns, the lower is the influence of coupled devices (e.g. 2
Card, Reader) to the 1
is minimized when reducing the distance between the two devices. The overall
performance loss due to low number of turns is negligible.
st
device. This also means that the detuning effect on the 1st device
nd
NFC device,
8.1.5 38B38BAntenna symmetry
The symmetry in antenna design is absolutely necessary with respect to tuning and EMC
behavior (see
capacitances from the antenna to ground. These currents can cause emissions that hurt
the EMV regulations
77H77H76HFig 29). Otherwise common mode currents are generated due to parasitic
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PN544 Antenna Design Guide
78H78H77HFig 30 shows an example of a symmetric 4-turn antenna design. It can be seen that the
center tap of the antenna is connected to ground. Basically, we do not recommend
grounding the center tap, but leaving it floating. This has the advantage of a virtual
ground point which is floating to achieve symmetry of the antenna. Refer also to
79H79H78HFig 29
where center tap is not connected.
TVSS
Fig. 25 Example symmetric 4-turn antenna
8.1.6 39B39BFerrite shielding
The benefit of a ferrite is to shield an antenna against the influence of metal. A metal
plane could be part of the housing of the NFC device or a ground plane of the NFC
device PCB itself, which has to be connected very near to the antenna. If metal is placed
very near to the antenna the alternating magnetic field generates eddy currents in the
metal. These eddy currents absorb power, and lead to detuning of the antenna due to a
decreased inductance and quality factor. Therefore, it is necessary to shield the antenna
with ferrite for proper operation in close metallic environment.
The following examples should give estimation about the influence of ferrite to the
distribution of the magnetic field.
A circular antenna has been used to simplify the simulation. A circular antenna is
rotational symmetric to the x-axis. Therefore, the simulation can be reduced to a two
dimensional mathematical problem. The simulation estimates the field distribution of a
non-disturbed antenna. It has been assumed an antenna radius of 7.5 cm with 1 turn and
a copper wire of 1mm thickness.
80H80H79HFig 31 shows the two-dimensional magnetic field of the circular antenna.
The right part shows the field distribution. The highest field strength is generated in the
area of the coil.
The left part shows the magnitude of the field strength H over the distance d. The
minimal field strength of H
= 1.5 A/m defined by ISO 14443 is marked with doted
MIN
vertical line.
The shielding effect of the ferrite strongly depends on the ferrite material and the
distance between antenna and influencing material. The shielding effect may be
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PN544 Antenna Design Guide
82H82H81HFig 33 shows a ferrite plane (µ
=40) which is positioned between the metal plane and the
R
antenna coil itself. The field strength very near to the ferrite increases, but the increasing
magnitude does not necessarily result in an increase of the operating distance at H
MIN
value (vertical doted line).
d
Field strength
color map
7.5 cm
Minimum field strength
Hmin=1.5 A/m
metal planeferrite plane
0264
Fig. 28 Ferrite shielded field distribution of a circular antenna
The simulation shows that the use of a ferrite reduces the generated eddy currents in a
metal plane. The ferrite generates an additional field component, which results in a fixed
detuning of the antenna itself.
8.1.7 40B40BAntenna quality factor
The quality factor is a determining constraint to design and tune an antenna.
shows an excerpt of a typical 100% ASK modulation. The maximum timing limit of 3us
(as defined in the ISO14443) for a modulation pause is taken to calculate the quality
factor.
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8.2 21B21BEquivalent circuit measurement
8.2.1 44B44BImpedance analyzer with equivalent circuit calculation
Impedance analyzers like Agilent 4294A or 4395A can determine directly the series or
parallel equivalent circuit by measuring the magnitude and the phase of the impedance
of the connected antenna.
The antenna has to be at the final mounting position to consider all parasitic effects like
metal influence on quality factor, inductance and additional capacitance.
The antenna needs to be connected to the analyzer by using an appropriate test fixture
that does not influence any antenna parameters.
59B58B59B58BThe analyzer has to be calibrated (open, short and load compensation at the calibration
plane) and the test fixture needs to be compensated (open, short compensation at the
connection points) before each measurement. Please refer to device manual on how to
carry out these steps.
Settings:
Start frequency: 1 MHz
Stop frequency: above self-resonance frequency of the antenna (point where
antenna impedance is real: pure resistance)
Advantage:
Fast and simple method
Disadvantages:
Additional equipment required
Low accuracy of the measurement which especially results from the loss resistance for
high quality factor coils (Q
Θ,Z
> 60).
pc
8.2.2 45B45BNetwork analyzer
This section briefly describes the determination of the antenna equivalent circuit using a
network analyzer without any equivalent circuit functionality.
The antenna has to be at the final mounting position to consider all parasitic effects like
metal influence on quality factor, inductance and additional capacitance.
The antenna needs to be connected to the analyzer by using an appropriate test fixture
that does not influence the antenna parameters.
The analyzer has to be calibrated (open, short and load compensation at the calibration
plane) and the test fixture needs to be compensated (open, short compensation at the
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PN544 Antenna Design Guide
The series equivalent resistance of the antenna at the operating frequency f
=
op
13.56MHz can be calculated out of the characteristic circuit.
R
s
C
Fig. 31 Series equivalent resistance calculation
R
a
p
L
a
C
a
R
a
L
a
)(
fresR
p
)56.13(
p
MHzR
=
56.13
fres
()
2
RR
sa
π
+=
p
2
Lf
⋅⋅⋅
aop
)56.13(
MHzR
The parallel equivalent circuit always has to be calculated by means of the series
equivalent circuit using equation
The parallel resistance R
(fres) obtained by measurements has to be calculated to the
p
parallel equivalent value at 13.56MHz. This is accomplished in equation
in equation 90H90H85H(22) is then calculated by using Rp(13.56Mhz).
R
a
88H88H(19).
89H89H84H(21).
8.3 22B22BPULSE shape check
The following pulse shape checks are a quick way for investigating the shaping of
the generated RF-field. Chapter 91H91H86H8.5 points out the pulse shape timings according
to ISO/IEC18092:2004. Please note that always to the latest version of
ISO/IEC18902 is referenced.
The correct measurement techniques needs to be carried out in ISO/IEC 22536
(NFCIP – RF Interface Test methods) and/or ISO/IEC 10373-6 (Identification cards –
Test methods) and ISO/IEC14443!
The Q-factor can be checked by using the fact that the Q-factor has a direct influence on
the edges of the modulation shape.
An oscilloscope with a bandwidth of at least 50MHz has to be used to carry out the
module shape measurements (
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8.4 23B23BPulse shape according to ISO 18092
8.4.1 47B47BBit rate 106kbps
Envelope of carrier amplitude
110%
100%
90%
60%
5%
5%
t
60%
90%
100%
110%
t4
t2
t1t3
Fig. 33 Pulse shape according to ISO 18092, 106 kbps
The time t1-t2 describes the time span, in which the signal falls from 90% down below
5% of the signal amplitude. As the pulse length of PN544 is accurate enough, only the
time t2 has to be checked: the signal has to remain below 5% for the time t2.
The most critical time concerning rising carrier envelope is t4. It must be checked that the
carrier envelope at the end of the pause reaches 60% of the continuous wave amplitude
within 0.4µs.
Pulse shape definitions according to ISO18092, 106 kbps
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9. Appendix B
9.1 How to measure card mode resonance frequency
The card-mode resonance frequency and quality factor depends on the H-field strength.
As a matter of fact, the chip input resistance and capacitance have a dependency on the
antenna voltage. It is recommended to measure the resonance frequency of the DUT in
an unloaded condition, keeping the applied field strength very low, so that the chip can
not power up. Below an antenna voltage of ~ 0.3Vpp the chip input impedance stays
constant over a wide range and the Q-factor has the highest value allowing accurate
resonance frequency measurements.
Basically, the resonance frequency is measured contact less on an impedance analyzer
with a pickup coil defined in the ISO10373-6. A non-conductive distance holder of 1cm
thickness shall be put in-between DUT and pickup coil.
9.2 Calibration and measurement procedure
The following steps guide through the configuration and calibration setup for the Agilent
4395A:
1. Switch on Agilent 4395A and configure as Impedance Analyzer
2. Choose frequency range from 10MHz to 20MHz
a. Start → 10MHz
b. Stop → 20MHz
c. Number of points → 801
3. Calibrate the instrument
a. Cal → Cal Kit → 3.5mm → Return
b. Cal → Calibrate Menu
c. Connect the calibration kit and calibrate to Open, Short and Load → Done
d. Connect the calibration kit with the 50Ohm Load and check the calibration
e. Scale Ref → Autoscale
f. A horizontal run of the curve should be seen now, otherwise repeat the calibration
procedure
4. Fixture compensation
a. Cal → Fixture Compen → Compen Menu
b. Connect pickup coil
c. → Short
d. Control the horizontal run of the curve again
5. → Source → Power → -10dbm
6. Place DUT on top of pickup coil, search for maximum peak and read resonance
frequency
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11. 10B10BLegal information
NXP Semiconductors products in such equipment or applications and
11.1 24B24BDisclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
therefore such inclusion and/or use is for the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
11.2 25B25BTrademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.