NXP Semiconductors MSC7110, MSC7112, MSC7115, MSC7116, MSC7113 Reference Manual
...
Freescale Semiconductor
Reference Manual
MSC711xADSRM
Rev. 1, 6/2007
MSC711x Application Development
System (MSC711xADS) Reference
Manual
MSC7110, MSC7112, MSC7113, MSC7115, MSC 7116, MSC7118,
MSC7119
The MSC711xADS board uses one StarCore™-based 16-bit
MSC711x proce ssor, the MSC7116, along with the
PowerQUICC II ™ MPC8272 as the host processor. The
MSC711xADS board serves as a platform for software and
hardware development in the MSC711x environment.
Developers can use on-board resources and the associated
debugger to perform a variety of tasks, such as downloading
and running code, setting breakpoints, displaying memory and
registers, and connecting proprietary hardware via the
expansion connectors. The MSC711xADS board can also
function as a demonstrati on system, with application software
programmed into its Flash memory.
The board works seamlessly with an evalua tion copy of
CodeWarrior® Development S tudio. The MSC711x family is a
high-performanc e, cost-effective family of DSPs based on the
StarCore
flexibilit y with pe riphe rals a nd performanc e, and over all system
cost savings. Devices in the MSC711x family target highbandwidth highly computat ional DSP applications and are
optimized for packet tele phony a pplications, providing a
competitive price per ch annel for voice over packet systems.
Designed with attenti on to system requirements from the start,
the MSC711x family de livers one core architecture for digita l
signal processing that spans the low to high end.
This manual is an operation gui de for the MSC71 1 xADS board.
It describes the board architecture and functionali ty and
provides instruc tions on how to use the board.
SC1400 core, which offers system solutions,
CONTENTS
1 Overvi ew ........... .............. .............. ........... ............. ..3
1.1 How the MSC711xADS Works ..............................6
1.2 Produc t Do cu m e nt at io n ........ ... ... ................ ... ... .......6
1.3 Third-Party Documentation .................................... 7
2 Hardwar e C onfigura tio n an d Boo t ...... ... ................. 9
2.1 Board Un pa c ki ng ...... ... ... ........ ... ... ................ ... ... ....9
2.2 Board In s ta lla ti o n ......... ... ........ ... ... ................ ... ... ....9
2.3 Board Co nf ig u ra tio n ....... ........ ... ... ................ ... ... ..1 0
2.4 DIP-Switch and Jumper Settings ..........................10
2.5 MSC711xADS Boot .............................................18
2.6 Board Co nt ro ls and Indic at or s ........ ................. ... ..2 0
3 Board-Level Functions ..........................................23
3.1 Reset . ......... ........ ...... ........ ........ ...... ........ ........ ........2 3
3.2 Clocking................................................................ 24
3.3 Power Supply ........................................................ 27
4 Memory Map/Programming Model ......................29
4.1 Memory Map .........................................................29
4.2 Board Control and Status Registers (BCSRx) ......30
5 MSC711xADS Interfaces .....................................37
5.1 HDI16 Host Processor Interface ...........................37
5.2 60x Bus Buffering .................................................40
5.3 MSC711x Connection to the MPC8272 ...............40
5.4 RS-232 P or ts ..... ... ........ ... ... ................ ... ... .............41
5.5 JTAG/ OC E 10 Test Access P or t (T A P ) .... ............. 4 2
5.6 DDR SDRAM Interface ........................................44
5.7 Ethern et ............. ................. ...................... ............. 45
5.8 Synch rono u s D RA M (6 0x B us ) ......... ... ................46
5.9 Flash Memory .......................................................48
5.10 Time-Slot Interchanger (TSI).................................49
5.11 SLIC SLA C In te rface ... ........ ... ... ................ ... ... .....49
5.12 E1/T1 Framer ........................................................50
© Freescale Semiconductor, Inc., 2005, 2007. All rights reserved.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Overvi ew 1
Table 1-1 lists the feat ures , components, an d specificatio ns of the MSC711xADS board.
Table 1-1. Features of the MSC711xADS Boar d
Feature Description
Kit contents (see Figure 1-1):
Full-Featured
Development Kit
Board
Specifications
MSC7116 Device
• MSC711xADS board.
• Evaluati on copy of CodeWarrior Developm ent St udio
• User documen tation.
• Power supply and cables.
• Operating temperature: 0° C to 70° C (room temperature).
• Storage temperature: –25° C to 85° C.
• Dimensions: One single-slot 6U PCI form factor.
• Relativ e hum idi ty: 5% to 90% (non-condensin g)
• +12 V external DC power supply rate for a maximum current of 1.8 A.
•Functionality:
—SC1400 DSP core.
—800 MMACS at 200 MHz.
—408 KB total memory.
—Two time-division multiplex (TDM) interfaces, 128-channels each.
—10/100 Ethernet MAC.
—32-channel DMA controller.
—AHB-Lite internal bus.
—DDR external memory controller interface.
—16-bit enhanced host port.
—JTAG/OCE10 emulator test.
• Process/Voltage:
—0.13 μ, 1.2 V core; 2.5 V–3.3 V I/O
• Power Consumption:
—300 to 400 mW target (200 MHz).
• Packaging
—Pb-free 400 MAPBGA (17 × 17 mm, 0.8 mm pitch).
—Footprint-compatibl e with MSC7110, MSC7112, MSC7113, and MSC7115
• 100 MHz bus frequency, 200 MHz CPM frequency, and 400 MHz over all frequency.
• Efficient , dual-core architec ture that combines the PowerPC 603e ecore® with a separate RISCbased communicat ions processor module.
• Superior integration with featu res optimized for cost-s ensitive designs and sec uri ty-oriented
MPC8272
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
networking applications.
• Economical, powerful integrat ed security engine that supports industry-standard encryption
algorithms.
• Smooth migration path for PowerQUICC™ and PowerQUICC II™ processor-based designs.
• Strong third-party tools support through the Freescale Smart Networks Alliance Program me mb ers.
Overview
Table 1-1. Features of the MSC711xADS Board (Continued)
Feature Description
• MPC8272 is the MSC711x host. The MPC8272 system bus connects t o the MSC711x HDI.
• Host/Slave connection through the 16-bit HDI16 port; the HDI16 interface is accessible via a PCI
backplane multiplexed with PCI signals.
• 32-bit PCI host compatible.
• Host debug thr ough a single JTAG connector suppor ts both the MPC8272 and MSC711x
processors.
• Debugging via either one JTAG chain (MPC8272 and MSC711x device together) or two
independent JTAG connections (MPC8272 separat e fr om the MSC711x device) through the
COP/JTAG connection or the parallel port command converter.
• Flash memory for stand-alone applications.
• Memory:
—8 MB Flash memory for the MPC8272 (16 bits wide).
—64 MB SDR SDRAM for the MPC8272 (64 bits wide).
—32 MB DDR SDRAM for the MSC711x device (32 bits wide).
• Communicati ons ports/external connections (see Figure 1-2):
—10/100Base-T Ethernet port (MII/RMII) using Davicom DM9161 connected to the MSC711x
device.
—10/100Base-T Ethernet port using Davicom DM9161 connected to the MPC8272 device.
—T1/E1 TDM interface using PMC-Sier ra PM4351 connected to the TSI.
—Two PSTN connections using Legerity Le78D110VC/Le77D11xVC (SLI C/SLAC) connect ed to the
TSI.
MSC711xADS
—H.110.
—RS-232 universal asynchronous receiver/transmitter (UART) port (9-pin D-connector attached to
the MPC8272).
—RS-232 port (pins) connected to a UART that is connected to the MSC711x device.
—OCE10/JTAG connector for the MSC711x device.
—Parallel port that includes a JTAG command converter connected to the MP8272 device.
—COP/JTAG connector for the MPC8272.
—High-density (MICTOR) l ogic analyzer connectors to monitor MSC711x signals
—6U P C I fo rm fa c to r.
• MSC711x devices boot through the HDI16 host port or the I2C port.
• After reset, selectable Debug Enable/Disable and Debug Request opti ons.
• Board identification and board status read via the Board Control and Status Registers (BCSRx).
• Variant board configurations available via the dual-in-line package (DIP) switch setting.
• Push buttons for both the host and slave:
— Power-on reset.
—Soft reset.
—Hard reset.
— Abort.
• Time-slo t interchanger (TSI) devi ce connected to the TDM channels on the MSC711x processor;
used as the H110 framer and TDM master .
• SLIC-SLAC interf ace enables use of 6-line commun ication board with Voice-over-Broadband
SLIC/SLAC chip set.
• LEDs indicate power supply, peripheral enables, and software signals.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
cPCI
(Backplane)
Connections
PSTN
Ports
Fast Ethernet
to MSC711x
E1/T1
RS-232
JTAG/OCE10
Parallel
Port
RS-232
Fast Ethernet
to MPC8272
(MPC8272)
(MSC711x)
MSC711x
Device
MPC8272
device
Power
Voltage Input
On/Off
Fuse
JTAG/COP
alignment
indicators
HDI
Figure 1-1. Full-Featured MSC711x Development Kit
Figure 1-2. MSC711xADS External Connections
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Overview
Expansion Header
J1 J2 J4
H.110
MSC7116
OCE10
UART
DDR
HDI16
DDR
DDR
16 MB
16 Bits
MPC8272
PCI
COP
60x Bus
SDRAM
(64 MB)
512
TS Switch
RJ45
RJ45
10/100
PHY
RJ45
16/8 Bit
A D
16 Bit
SCC
FCC
RS-232
10/100
PHY
8 Bit
Flash
Memory
16 Bit
BCSR
T1/E1
Framer
8 Bit
SLICK
SLACK
RJ11
RS-232
9-Pin
9-Pin
16 Bit
I2C
EEPROM
D
A
B
A D
32
XB
60x Bus
Mictor
Mictor
TDM
MAC
2 TDM
Parallel
EPP-to-JTAG
OCE10
COP
1.1 How the MSC 711xAD S Works
The MSC711xADS allows the application engineer to upload software to both the MSC7116 and MPC8272
devices and run that software with emulated debugging devices (JTAG or a PC). The software applic ation can run
in a “bare bones” opera tion with only the MSC7116 and MP C8272 processors or with various input or output data
streams, such as from the E1/T1 connection, the Ethernet connections, or the PSTN connections. You can analyze
the results with the CodeWarr ior debugger or directly analyze the input or output data stream via other methods.
1.2 Product Docu ment ati on
Table 1-2 lists the documentation that supports the MSC711xADS. Documentation is available from a local
Freescale distributor, a Freescale semiconductor sales office, or a Freescale Literature Distribution Center. For
documentation update s, visit the Freescale DSP web site.
MSC711xADS Reference
Manual
MSC711x
Technical Data
Name Description Order Number
Detailed functio nal description of the MSC711xADS board,
including memory and per ipheral configuration, switch
settings, operation, connection s, and programming.
MSC711x features li st and physical, electrical, timing, and
package specifi cations
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Figure 1-3. MSC711xADS Block Diagram
Table 1-2. MSC711xADS Documentation
MSC711xADSRM
MSC711x
Table 1-2. MSC711xADS Documentation (Continued)
Name Description Order Number
MSC711x
Reference Manual
MPC8272 PowerQUICC II™
Family Reference Manual
MPC8272 PowerQUICC II™
Family Hardware
Specifications
SC1000 Family Processor
Core Reference Manual
OCE10 On-Chip Emulator
Reference Manual
Application Notes Documents describi ng specific applications or optimized
Detailed functional description of the MS C711x m em ory and
peripheral configuration, operation, and register programming
Describes the functi onal operation of the MPC8227 2 wit h an
emphasis on peripheral functions.
Details on power considerations, DC/AC elect rical
characteris ti cs, and AC timing specificat ions for the
MPC8272 family of devices
Detailed description of the SC1000 family proc essor cores,
including the SC1400, and instruction set
Information on the architecture and programm ing model of
the OCE10 on-chip emulator, which is the StarCore
implementation of the EOnCE. The OCE10 on- chip emulator
is a peripheral that facilitates debugging the StarCore
SC1000-family processor core and peripherals.
device operation including code examples . Application notes
of particular inter est to d eveloper s worki ng with the MSC71 1x
board are as follows:
• AN2780, Getting Start ed With the MSC711x Application
Development System (MSC711xADS).
• AN2786, MSC711x Desi gn Checklist.
• AN2946, MSC711x Time-Division Multiplexing (TDM)
Usage Examples (with accompanying softwar e).
• AN2945, Booting an MSC711x Device from an MPC8272
Host Using the HDI16 Interfa ce.
• AN2893, MSC711x Memory Controller Usage Guidelines:
Supporting Double Data Rate (DDR) SDRAM Devices.
• AN2888, Glueless Packet Transpor t from PowerQUICC
Network Processor s to MSC711x DSP Devices.
• AN2715, Porting Code from the DSP56300 Family of
Products to the SC140/SC1400 Core.
.
Third-Party Documentation
MSC711xRM
MPC8272RM
MPC8272EC
10180-01
10055-03
Refer to the MSC711x product
pages on the Freescale
Semiconductor web si te.
1.3 Third-Party Docume ntatio n
• PMC-SIERRA PM4351 data sheet
• Infineon PEF20451 data sheet
• Davicom DM9161 data sheet
• Legerity SLIC/SLAC (Le78D110VC and Le77D11xVC) data sheet
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Overview
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Board Unpacking
Hardware Configuration and Boot 2
This chapter provides unpacking, installation, an d hardware preparation instructions for the MSC711xADS. It also
describes the boot procedure and familiarizes you with the board controls and indicators for use during board
operation.
2.1 Board Unpacking
The procedure for unpackin g the MSC711xADS board is as follows:
1. Unpack the equipment from the shipping carton. If the shipping carton is damaged upon receipt,
request that the carrier agent be present during unpacking and inspection of equipment.
2. Refer to the packing list and verify that all items are present.
3. Save the packing material for storing and reshipping equipment.
CAUTION: Avoid touching areas of the integrated circuitry; static discharge can damage
circuits.
2.2 Board Installati on
To install the MSC711xADS, perform the following steps:
1. Determ ine whet her t h e MSC 711xAD S i s to be acc es sed via a JTAG interface or a PC.
a. For JTAG, connect the JTAG device to the JTAG/COP header connect or (P14).
b. For a PC, install the CodeWarrior test software or any other compat ible debugging so ft ware on the
PC. The MSC711xADS is optimized for CodeWarrior test software.
2. Determine whether board operation is to be host- controlled or stand-alone. Make the connections and
configurations accor dingly, as described in
3. If the board is to be inserted into a cPCI rack, configure the JP7 jumper accordingly ( see Section 2.4.14
on page 17).
4. Prepare the equipment for testing. For example, if checking telecom, prepare the phone lines for the
lab, and so on.
5. Configure the MSC711xADS switches and jumpers as described in Section 2 . 4 on page 10 . The
switches and jumpers that must be configur ed before you can proceed to step 6 are as follows:
• RP1 (Core voltage, see Section 2.4.1 on page 12).
• SW6 (JTAG chain options, see Section 2.4.4 on page 13).
• SW7 (I2C EEPROM configuration options, see Section 2.4.5 on page 14).
• JP1 (Ethernet PHY MII/RMII mode, see Section 2.4.8 on page 15).
• Initialize the SDRAM (see Sectio n 5.8 .1 on page 47).
Section 2.3 on page 10.
6. Insert the MSC7116 DSP device into the indicated socket (see Figure 1-2 on page 5). Ensure that the
alignment indicator (a dot) on the device is next to the alignment indicator (a section of metal) on the
chip socket.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Hardware Configuration and Boot
7. Establish the appropriate external connections (for a list of external connections and their locations,
see
Figure 1-2 on page 5).
8. Turn on the MSC711xADS voltage (SW9, as sho wn in Figure 1-2 on page 5). Note that ON is up and
OFF is down. We recommend that you turn off the voltage if the MSC711xADS is unused for more
than 48 hours.
2.3 Board Configurati on
The MSC711xADS can be installe d for either host-controlled or stand-alone operation. In host- controlled
operation, the MPC8272 and the MSC711x processors are both controlled by a host computer and are connected
via a separate JTAG chain or a shared JTAG chain. Use the SW6 swit ch to con fig ur e the M SC 711xAD S JTAG
options (see
• Separate chain. The MPC8272 and the MSC711x processors each independe ntly connects to a JTAG command
converter. The MPC8272 connects via the JTAG/COP connec t or (P14) to a JTAG command converter or
through the parallel port conn ector (P11) to a PC and does not use an external JTAG command converter. The
MSC711x can directly connect through the JTAG/OCE10 connector (P8) via a JTAG command converter.
• Shared chain. Both the MPC8272 and MSC7116 processors share the same JTAG chain. The MPC8272 is the
first device in the chain, so either the JTAG command converter connects to it via the JTAG/COP connector
(P14) or it conne cts to a PC thr ough the parallel port connector (P11) with no use of an external JTAG command
converter. The debugging tool must support the shared JTAG chain option, as CodeWarrior does.
Section 2.4.4):
In stand-alone operation, the host computer controls the M S C711xADS board not through the JTAG port but
through one of its other ports, such as the RS-232 port or the fast Ethernet port. The applic ation program must be
programmed into the board Flash memory for the MPC8272 and into the board I2C EEPROM for the MSC7116.
2.4 DIP-S witch and Ju mper Sett ing s
T o select the desired configuration and ensure proper operation of the MSC711xADS board, you may have to
change the DIP-Switch sett ings before installation. The location of the switches, indicators, DIP-Switches, and
connectors is illus trated in Figure 2-1. The board has been factory tested and is shipped with DIP-Switch settings
as described in the following pa ragraphs. Values can be changed for the following parameters :
• MSC711x internal voltage supply leve l via potentiometer (RP1). See Section 2.4.1 on page 12.
• MSC711x power-up configuration (SW4). See Section 2.4.2 on page 12.
• MSC711x event pin c onfiguration (SW5). See Section 2.4.3 on page 12.
• JTAG opt io n s (SW 6 ). Se e Section 2.4.4 on page 13.
• Select I2C EEPROM address and protection mode (SW7). See Section 2.4.5 on page 14.
• MPC8272 clock mode settings (SW8). See Section 2.4.6 on page 15.
• Main power switch (SW9). See Section 2.4 .7 on page 15.
• MSC711x Ethernet PHY MII/RMII mode (JP1). See Section 2.4.8 on page 15.
• H110 back plane reset (JP2). See Section 2.4.9 on page 16.
• TDM master selection (JP3). See Section 2.4.10 on page 16.
• MSC711x clock-in source (JP4). Section 2.4.11 on page 16.
• MPC8272 Hard Reset Configuration Word source (JP 5). Section 2.4.12 on page 17.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
DIP-Switch and Jumper Settings
J1
J2
J4
J5
P2
P6
P8
P11
P16
P19
SW9
P23
SW10 SW11 SW12
P22
P24
P20
P21
P18
JP7 JP8
SW8
P17
P13
JP5
JP6
SW7
P14
SW6
P15
SW4
SW5
JP2
JP3
P12
P10
P4
P5
P3
SW1 SW2 SW3
JP1
P1
LD1 - LD13
LD16 - LD19
LD14 - LD15
LD27-28
LD25-26
• MPC8272 Hard Reset to MSC711x Hard Reset (JP6). See Section 2.4 . 13 on page 17.
• PCI expansion enable/disable (JP7). See Section 2.4.14 on page 17.
• Host (MPC8272) enable/disable (JP8). See Section 2.4.15 on page 18.
Figure 2-1. MSC711xADS Switch and Jumper Locations
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Hardware Configuration and Boot
ON
4
3
2
1
10
2.4.1 Internal Voltage Supply Level (RP1)
The level of internal (cor e) volta ge is tuned via RP1 and is in the range of 0.8–1.5 V. You can measure voltage
across JS5 with a digital volt meter (DVM) or any other high input impedance voltage measurement devi ce. Core
voltage should be measured and tuned before the MSC711x processor is inserted into its socket.
2.4.2 MSC711x Power-Up Settings (SW4)
The SW4 switches contr ol the conf iguration f or th e MSC71 1x de vice. The se swit ches ar e contr olled th rough Boar d
Control Status Re gis t er 2 (BCSR2) (see
switch is in the ON position, its related signal is deasserted to 0. When the switch is in the OFF position, its relate d
signal is asserted to 1.
Switch BSCR2 Bit OFF ON
1 DBREQ 1 0
2 SWTE 1 0
3 BM1 1 0
Chapter 4, Memory Map/Programming Model, on page 29). When a
Table 2-1. SW4 Switch Settings
4 BM0 1 0
Figure 2-2. SW4 Factory Default Setting
2.4.3 MSC711x Event Pin Configurat ion (SW 5)
The SW5 switches control the configur ation of the MSC711x device and the EVNT[0–4] pins. When a switch is in
the ON position, its related signal is deasserted to 0. When the switch is in the OFF position, its related signal is
asserted to 1.
• Switches 1–5 control the EVNT[0–4] pin stat us.
• Switch 6 controls the JTAG mode. For normal operation it must be set to emulator (OCE10) mode.
• Switch 7 controls the polarity of the HDI contr ol signa ls. The state of this switch is sampled only at power-o n
reset.
• Switch 8 controls the width of the HDI bus. It must remain in 16-bit mode because the host does not support an
8-bit bus.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
DIP-Switch and Jumper Settings
ON
4
3
2
1
10
8
7
6
5
Table 2-2. SW5 Switch Settings
Switch JTAG Chain Options OFF ON
1 EVENT4 1 0
2 EVENT3 1 0
3 EVENT2 1 0
4 EVENT1 1 0
5 EVENT0 1 0
6 TPSEL (JTAG mode) Emulator (OCE10) Scan
7 HDI signal polarity Active high Active low
8 HDI 8-bit bus width 8 bits 16 bits
2.4.4 JTAG Options (SW 6)
Switch SW6 determines the JTAG chain options. When a switch is in the ON position, its related signal is
deasserted to 0. When the switch is in the OFF position, its related signal is asserted to 1.
• The combination of switc hes 1 and 2 determines the type of JTAG connection, as shown in Table 2-3 and Table
2-4.
• Switch 3 controls whether the parall el port connection i s forced. I n normal operati on, th e hardware automatica lly
identifies the connection of the parallel port. On some computers, this may not happen so this switch forces the
connection to the parallel port.
• Switch 4 selects the connection to the I2C EEPROM. Wh e n it is in the ON position, th e I2C EEPROM is
connected to the parallel por t and can be progra mmed directly from the PC parallel port.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Figure 2-3. SW5 Factory Settings
Hardware Configuration and Boot
ON
4
3
2
1
10
Switch Type of Connection OFF ON
1 Chain select 1 1 0
2 Chain select 2 1 0
3 Force paral lel port Auto detection Force connection
4 I2C EEPROM connection MSC711x Parallel port
JTAG Chain Options Chain Select 2 Chain Select 1
Separate OCE10 and COP 0 0
MPC8272 and MSC711x in one chain 0 1
Host mode JTAG chain not supported 1 1
Slave mode JTAG chain not supported 1 0
Table 2-3. SW6 Settings
Table 2-4. Chain Select Encoding
Figure 2-4. SW6 Facto r y Default S e tt i n gs
2.4.5 I2C EEPROM Configuration (SW7)
Switch SW7 determines the I2C EEPROM configuration options. When a switch is in the ON position, its related
signal is deasserted to 0. When the switch is in the OFF position, its related signal is asserted to 1. The default
factory settings f or the MSC711xADS board are 1–4 = ON.
• Switches 1–3 set the EEPROM I2C bus address.
• Switch 4 sets the write protection mode for the EEPROM.
Table 2-5. SW7 I2C EEPROM Settings
Switch EEPROM Configuration OFF ON
1 EEPROM address 0 1 0
2 EEPROM address 1 1 0
3 EEPROM address 2 1 0
4 Write protection Enabled Disabled
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
DIP-Switch and Jumper Settings
JP1
123 123
MII Mode
RMII Mode
Factory Default
2.4.6 MPC8272 Clock Mode Setting s (SW8)
Switch SW8 determines the clock sett ings for the MPC8272 processor. When a switch is in the ON position, its
related signal is deasserted to 0. When the switch is in the OFF position, its related signal is asserted to 1. For
details, refer to the MPC8272 PowerQUICC II™ Family Reference Manual. The default factory settings for the
MSC711xADS board are switc hes 1, 4, 6 = OFF and all other switches are ON.
• Switches 1–3 set MODCK[1–3], respectively.
• Switches 4–7 set MODCKH[0–3], respectively.
• Switch 8 sets the PCIMODCK bit.
Table 2-6. SW8 MPC8272 Clock Configuration
Switch SW8 OFF ON
1 MODCK1 1 0
2 MODCK2 1 0
3 MODCK3 1 0
4 MODCKH0 1 0
5 MODCKH1 1 0
6 MODCKH2 1 0
7 MODCKH3 1 0
8 PCIMODCK 1 0
2.4.7 Main Power Switch (SW9)
Switch 9 is the main power ON–OFF switch. Toggling the switch turns the main power ON (down) or OFF (up).
2.4.8 MSC711x Ethern et PHY MII/RM II Mode (JP1)
JP1 selects the connecti on mode of the Ethernet PHY connected to the MSC711x. The mode must be select ed
before power is turned on.
• In the MII (1-2) position, the PHY is in MII mode (factory default).
• In the RMII (2-3) position, the PHY is in RMII mode.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Figure 2-5. JP1, MII Versus RMII Mode
Hardware Configuration and Boot
12
12
Hard Reset Connected to Back Plane
Factory Default
Hard Reset Disconnected fr om Back Plane
JP2
123
123
TSI
External
Factory Default
JP3
123
123
External
Oscillator
Factory Default
JP4
2.4.9 H.110 Back Plane Reset (JP2)
JP2 selects the connecti on of the MSC711x hard reset to the H.110 back plane.
• When placed, the MSC711x hard reset is connected to the H.110 back plane reset.
• When not placed, the MSC711x hard reset is disconnecte d from the H.110 back plane reset.
Figure 2-6. JP2, Hard Rest Back Plane
2.4.10 TD M Master Sel ecti on (JP3)
JP3 selects the master (clock and frame source) of the TDM channels of the MSC711x.
• In the TSI (1-2) position, the TSI is the TDM master (factor y default).
• In the external (2-3) position, the TSI frame and clock signals are disconnected from the MSC711x. The
MSC711x can be the TDM master or an external master (clock and frame sour ces) can be connected t hrough the
J5 edge connector.
Figure 2-7. JP3 , TSI TDM Master
2.4.11 MS C711x Clock In Source (JP4)
JP4 selects the source for the clock-in input of the MSC711x.
• In the external (1-2) position, the clock-in source is the SMB connector (P9) and the external clock generator
must be used.
• In the oscillator (2-3) posi tion, the clock-in source is the on-board oscillator (S2).
Note: For the mode change to occur, JP4 should be set while the board is powered OFF.
MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
Figure 2-8. JP4, Clock Input setting
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