NXP Semiconductors MPC560xP Design Manual
1 Introduction
The MPC560xP microcontrollers are members of the 32-bit
Qorivva microcontroller family built on the Power
Architecture® technology. The devices are targeted at the
chassis and safety market segment, especially the Electrical
Hydraulic Power Steering, low end Electrical Power Steering
and Airbag applications.
The purpose of this document is to describe hardware design
considerations when developing hardware for the MPC560xP
family of microcontrollers: 5604P, 5603P, 5602P, 5601P. It
will cover topics such as clock generation, decoupling,
Voltage regulator and power considerations. Detailed
reference design schematics and descriptions of the main
components are also contained within this document. Some
general hardware recommendations are also provided.
2 Power Supply
The MPC5604P has a single main/input voltage supply which
can be either 5 V or 3.3 V with a specified tolerance of ±10%
this is converted using the internal VREG to 1.2V ±10% for
the core logic. The user is not permitted to supply the core
logic via an external 1.2 V supply, they must always use the
on-chip voltage regulator (VREG).
Freescale Semiconductor
Document Number: MPC560xPQRUG
Design Guide
Rev. 0, 2012
Hardware Design Guide
MPC560xP devices
© 2012 Freescale Semiconductor, Inc.
Contents
1 Introduction................................................................1
2 Power Supply............................................................1
3 Clock Circuity...........................................................7
4 Analogue to Digital Convertor (ADC)......................9
5 Recommended debug connectors and
connector pin out definitions..................................11
6 MPC56xx high-speed parallel trace
connector.................................................................12
7 Minimum external circuitry....................................14
8 Example communication peripheral
connections..............................................................15
9 Pin Overview...........................................................21
The internal regulator has 3 different domains:
• Low Voltage Domain for 1.2 V output to the core
• High Voltage Domain for 5 V supply
• High Voltage Domain for 3.3 V supply
MPC5604P has 6 different pin supply voltages:
Symbol Description
VDD_HV_REG Voltage regulator supply voltage
VDD_LV_COR 1.2v Core supply
VDD_HV_IO Input/Output supply voltage
VDD_HV_ADC ADC supply and high voltage reference
VDD_HV_OSC Crystal oscillator amplifier supply voltage
VDD_HV_FL Code and data flash supply voltage
HV: High Voltage external power supply for voltage regulator module. These pins must be connected to the power supply
(3.3 V or 5 V).
LV: Low Voltage (1.2 V) internal power supply for the Core, PLL. This voltage is generated by the internal voltage regulator
with external connections available for stability decoupling capacitors. It is further split into three main domains to ensure
noise isolation between critical LV modules within the device: Core, Flash , PLL
HV_ADC dedicated to the Analog to Digital Converter functions.
2.1 Voltage Regulator
The voltage regulator on the MPC560xP converts the main input supply 3.3 V or 5.0 V ±10% to 1.2 V core logic level. The
internal voltage regulator requires an external capacitance to be connected to the device in order to provide a stable 1.2 V low
voltage digital supply to the device.
2.2 Ballast Transistor
The internal VREG requires an external NPN ballast transistor (BCP56, BCP68, BCX68 or BC817) to be connected as given
in Figure 1. The NPN provides a stable low voltage digital supply to the device and serves as the main current source for the
device.
Power Supply
Hardware Design Guide, Rev. 0, 2012
2 Freescale Semiconductor, Inc.
Table 2. Recommended Ballast Transistors
Part Manufacturer Recommended derivative
BCP68 ON semi BCP68
Infineon BCP68-10
NXP BCP68-10; BCP68-25
Fairchild BCP68-10; BCP68-25
BCX68 Infineon BCX68-10;BCX68-16; BCX68-25
Fairchild BCX68
BC817 Infineon BC817-16; BC817-25; BC817SU
NXP BC817-16; BC817-25
Fairchild BC817-16;BC817-25; BC817-40
BCP56 ON semi BCP56-10
Infineon BCP56-10; BCP56-16
NXP BCP56-10; BCP56-16
Fairchild BCP56
ST BCP56-16
The ballast transistor provides regulator stability. Stability refers to the way which the regulator reacts to changes in the load.
An unstable circuit may enter a state of continuous oscillation.
Figure 1 represents a typical example of the ballast transistor circuitry.
Power Supply
Hardware Design Guide, Rev. 0, 2012
Freescale Semiconductor, Inc. 3
BCTRL
VDD_LV_COR
C
DEC3
C
DEC2
C
DEC1
VDD_HV_REG
BCP56,
BCP68,
BCX68,
BC817
MPC5604P
Figure 1. Configuration without base resistor
BCTRL - (Voltage Regulator external NPN Ballast base control pin) controls the current on the base of the transistor. The
current is increased to raise the voltage on the VDD and decreases to lower the voltage. The gain of the transistor controls the
maximum current available on the supply pin. The gain should be high enough to allow for startup and low enough to prevent
the regulator becoming unstable.
Symbol Parameter Conditions Min Typ Max Unit
V
DD_LV_REGCOR
Output voltage
under maximum
load run supply
current
configuration
Post-trimming 1.15 - 1.32 V
C
DEC1
External
decoupling/
stability ceramic
capacitor
4 capacitances 40 56 - µF
R
REG
Resulting ESR
of all four C
DEC1
Absolute
maximum value
between 100
kHz and 10
MHz
- - 45 mΩ
Table continues on the next page...
Power Supply
Hardware Design Guide, Rev. 0, 2012
4 Freescale Semiconductor, Inc.
C
DEC2
External
decoupling/
stability ceramic
capacitor
4 capacitances
of 100 nF each
400 - - nF
C
DEC3
External
decoupling/
stability ceramic
capacitor on
V
DD_HV_REG
- 40 - - µF
2.3 Capacitors
The ballast transistor requires capacitors to be added for decoupling and stability. The number of capacitors is not important
— only the overall capacitance value and the overall ESR value are important.
• C1 – The capacitance on V
DD_LV
is determined by the stability requirement of the regulator. It is recommended that the
40µF value is split between the V
DD_LV_COR
/ V
SS_LV_COR
pair pins, 4x10µF capacitors placed as close as possibly to
the MCU pins.
• C2 – The 4 x100nF decoupling capacitors are required to filter high frequency noise and smooth the 5 V input signal,
again these should be placed as close as possible to the MCU pins.
• C3 – The 40µF capacitance value is required to meet the voltage drop on the collector and transient requirements,
especially during power-up. It is recommended to place the 40µF capacitor as close as possible to the ballast transistor
collector pin.
47 µF cap can be added to the VDD 5V as a bulk capacitance to reduce ripple from the input supply (optional).
The bypass capacitors serve two purposes:
• To provide (normally dominant) pole to ensure loop stability
• Used as a charge tank for load demand changes. This means if for example load suddenly drops, the cap on the collector
will consume the current until the regulator has adapted to the new situation (and vice versa)
NOTE
Required capacitor values listed in the table include a de-rating factor of 40%, covering tolerance, temperature, and aging
effects. These factors are taken into account to assure proper operation under worst case conditions. X7R type materials are
recommended for all capacitors, based on ESR characteristics.
2.4 Additional design option
The output stage for the power transistor is a class A stage, PMOS power device, loaded with a bit current towards ground.
Thus only the current source towards ground can remove charge in the base of the power transistor, so the turn off delay is
not acceptable. Adding an external resistor base to ground improves the situation and decreases the max available base
current. Using this approach it is possible to reduce load capacitance from 40μF to 20μF as shown in Figure 2. This is
achieved through the addition of an external 20 kresistor added to the base of the transistor. Addition of this pull-down
resistor reduces the response rate of the regulation loop, and therefore reduces the amount of reserve required to respond to
changes in the load. This option may reduce component cost.
Power Supply
Hardware Design Guide, Rev. 0, 2012
Freescale Semiconductor, Inc. 5
BCTRL
VDD_LV_COR
C
DEC3
C
DEC2
C
DEC1
VDD_HV_REG
BCP68,
BCX68,
BC817SU
MPC5604P
R
B
Figure 2. Configuration with base resistor
Note: For 5601P and 5602P the 20k base resistor has been integrated into the MCU and additional component is not required.
Symbol Parameter Conditions Min Typ Max Unit
VDD_LV_REG
COR
Output voltage
under maximum
load run supply
current
configuration
Post-trimming 1.15 ˉ 1.32 V
R
B
External
resistance on
bipolar junction
transistor (BJT)
base
Bipolar BCP68
or BCX68 or
BC817. Three
capacitance s of
10µF
19.5 30 ˉ µF
R
REG
Resulting ESR
of either one or
all three CDEC1
Absolute
maximum value
between 100
kHz and 10
MHz
ˉ ˉ 45 m
C
DEC1
External
decoupling/
stability ceramic
capacitor
Bipolar BCP68
or BCX68 or
BC817SU
Three
capacitances of
10 μF
19.5 30 ˉ µF
Bipolar BC817
One
capacitance of
22 μF
14.3 22 ˉ
Table continues on the next page...
Power Supply
Hardware Design Guide, Rev. 0, 2012
6 Freescale Semiconductor, Inc.
Symbol Parameter Conditions Min Typ Max Unit
C
DEC2
External
decoupling/
stability ceramic
capacitor
Four
capacitances of
440 nF each
1200 1760 ˉ nF
C
DEC3
External
decoupling/
stability ceramic
capacitor on
V
DD_HV_REG
Two
capacitances of
10 μF each
2 x 10µF ˉ ˉ µF
3 Clock Circuity
The MPC5604P has 4 clock sources.
• IRC— internal RC oscillator
• XOSC — external oscillator clock
• FMPLL_0 - 64 Mhz PLL (max) for System clock
• FMPLL_1 - 120 Mhz PLL (max) for Motor control peripherals
The IRC is internal and does not have to be considered from a hardware design perspective. The FMPLL is described in
Section 3.1.
The XOSC external crystal oscillator works in a range from 4 MHz to 40 MHz. The crystal oscillator circuit includes an
internal oscillator driver and an external crystal circuitry. It provides an output clock that can be provided to PLL or used as a
reference clock to specific modules depending on system requirements.
Referring to the schematic of the on-chip oscillator (Figure 3: Reference oscillator circuit), the key items are described in the
following section. The oscillator circuit provides a reference clock signal to the on-chip PLL. The oscillator circuit consists
of:
• the crystal
• two capacitors
• The external bias resistor (R1) is not required as there is an internal bias resistor within the recommended crystals.
However, it is recommended to leave space for one on the PCB to accommodate different crystal configurations in the
future.
Clock Circuity
Hardware Design Guide, Rev. 0, 2012
Freescale Semiconductor, Inc. 7
Figure 3. External crystal circuit
The load capacitors are dependent on the specifications of the crystal and on the board capacitance. It is recommended to
have the crystal manufacturer evaluate the crystal on the evaluation board / PCB.
3.1 Frequency Modulated PLL (FMPLL)
The FMPLL allows the user to generate high speed system clocks from a 4MHz to 40MHz input clock. Futhermore, the
FMPLL supports programmable frequency modulation of the system clock. The PLL has the following major features:
• Input clock frequency from an 4MHz to 40MHz
• Voltage controlled oscillator (VCO) range from 256MHz to 512MHz
• Reduced frequency divider (RFD) for reduced frequency operation without forcing the PLL to re-lock
• Frequency modulated PLL
• Modulation enabled/disabled through software
• Triangle wave modulation
• Programmable modulation depth (±0.25% to ±4% deviation from center frequency)
• Programmable modulation frequency dependent on reference frequency
• Self-clocked mode (SCM) operation
• Input supply : same as core supply : 1.2V
The MPC56xx devices can use either the on-chip oscillator with an external crystal or an external reference clock as the
reference clock to the device. This reference is qualified in multiple manners before the PLL will begin lock operation. The
“pre” FMPLL circuitry consists of an automatic level-controlled amplifier, a comparator, a loss of clock detector, and a
predivider.
Clock Circuity
Hardware Design Guide, Rev. 0, 2012
8 Freescale Semiconductor, Inc.
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