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3-6Possible Configuration of FLASH Memories....................................................3-20
3-7Signal Assignment for Touch Panel Controller.................................................3-24
3-8Pin Assignments of P7.....................................................................................3-26
3-9Pin Assignment of P9.......................................................................................3-27
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SECTION 1
GENERAL INFORMATION
1.1 INTRODUCTION
The DragonBallTM-VZ (MC68VZ328) Application Development System (M68VZ328ADS) is
designed to supply users with an environment to develop MC68VZ328 based application
software. Moreover, this board can be used as a reference for real-life product design.
M68VZ328ADS provides several interface ports for application software and target board
debug purpose. This document will discuss the usage and system details of the
M68VZ328ADS.
1.2 FEATURES
• MC68VZ328 CPU
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• Memory Subsystem
—4 MB FLASH
—8 MB SDRAM (Expandable to 16 MB)
• Debug ports
—Two RS232 serial ports interface to MC68VZ328 internal UARTs
—Direct logic analyzer interface to system bus
• LCD and Touch Panel Interface
—MC68VZ328 LCD interface
—Burr-Brown 12-bit touch panel controller ADS7843E available for pen input
•LEDIndicators
—Red LED for power
—Green LED for system heart beat
—Yellow LED for status of MC68VZ328 pin PD0
—Yellow LED for status of MC68VZ328 pin PD1
• Board operation mode support
—MC68VZ328 normal mode
—MC68VZ328 bootstrap mode
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• Debug Monitor
—MetroWerks Codewarrior Target Monitor using serial port
—SDS source-leveldebugger monitor by Software Development SystemInc. using se-
rial port
• Clock Source
—32.768KHz for MC68VZ328 internal PLL
• Power Supply
—3.0V - 3.3V main power supply
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General Information
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1.3 RELATED DOCUMENTATION
The following documents can be used as references when using M68VZ328ADS.
• MC68VZ328 User’s Manual
• MC68VZ328 Product Information
1.4 TECHNICAL SUPPORT
1.4.1 M68VZ328ADS
For getting the latest information, please visit our web page:
There are three source-level debuggers for DragonBallTM-VZ. The contact information is
listed below.
1. Metrowerks
http://www.metrowerks.com
2. Single Step Development
http://www.sdsi.com
3. Microtek SLD
http://www.microtekintl.com
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SECTION 2
QUICK INSTALLATION GUIDE
2.1 OVERVIEW
This section provides a description of the evaluation module, requirements, quick installation and test information. Detailed information on the M68VZ328ADS design and operation
is provided in the remaining sections of this manual.
2.2 EQUIPMENTS REQUIRED
The following equipments are required to use with the M68VZ328ADS Application Development System, some of them are already bundled with the ADS package.
• Powersupply − 3.0V-3.3V,1500mA, with 2 mm female (inside positive)power connector
• RS-232cable(DB9maletoDB9female)
• IBMPC compatible computer (486 class or higher) runningWindows3.1 and DOS 6.0
(or higher), or Windows 95, with an RS-232 serial port capable of 9600-115200 bit per
second operation
2.3 INSTALLATION PROCEDURE
Pls. follow the procedure below to set up M68VZ328ADS.
1. Prepare the M68VZ328ADS board
2. Connect the M68VZ328ADS board to PC and power supply
3. Install software debugger
2.3.1 Prepare the M68VZ328ADS board
Locate the DIP switches on the M68VZ328ADS board and select appropriate monitor and
debug port for your debugger.
Figure2-2 shows thefactory defaultDIP switches settings.This settingselects to useMetro-
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works monitor and UART1 of DragonBall-VZ as the debug port. Other possible settings are
showninFigure2-3,Figure2-4andFigure2-5.
For detail description of each switch. Pls. refer to Table 3-1 and Table 3-2.
For additional information on the M68VZ328ADS and its components. Pls refer to Section 3 .
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Quick Installation Guide
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Figure 2-1. M68VZ328ADS Key Component Layout
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Quick Installation Guide
Monitor and Debug port selection
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S1
ON
12345678
Figure 2-2. Default DIP Switch Options for Metrowerks monitor using UART1
S1
ON
12345678
Figure 2-3. DIP Switch Options for Metrowerks monitor using UART2
S2
ON
12345678
S2
ON
12345678
S1
ON
12345678
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Figure 2-4. DIP Switch Options for SDS monitor using UART1
S1
ON
12345678
Figure 2-5. DIP Switch Options for SDS monitor using UART2
S2
ON
12345678
S2
ON
12345678
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Quick Installation Guide
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2.3.2 Connecting M68VZ328ADS to PC
Figure 2-6 shows connections among the PC, the external power supply and the
M68VZ328ADS board. Use the following steps to complete cable connections:
Host Computer
COM1
/COM2
RS232 Cable
3.0-3.3V
Power Supply
UART2
UART1
M68VZ328ADS
Figure 2-6. Connecting PC to UART1 of M68VZ328ADS
For m ost evaluation platforms, serial communication is the primary channel to link up PC
withthe target board.Both Microtek (SLD)and SoftwareDevelopment System (SDS)debug
monitor support serial communication through UART port. The procedure are as follows.
1. Connect a RS232 cable from COM port (COM1 or COM2) to connector P2 of
M68VZ328ADS.
2. Connect the power supply +3V or power adaptor to the P1 of M68VZ328ADS
3. Turn on the power supply. The RED LED will flash and the GREEN LED will illuminate
when power is correctly applied.
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2.3.3 Installing software debugger
The following software debugger supports M68VZ328ADS:
• Metrowerks Codewarrior
• Single Step Development System
•SLD
Metrowerks Codewarrior
A simple procedure for using Metrowerks Codewarrior Target Monitor:
1. Install the Metrowerks Codewarrior IDE
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Quick Installation Guide
2. Run Codewarrior IDE program.
3. Open a new project file with Embedded 68k Stationery.
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4. Select ADS_68VZ328 Stationery for new project.
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Quick Installation Guide
5. Choose "Enable Debugger" from the "Project" pull-down menu.
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6. Change the connection settings in the Debug Settings Windows.
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Quick Installation Guide
7. Edit the code inside the Codewarrior IDE program.
8. Press F5 to run the program.
Single Step Development System
A simple procedure for using Single Step Debugger:
1. Install the Single Step Debugger on your PC.
2. Run Single Step Debuger
3. Choose Debug in the File pull-downmenutoopentheDebug pop-up window.
4. InsidetheDebug pop-upwindow,choose theobjectfile todownloador "debugwithout
file" asshownin Figure 2-7, select the serial port(COM1 or COM2 ...) accordingto the
serial port of the PC connecting to the ADS, disable "hardware flow control" and the
baud rate should be 115200bps as shown in Figure 2-8.
5. The fileshould be downloadedand then you can start your development. (For details,
please refer to the SingleStep User’s Manual).
SECTION 3
HARDWARE DESCRIPTION AND BOARD OPERATION
3.1 OVERVIEW
Figure 3-1shows the block diagram of M68VZ328ADS.
Logic Analyzer
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Extension
Connectors
Single
Tone
Generator
PWMO
Touch
Panel
Controller
Extension
MC68VZ328
Connector
FLASH
1M x 16-bit
SDRAM
4M x 16-bit
UART SIGNALS
RESET
FLASH
1M x 16-bit
SDRAM
4M x 16-bit
Reset
Circuit
Address Bus
Data Bus
Control Bus
UART
and
IRDA
Interface
IRDA
UART1
UART2
Power
Connector
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4-bit LCD
8-bit LCD
LCD Connectors
Figure 3-1. M68VZ328ADS Functional Block Diagram
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RESET
GND
ABORT
GND
Hardware Description and Board Operation
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3.2 CONTROL SWITCHES
There are two push buttons on the ADS which function as follows:
1. Reset Switch (SW2): When pressed, a hardware reset is generated to the
MC68VZ328 processor and resumes operation.
2. Abort Switch (SW1): This switch is used to generate a level 7 interrupt to the
MC68VZ328 processor for aborting normal software execution and returning control
to the debug monitor.
3.3 DIP SWITCHES
There are two DIP switch packs on the ADS board, S1 and S2. S1 is used to configure the
memory system and operation modes. S2 is used to enable the on-board peripheral such
as buzzer and touch panel controller. Table 3-1 and Table 3-2 show the description of each
switch.
* Used as monitor and debug port selection in provided monitor program
3.4 OPERATION MODES
M68VZ328ADS supports two operation modes of MC68VZ328: Normal Mode and Bootstrap Mode. Selection of those operation modes is controlled by setting DIP switch S2-8.
Operation mode has to be selected before resetting the system. Mode is not allowed to be
changed during normal runing. Table 3-3 shows the operation mode configuration.
Normal mode - After power up or system reset in this mode, CSA0 is default to cover the
whole memory map except MC68VZ328 internal registers and EMU space. Also, as reset
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Hardware Description and Board Operation
Table 3-3. Operation Mode Setting
DIP Switch S2-8Operation Mode
ONBootstrap
OFFNormal
vector fetch is at the beginning of CSA0 space, *CSA0 should be connected to the boot
ROM in which the first two words are reset vectors. The default boot ROM of the
M68VZ328ADS has been programmed with monitor when it is shipped out from factory. Pls.
refer to Quick Installation part for detailed description on the selection of monitor and debug
port.
Bootstrap mode - When this mode is selected, the DragonBall-VZ will start its embedded
bootloader. User can use this mode to do simple debugging or reprogram the flash memories. For detailed bootstrap mode operation, please refer MC68VZ328 user’s manual.
3.5 LED INDICATORS
There are four LED indicators on the ADS which function as shown in Table 3-4.
Table 3-4. Function of LED Indicators
Reference #ColorNameFunction
LED1YellowPD0Status of PD0
LED2YellowPD1Status of PD1
LED3RedHeart BeatBlinking heart beat indicates the system is "alive"
LED4GreenPowerPower is applied to the system with right polarity
The LED3 is connected to a counter. The counter is toggled by address line A1.
3.6 MEMORY
M68VZ328ADS provides on-board Flash memory and SDRAM, for application development. They can be enabled or disabled individually by setting the corresponding DIP
switches.
3.6.1 Memory Map
The defaultmemory map of M68VZ328ADSin normal mode is shownin Table 3-5. The chip
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select range to all of the memory are software programmable. Users can reconfigure the
memory map for their applications.
M68VZ328ADS is equipped with two 2M-byte Flash memory chips. Figure 3-2. shows the
interface of them. They are chip-selected by *CSA0 and *CSA1 signals. The connection of
these *CSAx signals to the Flash memories is controlled by DIP switches S2-1, S2-2 and
S2-3.
When S2-1 and S2-3 are close, *CSA0 connects Flash0 and *CSA1 connects Flash1.
Flash0 becomes the boot ROM. When S2-1 and S2-3 are open and S2-2 is close, *CSA0
connects Flash1 only. Flash1 will then be boot ROM instead. So, user can select either
FLASH0 or FLASH1 to be the boot ROM. These configuration allow users to put their application program to boot ROM without having to erase the on-board monitor program.
Table 3-6 summaries the possible configuration of the S2-1, S2-2 and S2-3.
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Table 3-6. Possible Configuration of FLASH Memories
For more details on flash memory programming, please refer to Appendix B .
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3.6.3 SDRAM
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Hardware Description and Board Operation
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MC68VZ328
VCC
S2-5
CSD1
S2-4
CSD0
SDCE
SDCLK
CSC0
CSC1
DQMH
DQML
SDWE
A[1..20]
D[0..15]
VCC
CS
CKE
CLK
RAS
CAS
UDQM
LDQM
WE
A[1..12], BS0,BS1
D[0..15]
Figure 3-3. Interface of SDRAMs
4MX16-Bit SDRAM
CS
4MX16-Bit SDRAM
SDRAM1
SDRAM0
Figure 3-3. shows the interface of SDRAMs. M68VZ328ADS supports two banks of 4Mx16bit SDRAMs. However, only one bank is installed when the board is shipped out from the
factory. This allows user to install and test their own SDRAM when needed. These two
banks of SDRAM are selected by *CSD0 and *CSD1, and enabled by closing DIP switches
S2-4 and S2-5.
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