This reference manual describes in detail the hardware on the 56F8300 Demonstration Board.
Audience
This document is intended for application developers who are creating software for devices using
the 56F8300 Demonstration Board.
Organization
This manual is organized into two chapters and one appendix.
•
Chapter 1, Introduction provides an overview of the Demonstration Board and its features.
Chapter 2, Technical Summary describes the 56F8300 Demonstration Board in detail.
•
•Appendix A, 56F8300 Demonstration Board Schematics contains the schematics of the
56F8300 Demonstration Board
Suggested Reading
Related documentation for the 56F800E family of controllers may be found at:
freescale.com
Preface, Rev. 4
Freescale Semiconduc torix
Preliminary
Page 10
Notation Conv e ntio ns
This manual uses the following notational conventions:
T ypeface, S ymbol or
Term
Courier
Monospaced Type
ItalicDirectory names,
Code examples//Process command for
project names,
calls,
functions,
statements,
procedures,
routines,
arguments,
file names,
applications,
variables,
directives,
code snippets
APIs
in text
MeaningExamples
BoldReference sources,
paths,
emphasis
line flash
...and contains these core
directories:
applications cont ai ns
applications software ...
...CodeWarrior project,
3des.mcp is...
...the pConfig argument....
...defined in the C header file,
aec.h....
...refer to the Targeting
MC56F80x Platform
manual....
...see: C:\Program
Files\help\tutorials
Typeface, Symbol
or Term
Courier
Monospaced Type
Italic
Bold
Blue TextLinkable...refer to Chapter 7,
License....
NumberAny number is
3V
considered a positive
value, unless
-10
preceded by a minus
symbol to signify a
DES
-1
negative value
ALL CAPITAL
LETTERS
# defines/
defined constants
# define
INCLUDE_STACK_CHECK
Brackets [...]Function keys...by pressing function key
[F7]
56F8300 Demonstration Board User Manual, Rev. 4
Blue Text
Number
ALL CAPITAL
LETTERS
Brackets [...]
x Freescale Semiconductor
Preliminary
Page 11
Cautionary Notes
1. Electrostatic Discharge (ESD) prevention measures should be applied whenever handling
this product. ESD damage is not a warranty repair item.
2. Axiom Manufacturing reserves the right to make changes without further notice to any
products to improve reliability, function or design. Axiom Manufacturing does not
assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under patent rights or the rights of
others.
3. EMC information on the 56F8300 Demonstration Board:
a. This product, as shipped from the factory with associated power supplies and cables,
has been tested and meets with requirements of CE and the FCC as a CLASS A
product.
b. This product is designed and intended for use as a development platform for hardware
or software in an educational or professional laboratory.
c. In a domestic environment, this product may cause radio interference, in which case,
the user may be required to take adequate prevention measures.
d. Attaching additional wiring to this product or modifying the product’s operation from
the factory default (as shipped) may affect its performance and also cause interference
with other apparatus in the immediate vicinity. If such interference is detected, take
suitable mitigating measures.
Terminology
This development board applies option selection jumpers. Terminology for application of the
option jumpers is as follows:
•Jumper on, in, or installed = A jumper is a plastic shunt that fits across two pins; the shunt
is installed so that the two pins are connected with the shunt.
•Jumper off, out, or idle = A jumper or shunt is installed so that only one pin holds the
shunt, two pins are not connected, or the jumper is removed. It is recommended that the
jumpers be idled by installing on one pin so they will not be lost.
This development board applies cut-away option selections. These option selections apply
surface-mount resistor locations with a printed circuit board trace connecting both component
pads. This type of connection places an equivalent 0 ohm-type resistor in series with the I/O
signal and the user component or I/O connector on the board. These connections may be cut with
a razor blade or knife between the component pads to isolate the default connection provided.
Reconnection of the cut-away-type pads can be made by either installing a 0 ohm 0805-size
surface-mount resistor or a small wire jumper on the component pads.
Preface, Rev. 4
Freescale Semiconduc torxi
Preliminary
Page 12
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.
ADC
CAN
CTS
ESD
GPIO
JTAG
Analog-to-Digital Converter
Controller Area Network
Clear To Send
Electrostatic Discharge
General Purpose Input and Output Port
Joint Test Action Group. A bus protocol/interface used for test and
debug.
EOnCE
Enhanced On-Chip Emulation, a debug bus and port created to enable
designers to create a low-cost hardware interface for a professional
quality debug environment.
PC
PWM
RTS
SCI
Personal Computer
Pulse Width Modulation
Request To Send
Serial Communications Interface
References
The following sources were used to produce this manual:
DSP56800E Reference Manual, DSP56800ERM
56F8300 Peripheral User Manual, MC56F8300UM
Technical Data 56F8323 16-bit Controller, MC56F8323
Semiconductor Technical Data / Product Preview, Electric Field Imaging Device, 33794;
MC33794
56F8300 Demonstration Board User Manual, Rev. 4
xii Freescale Semicond uctor
Preliminary
Page 13
Chapter 1
Introduction
The 56F8300 Demonstration Board is used to demonstrate the abilities of the 56F8300 series of
devices and to provide a hardware tool allowing the development of applications that use the
56F8300 devices.
Applications developed for this demonstration board were not designed for the 56F8100 devices.
The 56F8300 demonstration board does, however, fully support 56F8100 software development.
1.1 56F8300 Demonstration Board Features
•MC56F8323 CPU
•MC33794 Electric Field Imaging Device(E-Sensor) peripheral
•RESET Switch
•IRQ Switch
•SW1 user switch
•GPIO / SERIAL Port (16 pin)*
•TIMER / PWM Port (16 Pin)*
•ADC Port (10 Pin)*
•JTAG / EOnCE Port (14 pin)
•Host JTAG Port (P1- DB25P)
•COM1 Port - SCI to RS-232 (DB9S)*
•CAN Port - 1M baud transceiver
•PWR Jack supply connector
•Power Port*
•Power Indicator
•10 User Indicators
•Microphone with amplifier
•Stereo Audio output with filters and AMP 3.5mm Stereo jack, Speaker
* All components may not be installed at the factory. The user may install the components to
apply associated feature.
Introduction, Rev. 4
Freescale Semiconduc tor1
Preliminary
Page 14
The 56F8300 Demonstration Board is detailed in Figure 1-1.
Figure 1-1. 56F8300 Demonstration Board
1.2 SPECIFICATIONS
•+9V DC input voltage typical, 300ma
•Input voltage range: +7 to +15V DC
•On-board regulated +5V DC and +3.3V DC supplies
•Board size: 5.5 x 5.5 inches
56F8300 Demonstration Board User Manual, Rev. 4
2 Freescale Semicond uctor
Preliminary
Page 15
Chapter 2
Technical Summary
This chapter describes the 56F8300 Demonstration Board’s available options.
2.1 OPTIONS
2.1.1 HOST_ENABLE
The HOST_ENABLE option jumper enables the Host JTAG interface on the board. With the
option jumper installed, the 56F8323 device will reset into Debug mode and await Host
commands on the Host JTAG port (P1). Removing the HOST_ENABLE option jumper will
allow the 56F8323 device to reset normally and execute program code contained in the device’s
Flash memory.
•HOST_ENABLE = INSTALLED: Debug Mode; host JTAG port is active
•HOST_ENABLE = OPEN or IDLE: Normal Mode; executes user code in Flash
(default)
2.1.2 JP1 - CAN PORT Termination Enable
JP1 provides connection of a 62 ohm termination resistor (RC1) between the CAN signals on the
CAN port. This termination may or may not be required for the applied CAN network.
2.1.3 JP2 - Host JTAG Interface Level
JP2 selects the interface level of the parallel Host JTAG port (P1). The default setting is +5V, but
the +3.3V position can be selected if the host parallel port is known to use this level.
2.1.4 CUT_AWAY Options
CUT_AWAY options allow the user to disconnect dedicated 56F8323 I/O port resources from
development board connectors or peripherals. The CUT_AWAY options also allow for
establishing the connection again by installing surface-mount 0805-size 0 ohm resistors or mod
wire with the use of a soldering iron. Normal operation of the 56F8300 Demonstration Board
generally does not require manipulation of the CUT_AWAY options. Table 2-1 details
CUT_AWAY options.
Technical Summary, Rev. 4
Freescale Semiconduc tor2-1
Preliminary
Page 16
Table 2-1. CUT_AWAY Options
CUT_AWAY #Description56F801 SignalConnection Signal
1ADC reference supplyV
256F800E On-chip Regulator
control connection
3Temperature Sensor
connection
4Microphone to ADCANA0U7 pin 4 (Microphone ou tput)
5SCI1 serial portSS0 / TXD1U8 pin 11 (SCI1 TXD)
6SCI1 serial portMISO0 / RXD1U8 pin 12 (SCI1 RXD)
7Crystal oscillator isol ationXTAL / PC1GPIO / SERIAL port pin 14
8Crystal oscillator isolationEXTAL / PC0GPIO / SERIAL port pin 13
9Audio Output connectionTC0Audio Out channel 2
10Audio Output connectionTC1Audio Out channel 1 and Speaker
11E-Sensor connectionANA4E-Sensor level input
12CAN Port input connectionCAN_RXCAN transceiver output
REF
OCR_DISGround (enabled)
TEMP_SENSE /
ANA7
V
DDA
56F800E TEMP SENSE output to
ANA7 input
2.2 PORTS AND CONNECTORS
2.2.1 PWR Jack
This connector provides power input to the board by default. The PWR jack accepts a standard
2.0 ~ 2.1mm center barrel plug connector (positive voltage center) to provide the +VIN supply of
+9V DC at 300ma.
2.2.2 POWER PORT
The power port provides access to the +9V DC input, GND (power ground), +5V DC and +3.3V
DC power supplies. The +9V DC input should only be applied by the PWR jack or the Power
Port, but not both, or a supply conflict may occur and the 56F8300 Demonstration Board could
be damaged. The power port accepts a 3.5mm pin space terminal block. Figure 2-1 illustrates the
power port.
56F8300 Demonstration Board User Manual, Rev. 4
2-2 Freescale Semicond uctor
Preliminary
Page 17
PORTS AND CONNECTORS
+5V DC
2.2.3 ADC PORT
ANA6
ANA4
ANA2
ANA0
V
REF
2.2.4 GPIO / SERIAL
IRQA
/ TXDQ / PB0
SS0
RESET
PHASEA0 / TA0 / PB7
PHASEB0 / TA1 / PB6
CAN_RX / PC2
EXTAL / PC0
TEMP_SENSE
1
3
5
7
9
1
3
5
7
9
11
13
15
GND
2
4
6
8
10
Figure 2-1. Power Port
ANA7
ANA5
ANA3
ANA1
GND
MISO01 / RXD1 / PB1
2
MOSI0 / PB2
4
SCLK0 / PB3
6
7
INDEX0 / TA2 / PB5
HOME0 / TA3 / PB4
10
CAN_TX / PC3
12
14
XTAL / PC1
RESET
16
+9V DC
+3.3V DC
Analog inpu ts. ANA 0 provid es MIC inp ut.
ANA4 provides E-Sensor input. ANA7
provides TEMP_SENSE input.
Note: Most signals on this port have
alternate connections on the
development board.
2.2.5 TIMER / PWM
FAULT2 / PA8
FAULT1 / PA7
FAULT0 / PA6
TC0 / TXD0 /PC6
TC3 / PC4
PWMA4 / MOSI1 / PA4
PWMA2 / SS1
PWMA0 / PA0
Freescale Semiconduc tor2-3
Preliminary
/ PA 2
1
3
5
7
9
11
13
15
ISA0 / PA9
2
4
ISA1 / PA10
6
ISA2 / PA11
7
TC1 / RXDO / PC5
10
12
PWMA5 / SCLK1 / PA5
14
PWMA3 / MISO1 / PA3
16
PWMA1 / PA1
Technical Summary, Rev. 4
Note: Most signals on this port have
alternate connections on the
development board.
Page 18
2.2.6 SCI1
The SCI1 port has a femaleDB9 connector that
interfaces to the 56F8323 internal SCI1 serial port via
the U8 RS-232 transceiver. It uses a simple 2-wire
asynchronous serial interface and is translated to
RS-232 signaling levels.
1, 4, 6 connected (host null)
TXD0
RXD0
4ANA0
GND
1
1
2
3
4
5
6
6
CTS
7
8
RTS
9
9
RTS and CTS flow control connection pads are provided on the 56F8300 Demonstration Board
to apply unassigned 56F800E I/O to support flow control on the SCI1 port. The RTS pad
provides RS-232 level output conversion to SCI1 port pin 8. The CTS pad provides RS-232
converted input from SCI1 pin 7.
The 1, 4, 6, and 9 pins provide RS-232 status. The 1, 4, and 6 pins are connected on the bottom
of the development board to provide NULL status to the host. The user may isolate pins and
provide the status connections to the host by applying I/O signals and RS-232 level conversion
2.2.7 CAN Port
The 56F800E CAN provides a 1M baud CAN transceiver and CAN_PORT I/O header. The
CAN port CAN_H and CAN_L network signals are terminated with a 62 ohm resistor that is
enabled or disabled with the JP1 option jumper. CUT_AWAY option number 12 will isolate the
56F800E CAN_RX signal from the transceiver so the PC2 port can be used as a general purpose
I/O. Figure 2-2 illustrates the CAN port.
1
GROUND
CAN_H
CAN_L
Figure 2-2. CAN Port
2.2.8 JTAG / EOnCE
The JTAG 14-pin connector is compatible with the EOnCE development port. This connector
allows the connection of an EOnCE-style background debug cable for software development,
programming and debugging in real time.
56F8300 Demonstration Board User Manual, Rev. 4
2-4 Freescale Semicond uctor
Preliminary
Page 19
USER FEATURES
TDI
TDO
TCK
RESET
+3.3V DC
in
1
2
3
4
5
6
7
7
9
10
111312
14
GND
GND
GND
(key)
TMS
TRST
in
JTAG / EOnCE BDM connection.
Note: This connector is only active if the HOST_ENABLE jumper is open or idle.
2.2.9 P1 - HOST JTAG
The P1 - Host JTAG connector provides development port interface to a hosting Personal
Computer’s LPT or Printer port. The HOST_ENABLE option jumper must be installed for this
port to operate.
P1 - HOST JTAG connector is a DB25
pin connector. Signals are organized for
direct connection to an IBM-compatible
PC with a straight-through DB25 cable.
RESET in
TMS
TCK
TDI
TRST
Pin 15 tie
TDO
P-CON
1
2
3
4
5
6719
8
9
10
11
12
13
14
15
16
17
18
20
21
22
23
24
25
Pin 8 tie
GND
GND
GND
GND
GND
GND
GND
GND
Note: This connector is only active if the HOST_ENABLE jumper is installed.
2.3 USER FEATURES
Several circuits are provided for demonstration of 56F800E applications.
2.3.1 Microphone
A microphone with audio amplifier is provided on the 56F8300 Demonstration Board for user
applications. The amplifier provides low-pass filtering starting at ~4000Hz for speech input.
The audio signal from the microphone amplifier is provided to the ADC ANA0 input channel via
CUT_AWAY option #4.
Technical Summary, Rev. 4
Freescale Semiconduc tor2-5
Preliminary
Page 20
2.3.2 Audio Output, Headset / Speaker
Timer output channels TC0 and TC1 provide input to 4th order 4KHz low-pass filters with audio
amplifier output to the headset jack or speaker. Channel TC1 is the speaker input channel.
Amplifier gain is fixed by resistors R48 and R54 for channels TC0 and TC1, respectively. When
using a headset, be careful to keep volume low. CUT_AWAY pads 9 and 10 will isolate the TC0
and TC1 channels respectively from the audio output.
2.3.3 MC33794 E-Sensor
The E-Sensor device is provided as a user peripheral and allows detection of an object close to
one of the sensor input channels, E1 - E9. Channel E1 is provided with a large sensor plane on
the 56F8300 Demonstration Board. Refer to the MC33794 data sheet for more details.
Table 2-2 details connections between the E sensor and the 56F800E; any unapplied MC33794
connections are available to the user as test pad connections near the device.
Table 2-2. Connections
56F800E I/O PortMC33794 Signal
HOME0Select A
INDEX0Select B
PHASEB0Select C
PHASEA0Select D
ANA4LEVEL
56F8300 Demonstration Board User Manual, Rev. 4
2-6 Freescale Semicond uctor
Preliminary
Page 21
Indicators
2.4 Indicators
The active user indicators provided have a high level on the associated 56F800E device’s I/O
port. Table 2-3 details the indicators.
CAN xii
CAN Port 1-1
CAN port input connection 2-2
CE xi
Clear To Send
CTS xii
COM1 1-1
Controller Area Network
CAN xii
Crystal oscillator isolation 2-2
CTS xii
CUT_AWAY 2-5
G
General Purpose Input/Output Port
GPIO xii
GPIO xii
GPIO / Serial Port 1-1
H
Host JTAG Port 1-1
Host JTAG port (P1) 2-1
HOST_ENABLE 2-5
J
Joint Test Action Group
JTAG xii
JTAG xii
JTAG / EOnCE 1-1
Jumper idle xi
Jumper in xi
Jumper installed xi
Jumper off xi
Jumper on xi
Jumper out xi
D
DB25 2-5
DSP56800E Reference Manual xii
E
Electrostatic Discharge
ESD xi
, xii
EMC xi
Enhanced On-Chip Emulation
EOnCE xii
EOnCE xii
ESD xi
, xii
E-Sensor 1-1
E-Sensor connection 2-2
F
FCC xi
L
low-pass filtering 2-5
M
Microphone to ADC 2-2
microphone with audio amplifier 2-5
O
On-chip regulator control connection 2-2
P
PC xii
Personal Computer
PC xii
Pulse Width Modulation
PWM xii
PWM xii
Index, Rev. 4
Freescale Semiconduc torIndex-1
Preliminary
Page 28
R
Request To Send
RTS xii
RS-232 1-1
RTS xii
S
SCI xii, 1-1
SCI1 serial port 2-2
Serial Communications Interface
SCI xii
Stereo Audio Output 1-1
T
Technical Data / Product Preview, Electric Field Imaging
Device, 33794 xii
Technical Data 56F8323 16-bit Hybrid Controller xii
Temperature Sensor connection 2-2
termination resistor (RC1) 2-1
TIMER / PWM Port 1-1
56F8300 Demonstration Board User Manual, Rev. 4
Index-2 Freescale Semiconductor
Preliminary
Page 29
Page 30
Page 31
Page 32
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