NXP Semiconductors 56800E Reference Manual
Online UPS
Designer Reference Manual
56800E
16-bit Digital Signal Controllers
DRM069
Rev. 0
06/2005
freescale.com
Online UPS
Designer Reference Manual
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TABLE OF CONTENTS
Chapter 1 Online UPS Theory and Description
1.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1.1 The Concept of an Online UPS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1.2 Input Power Factor Control (PFC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1.3 DC-to-DC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.1.4 Phase Locked Loop (PLL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.1.5 Bypass Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.1.6 Rail Ripple. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.1.7 Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.1.8 A Controller Solution to Control a UPS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.2 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.3 System Actuators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.4 Input Rectifier Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.4.1 Rectifier Soft Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.5 Power Factor Corrector (PFC) Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.6 Battery Charger Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
1.7 Battery Booster Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1.8 Inverter Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18
1.9 Pulse Width Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
1.10 Auxiliary Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
1.10.1 Power Supplies and Isolation Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-20
1.10.2 Sensing Circuits and Reference Voltage Generator. . . . . . . . . . . . . . . . . . . . . . . 1-23
1.10.3 Voltage Reference Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-25
1.10.4 Silicon Controlled Rectifier (SCR) Gate Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26
1.10.5 IGBT and MOSFET Gate Drivers Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26
1.11 Power Transfer Circuits (Bypass) Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . 1-27
1.12 Overcurrent Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-28
1.13 Battery Temperature Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-30
Chapter 2 Control Loops In The Online UPS
2.1 Control Algorithms Discrete Equivalents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.2 PFC and Rail Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.3 Battery Charger Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4 Inverter Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.5 Battery Booster Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.6 Minimizing Delay in the Control Loops. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
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Preliminary
Chapter 3 Control Board Design Considerations
3.1 56F8346 Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2 Reset/Modes/Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.3 Program And Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.4 RS-232 Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.5 LCD Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3.6 Peripheral Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3.6.1 Wireless Board Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3.6.2 PWM Ports Expansion Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3.6.3 A/D Ports Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.6.4 Timer A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.6.5 GPIOPort C Expansion Connector (Bits 0—1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.6.6 GPIOPort D Expansion Connector (Bits 10—11) . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.7 Daughter Card Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.8 CAN Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3.9 Debug Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.9.1 JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.9.2 Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.10 A/D Filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3.11 Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
Chapter 4 Operational Description
4.1 Panel Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.2 Operation with EVM or Control Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.2.1 Jumper Configuration for EVM and Control Board Operation. . . . . . . . . . . . . . . . . 4-3
4.3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.3.1 Installing Batteries. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.3.2 Before Applying Power to the UPS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.3.3 Turning the UPS On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
4.3.4 Turning the UPS Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
Chapter 5 Control Software Design Considerations
5.1 Peripheral and I/O Pins Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5.2 Main Execution Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.3 Interrupt Handlers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.3.1 ADC End of Conversion Interrupt Service Routine. . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.3.2 UPS Overcurrent Protection Interrupt Handlers . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5.3.3 Battery Temperature Reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
5.3.4 Delay_Timer_OnInterrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
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Preliminary
5.4 Program Loop Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
5.5 Inverter Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5.6 PFC Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5.7 Battery Booster Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5.8 Battery Charger Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5.9 Phase Locked Loop Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
5.9.1 Phase Discriminator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
5.9.2 Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-18
5.9.3 Sine Wave Look-Up Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
5.10 Frequency Measurement Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-20
5.11 Rectifier Soft Start Routine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
5.12 Root Mean Square (RMS) Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
5.13 Power Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23
5.14 Routine for Measurement of the Battery Stored Charge . . . . . . . . . . . . . . . . . . . . . . 5-23
5.15 General Purpose Digital Filters Used in the Implementation . . . . . . . . . . . . . . . . . . . 5-24
5.15.1 10Hz Low Pass Filter, 2 Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-24
5.15.2 High-Frequency Noise Rejection Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
5.16 Flash Memory Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
5.17 Development Tools Used for Software Implementation . . . . . . . . . . . . . . . . . . . . . . . 5-26
5.17.1 Processor ExpertTM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
5.17.2 Intrinsic 56800E Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.17.3 Direct Register Writes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.17.4 Assembly Inlines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
Chapter 6 Connectivity Software Design Considerations
6.1 Connectivity Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.2 Peripheral and I/O Pins Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.3 Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.3.1 LAN91C111 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.3.2 Network Buffers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.3.3 Ethernet Abstraction Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.3.4 OpenTCP Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.3.5 Application Level Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.4 Connectivity Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.4.1 System Services Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6.4.2 Physical Layer Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.4.3 Network Layers Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.4.4 Application Layer Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
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Preliminary
6.5 Main Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
6.5.1 Stack Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
6.6 Interrupt Handlers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
Chapter 7 Results
7.1 Inverter Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7.1.1 Inverter Waveforms Under No Load Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7.1.2 Inverter Voltage Harmonics Under No Load Conditions. . . . . . . . . . . . . . . . . . . . . 7-2
7.1.3 Inverter Waveforms Under Linear Load Conditions . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7.1.4 Inverter Voltage Harmonics Under No Load Conditions. . . . . . . . . . . . . . . . . . . . . 7-3
7.1.5 Inverter Waveforms Under Full Load Conditions—Battery Operated. . . . . . . . . . . 7-3
7.1.6 Inverter Voltage Harmonics Under Full Load Conditions—Battery Operated. . . . . 7-4
7.1.7 Inverter Transient Response—60W Cold Bulb. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7.1.8 Inverter Transient Response to a Resistive Load (200W) . . . . . . . . . . . . . . . . . . . 7-5
7.2 PFC Performance Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5
7.2.1 PFC Performance Under Full Load Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7.2.2 PFC Performance at 298W Linear Load Conditions. . . . . . . . . . . . . . . . . . . . . . . . 7-6
7.2.3 PFC Performance at 59W Linear Load Conditions. . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7.2.4 PFC—Transient Response to a Load Step. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7.3 Frequence Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8
7.4 Battery Charger Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
7.4.1 Battery Charger Performance, Current and Voltage Waveforms . . . . . . . . . . . . . . 7-9
7.4.2 Battery Charger—Floating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
7.5 Bypass Switch Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
7.5.1 Inverter Bypass Switch Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
Appendix A Schematics
A.1 Control Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A.2 Power Board Schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-15
Appendix B Bill of Materials
B.1 Specifications of Ferromagnetic Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-9
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Preliminary
LIST OF FIGURES
1-1 A Basic Online UPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1-2 UPS Simplified Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1-3 Prototype UPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1-4 Relationship between a 56800E and Power Actuators. . . . . . . . . . . . . . . . . . . . . . 1-5
1-5 Simplified Schematic Diagram of the UPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1-6 Input Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1-7 Full Wave-Controlled Rectifier Bridge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1-8 Relationship between Rectifier Soft Start Operation / Actuator Signals
and the AC Main Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1-9 Typical Rectifier Current vs. AC Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1-10 PFC Current and Voltage Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1-11 PFC Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1-12 Partial PFC Schematic when U1 Is Open and U2 Is Closed. . . . . . . . . . . . . . . . . 1-11
1-13 Partial PFC Schematic when U1 Is Closed and U2 Is Open. . . . . . . . . . . . . . . . . 1-12
1-14 Resulting Parallel Connection between C3 and C7 . . . . . . . . . . . . . . . . . . . . . . . 1-13
1-15 Voltage Boost across Capacitors C3 and C8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
1-16 Battery Charger Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
1-17 Battery Booster Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1-18 Drive Signals for Battery Booster Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
1-19 Signals at Transformer Secondary Windings L10 and L9. . . . . . . . . . . . . . . . . . . 1-16
1-20 Signals at the Cathode of D25 and Anode of D26 . . . . . . . . . . . . . . . . . . . . . . . . 1-17
1-21 Inverter Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18
1-22 Generation of a PWM Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
1-23 H Bridge Configuration used to Provide Multiple Floating Power Supplies. . . . . . 1-20
1-24 Waveforms at A and B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-21
1-25 Current Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-22
1-26 Control Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-23
1-27 Partial View of the Auxiliary Power Supply and Optoisolation Network . . . . . . . . 1-24
1-28 General Design of the Sensing Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-24
1-29 Voltage Reference Generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-25
1-30 SCR Gate Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26
1-31 IGBT and MOSFET Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26
1-32 Bypass Relay Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-27
1-33 Relay Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-28
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1-34 Overcurrent Protection for Rectifier and Inverter . . . . . . . . . . . . . . . . . . . . . . . . . 1-29
1-35 Overcurrent Protection for Charger and Push-Pull . . . . . . . . . . . . . . . . . . . . . . . . 1-29
1-36 Battery Temperature Sensing Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-30
1-37 Battery Temperature Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-31
2-1 PFC and Rail Control Loops (Positive Semicycle) . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2-2 Battery Charger Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-3 Inverter Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-4 Battery Booster Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
3-1 56F8346 Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3-2 Reset Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3-3 Selection Mode and Reset Button. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3-4 Program and Data Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3-5 RS-232 Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3-6 LCD Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3-7 Wireless Board Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3-8 PWM Ports Expansion Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3-9 A/D Ports Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3-10 Timer A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3-11 GPIO Port C Expansion Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3-12 GPIO Port D Expansion Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3-13 Daughter Card Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-14 CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3-15 JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3-16 Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3-17 Passive Low-pass Filters of the A/D Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3-18 Power Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3-19 External Power Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3-20 Power Supply LEDs and Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
4-1 UPS Switches and Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4-2 The OUPS with a Control Board Installed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4-3 Functional Components and Location of Jumpers on the Power Board. . . . . . . . . 4-5
4-4 Jumpers on the Control Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
4-5 The Right Side of the UPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
5-1 Main Routine Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-2 Flow Diagram for the Interrupt Service Routine AD1_OnEnd (1 of 5) . . . . . . . . . . 5-5
5-3 Flow Diagram for the Interrupt Service Routine AD1_OnEnd (2 of 5) . . . . . . . . . . 5-6
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5-4 Flow Diagram for the Interrupt Service Routing AD1_OnEnd (3 of 5) . . . . . . . . . . 5-7
5-5 Flow Diagram for the Interrupt Service Routine AD1_OnEnd (4 of 5) . . . . . . . . . . 5-8
5-6 Flow Diagram for the Interrupt Service Routine AD1_OnEnd (5 of 5) . . . . . . . . . . 5-9
5-7 Overcurrent Management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5-8 Battery Temperature Reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
5-9 Program Loop Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5-10 Inverter Control Loop Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5-11 PFC Control Loop Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5-12 Battery Booster Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5-13 Battery Charger Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5-14 Synchronous Phase Discriminator State Machine . . . . . . . . . . . . . . . . . . . . . . . . 5-17
5-15 PLL Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
5-16 Frequency Measurement Routine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
5-17 SCR Control Signal Generation at the Beginning and End of the Rectifier
Soft Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
5-18 RMS Sensing System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
5-19 Power Sensing System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23
5-20 Implementation of Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
5-21 Implementation of the High Frequency Reject Filter. . . . . . . . . . . . . . . . . . . . . . . 5-26
6-1 Implementation of OpenTCP for OUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6-2 Connectivity Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6-3 Main Application Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
6-4 Main Loop Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
7-1 Inverter Waverforms—No Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7-2 Inverter Voltage Harmonics—No Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7-3 Inverter Waveforms—Linear Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7-4 Inverter Voltage Harmonics Under Linear Load Conditions . . . . . . . . . . . . . . . . . . 7-3
7-5 Inverter Waveforms Under Full Load Conditions—Battery Operated. . . . . . . . . . . 7-3
7-6 Inverter Voltage Harmonics—Full Load, Battery Operated. . . . . . . . . . . . . . . . . . . 7-4
7-7 Inverter Transient Response—60W Bulb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7-8 Inverter Transient Response—Resistive Load (200W). . . . . . . . . . . . . . . . . . . . . . 7-5
7-9 PFC Waveforms—Full Load Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7-10 PFC Waveforms—Linear Load Conditions (298W) . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7-11 PFC Waveforms—Linear Load Conditions (59W) . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7-12 PFC Performance—Transient. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7-13 Freerun Frequency Measurement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8
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Preliminary
7-14 Battery Charger Performanc—Charging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
7-15 Battery Charger—Floating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
7-16 Bypass Switching Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
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LIST OF TABLES
4-1 Jumper Position for Configuration of the Power Board. . . . . . . . . . . . . . . . . . . . . . 4-4
4-2 Jumper Position for Configuration of the Control Board . . . . . . . . . . . . . . . . . . . . . 4-6
5-1 Assignment of the Analog-to-Digital Converters. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-2 Digital Outputs and Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-3 Transitions of the Synchronous Phase Discriminator . . . . . . . . . . . . . . . . . . . . . . 5-18
6-1 Digital Outputs and Inputs Used for Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6-2 System Services Initialization Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6-3 Physical Layer Initialization Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-4 Network Layers Initialization Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-5 Application Layer Initialization Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-6 Defines Used by Main Connectivity Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
6-7 Functions Used by Main Connectivity Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
6-8 Interrupts Used by Connectivity Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
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Online UPS Designer Reference Manual, Rev. 0
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Preliminary
About This Document
This manual describes the Online Uninterruptible Power Supply (OUPS) application.
Audience
This manual targets design engineers interested in developing a UPS using a 56F83xx device.
Organization
This User’s Manual consists of the following sections:
• Chapter 1, Online UPS Theory and Description -- provides an introduction to the concepts of UPS and
describes the theory of operation.
• Chapter 2, Control Loops In The Online UPS-- describes methods and algorithms for control of the
OUPS.
• Chapter 3, Control Board Design Considerations -- describes the Control Board and its features.
• Chapter 4, Operational Description -- explains how the OUPS connects to and operates with an EVM.
• Chapter 5, Control Software Design Considerations -- describes routines and interrupt handlers for a
variety of control functions.
• Chapter 6, Connectivity Software Design Considerations -- explains how to communicate with the
OUPS using TCP/IP protocol.
• Chapter 7, Results -- discusses and illustrates OUPS performance in a variety of conditions.
• Appendix A, Schematics -- contains schematics for both Control Board and Power Board.
• Appendix B, Bill of Materials -- includes a detailed listing of parts used in the OUPS.
Preface, Rev. 0
Freescale Semiconduc tor xi
Preliminary
Conventions
This document uses the following notational conventions:
Typeface, Symbol
or Term
Courier
Monospaced Type
Italic Directory names,
Code examples //Process command for line flash
project names,
calls,
functions,
statements,
procedures,
routines,
arguments,
file names,
applications,
variables,
directives,
code snippets
in text
Meaning Examples
Bold Reference sources,
paths,
emphasis
...and contains these core directories:
applications contains applications software...
...CodeWarrior project, 3des.mcp is...
...the pConfig argument....
...defined in the C header file, aec.h....
...refer to the Targeting DSP56F83xx Platfo r m
manual....
...see: C:\Program Files\Frees cal e\h elp\t uto -
rials
Blue Text Linkable on-line ...refer to Chapter 7, License....
Number Any number is considered a
positive value, unless preceded by a minus symbol to
3V
-10
DES
-1
signify a negative value
ALL CAPITAL
LETTERS
# defines/
defined constants
# define INCLUDE_STACK_CHECK
Brackets [...] Function keys ...by pressing function key [F7]
Quotation
Returned messages ...the message, “Test Passed” is displayed....
marks, “...”
...if unsuccessful for any reason, it will return
“NULL”...
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Preliminary
Definitions, Acronyms, and Abbreviations
The following list defines the acronyms and abbreviations used in this document. As this
template develops, this list will be generated from the document. As we develop more group
resources, these acronyms will be easily defined from a common acronym dictionary. Please note
that while the acronyms are in solid caps, terms in the definition should be initial capped ONLY
IF they are trademarked names or proper nouns.
AC Alternating Current
ARP Address Resolution Protocol
DC Direct Current
DCO Digitally Controlled Oscillator
IIR Infinite Impulse Response
OUPS Online Uninterruptible Power Supply
PFC Power Factor Correction
PI Proportional-Integral
PID Proportional-Integral-Derivative
PLL Phase Locked Loop
PWM Pulse Width Modulation
RMS Root Mean Square
SCR Silicon Controlled Rectifier
TCB Transmission Control Block
UDP User Datagram Protocol
UPS Uninterruptible Power Supply
References
The following sources were used to produce this book; we recommend that you have a copy of
these references:
1. DSP56800E Reference Manual, Freescale, DSP56800ERM
2. 56F8300 Peripheral User Manual, Freescale, MC56F8300UM
Preface, Rev. 0
Freescale Semiconduc tor xiii
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Online UPS Design Reference Manual, Rev. 0
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Preliminary
Introduction
Chapter 1 Online UPS Theory and
Description
1.1 Introduction
Uninterruptible Power Supplies (UPS) are electronic devices designed to provide power to
critical mission systems. An Online UPS (OUPS) provides continuous power to the load during
power outage or glitches caused by power source switching.
1.1.1 The Concept of an Online UPS
The minimum components needed to design an Online UPS are the rectifier, the battery bank and
the inverter. The rectifier converts the distribution line’s AC (Alternating Current) power to DC
(Direct Current), the form of current suitable to store energy in a battery bank. At all times, this
DC is also fed to an inverter, which reconverts the DC power to an AC waveform connected to
any equipment utilizing AC that a user considers as mission critical. If the AC supply fails for
any reason, the inverter will continue to draw power from the batteries.
Figure 1-1. A Basic Online UPS
1.1.2 Input Power Factor Control (PFC)
When a sinusoidal input signal is connected to a full wave rectifier, conduction will occur only
during the peaks of the signal. This causes a two-fold inconvenience to the electricity distribution
line:
• Insertion of harmonics to the lines
• High current peaks, which imply greater losses on the distribution
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Preliminary
These effects are aggravated by the long distances the electric distribution networks usually span.
From the electrical utility’s point of view, the best possible load is the pure resistive: The current
waveform should be a pure sinusoidal waveform identical to the voltage waveform and of the
same frequency and phase.
In order to show a resistive load to the utility lines, the input current to the UPS is controlled (i.e.,
modulated), to make it match a set point. This set point depends on the input voltage waveform,
and its amplitude is dependent on the equipment’s power consumption.
1.1.3 DC-to-DC Converters
If a rectifier is connected to the AC line supply, then the DC voltage will be equal to the peak
voltage of the line. (i.e., in a 120 V
configured for 12 or 24 V
, the UPS works by using DC-to-DC converters.
DC
line, the peak will be 120√2, 170V). If the battery bank is
RMS
For an online UPS, two power DC-to-DC converters are required. One converter operates as the
battery charger, and the other boosts the battery voltage in the absence of line input and generates
the appropriate DC required by the inverter.
1.1.4 Phase Locked Loop (PLL)
This UPS can operate in the Free Running mode or in the Locked-to-Line mode. If the AC main
line frequency is at the nominal value of 50Hz or 60Hz ± 5%, then the PLL locks the inverter
output to the line. If the AC main line frequency runs out of limits for any reason, the UPS will
automatically switch to run locked to the internal frequency reference.
The UPS will also work in the Free Running mode if commanded to operate as a frequency
converter. For example, it can connect to a 60Hz AC main line frequency and output a signal of
50Hz frequency, and vice versa.
The purpose of Phase-Locking the inverter to the line input is to enable the automatic bypass
feature, and to avoid signal “mixing” at the rails. These two features are detailed in the following
sections.
1.1.5 Bypass Operation
In order to allow a UPS bypass without loss of power at the load, two conditions must be met:
• The inverter output must be locked to the frequency and phase of the AC main line
• The inverter output and the AC main line’s RMS voltages must be within 10% of one
another
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Introduction
When the bypass conditions are met, the bypass switch can transfer the load to the AC main line
in the event of a UPS failure or when commanded by the operator during routine maintenance. It
can also switch the load back to the inverter after any maintenance.
1.1.6 Rail Ripple
The energy to support the load is stored in the rail capacitors. These capacitors are current-fed by
the PFC circuitry in the Online mode or by the battery booster in the Battery Back-up mode.
In the Online mode, a ripple with the phase and twice the frequency of the AC main line will be
present at the rails, superimposed with a ripple with the phase and twice the frequency of the
inverter current. In this situation, if a frequency offset ∆f is present, lower-order components can
appear. Locked operation is preferred to minimize the effects of frequency mixing.
1.1.7 Pulse Width Modula tion (PWM)
High-power control requires switchable electronic devices, precluding their use in the active
region, where power dissipation in the device is very high. For this reason, control is made by
pulse width modulation, where the duty cycle of a signal is modified, then a linear filtering
device passes the desired signal value to the analog components.
PWM is then used to implement inverters, PFCs, and DC-to-DC converters.
1.1.8 A Controller Solution to Control a UPS
The control system for a UPS must accomplish the following functions:
• Control strategies for inverter, PFC, PLL, and DC-to-DC converters. Every control loop
starts at an Analog-to-Digital Converter (ADC) in order to sense the signals, and ends at a
Pulse Width Modulator as an actuator.
• Deciding when to activate or deactivate a component
• Detecting failure conditions and implementing any required action
• Enabling Monitor and Control (M & C) communications
Compared to traditional analog controls, today’s low-cost and high-performance controllers
provide a better solution in performance and cost. A single MCU includes a powerful processor
core and such peripherals as PWMs, Timers, and Analog-to-Digital Converters. A single 56800E
device is able to assume the monitoring and real-time control required by an Online UPS.
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1.2 System Overview
Figure 1-2 depicts a simplified UPS system.
Figure 1-2. UPS Simplified Schematic
Figure 1-3 shows a photo of a completed UPS prototype. The system’s power electronics and
ferromagnetic components are detailed on the left side of the the figure.
Figure 1-3. Prototype UPS
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System Actuators
1.3 System Actuators
A simplified schematic of the controller’s relationship with actuators is shown in Figure 1-4,
where all switches represent MOSFETs or IGBTs.
56800E Controller
Figure 1-4. Relationship between a 56800E and Power Actuators
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Figure 1-5. Simplified Schematic Diagram of the UPS
1.4 Input Rectifier Theory of Operation
The input rectifier is implemented as a four-diode bridge (X1, X2, D24, and D23). A soft start
system implemented with SCRs can prevent a huge in-rush current when the system starts, while
the system’s internal capacitors get charged to the line’s peak voltage.
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Input Rectifier Theory of Operation
Figure 1-6. Input Rectifier
1.4.1 Rectifier Soft Start
If a high voltage is applied to a discharged capacitor, its low impedance will result in a very high
inrush current across the circuit, reducing the components’ longevity.
A soft start circuit is designed to avoid that circumstance. Figure 1-7 shows a full
wave-controlled rectifier bridge. If the trigger angle of X1 and X2 is gradually decreased from
the zero crossing towards the peak voltage, as demonstrated in Figure 1-8, the capacitor voltage
will then increase slowly. As the current on a capacitor equals the capacitance value times the
voltage derivative with respect to time, the input current will be proportional to the slope of the
voltage applied to the capacitor.
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Figure 1-7. Full Wave-Controlled Rectifier Bridge
Figure 1-8. Relationship between Rectifier Soft Start Operation / Actuator Signals
and the AC Main Line Voltage
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Power Factor Corrector (PFC) Theory of Operation
1.5 Power Factor Corrector (PFC) Theory of Operation
After the rectifier soft start finishes, X1 and X2 must act as diodes with continuous trigger. When
no PFC is implemented, the line current will be similar to that shown in Figure 1-9, due to the
diode–capacitor nature of a rectifier.
The objective of the PFC circuit is to simulate a resistive load to the power line; in other words, to
obtain a unity power factor and low harmonic content in the current waveform. A fast control
must be implemented in order to make the current waveform follow the AC voltage, while
elevating and controlling the rail voltage and supplying the average power required to the load.
Figure 1-10 shows how the PFC works, illustrating a current signal waveform similar in form to
the voltage waveform. The ripple in the figure is a consequence of the IGBT high frequency
switching.
Figure 1-9. Typical Rectifier Current vs. AC Line Voltage
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Figure 1-10. PFC Current and Voltage Waveforms
Once the voltage on capacitors C3, C7 and C
shown in Figure 1-11 reach the AC main supply
8
peak after the rectifier soft start, the PFC is turned on, correcting the power factor presented to
the line and generating the rail DC voltages V
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and VN at a value higher than the line peak.
P
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Power Factor Corrector (PFC) Theory of Operation
Figure 1-11. PFC Schematic
In order to work as a PFC, U1 and U
When U
is on, U2 is off, and vice versa.
1
in Figure 1-11 turn on and off in complementary mode.
2
The switching frequency of operation is 20kHz . The line nominal frequencies are 50Hz or 60Hz,
so it is a valid approximation to consider the line voltage as a constant during a switching period.
For positive values of the line, when U
that shown in Figure 1-12, where C
capacitors to be the same, thus reducing the ripple voltage on C
is on (closed) and U1 is off (open), the circuit reduces to
2
is connected in parallel to C8, causing the voltages on these
3
.
8
Figure 1-12. Partial PFC Schematic when U1 Is Open and U2 Is Closed
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For positive values of the line, when U1 is closed, and U2 is open, the circuit reduces as shown in
Figure 1-13, where C
line is applied directly to L
voltage could be considered constant, and the inductor current, which corresponds to the current
in the line (I
), depends on the voltage across its terminals.
LINE
is now connected in parallel to C7, thus reducing its ripple voltage. The
3
, increasing the current across it with a constant slope, because line
1
Figure 1-13. Partial PFC Schematic when U1 Is Closed and U2 Is Open
Inductor current is calculated by the equation:
t
1
I
=∆
L
Where:
V
is the voltage across the inductor terminals
L1
The peak current across the inductor at time t2 depends, among other factors, on the instant value
of the line voltage and the time difference t
2
∫
t
1
dtV
Lline
1
, which is the time that U1 remains closed.
2 – t1
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Power Factor Corrector (PFC) Theory of Operation
Figure 1-14. Resulting Parallel Connection between C3 and C7
The voltage-boosting characteristic of the PFC is accomplished by increasing the voltage across
(and consequently, across C7 and C8). Given that a current is circulating in the inductor L1,
C
3
when U
forces D
opens, the voltage across L
1
into a conduction state and C3 and C8 to charge to the addition of the line and the
24
inductor terminal voltage, V
Figure 1-15. Voltage Boost across Capacitors C3 and C
. This is a typical boost configuration.
L1
adds to the line voltage as shown in Figure 1-15. This
1
8
Due to symmetry, this circuit works in the same way for negative values in line voltage.
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1.6 Battery Charger Theory of Operation
Figure 1-16 has been extracted from the UPS schematic shown in Figure 1-5. Using the high DC
voltages V
charge conditions for a battery bank formed by two 12V batteries connected in series, which must
be charged with constant current. When the float condition is reached, the charger must preserve
a constant voltage while providing the battery bank’s self-discharge current.
rail positive and VN rail negative as its power sources, this circuit provides the
P
Figure 1-16. Battery Charger Schematic
The battery charger is an application of a two-transistor flyback configuration using a coupling
inductor rather than a transformer. Because this operating mode implies no flow of current in the
secondary when the primary has a non-zero current, and vice versa, it means that no current flows
simultaneously in both windings.
Figure 1-16 shows a two-transistor version of a flyback converter, where U
and U6 are turned
5
on and off simultaneously. The advantage of such a topology over a single-transistor flyback
converter is that the switches’ voltage rating is V
through the diodes D
and D19, which are connected to the primary winding, a dissipative
18
- VN. Moreover, since a current path exists
P
snubber across the primary winding is not needed to dissipate the energy associated with the
transformer primary-winding leakage inductance.
The design, calculations and construction of TX
voltage from secondary to primary rising higher than V
are critical in order to prevent the reflected
1
- VN when D22 is on.
P
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