Data Sheet: JN5142-x01-Myy
JenNet-IP,RF4CE and IEEE802.15.4 Module
Features: Module
2.4GHz IEEE802.15.4, JenNet-IP
and RF4CE compatible
Sleep current (with active sleep
timer) 0.73µA
JN5142-x01-M00/03
up to 1km range (Ext antenna)
M00: integral antenna 18x32mm
M03: uFl connector 18x30mm
o TX power +2.5dBm
o Receiver sensitivity –95dBm
o TX current 15mA
o RX current 17.5mA
o 2.3-3.6V operation
Features: Microcontroller
32-bit RISC CPU, 1-32MHz clock
speed
Low power operation
Variable instruction width for high
coding efficiency
Multi-stage instruction pipeline
128KB ROM and 32KB RAM for
bootloaded program code
Master/Slave I2C interface.
3xPWM and Application
timer/counter
UART
SPI port with 3 selects
Supply Voltage Monitor with 8
programmable thresholds
4-input 8-bit ADC
Comparator
Battery and temperature sensors
Watchdog timer and Power-on-
Reset (with brown-out) circuit
Up to 18 DIO
Industrial temp (-40°C to +125°C)
6x6mm 40-lead Punched QFN
Lead-free and RoHS compliant
128kB Serial Flash
Memory
Power
Matching
uFl
Connector
Integrated
Antenna
External
Antenna
M00 Option
M03 Option
32-bit
RISC CPU
Timer
UART
4-Chan 8-bit ADC
Battery &
Temp sensors
,
2-Wire Serial
(Master)
SPI
128-bit AES
Encryption
Accelerator
2.4GHz
Radio
2.4GHz
Radio
ROM
128KB
Power
Management
XTAL
O-QPSK
Modem
29-byte
OTP eFuse
2-Wire Serial
(Slave)
Sleep Counter
Watchdog
Timer
Watchdog
Timer
Voltage Supply
Monitor
RAM
32KB
IEEE802.15.4
MAC
Accelerator
Matching
Benefits
Single chip optimized for simple
applications
Very low current solution for
long battery life – over 10 yrs
Highly featured 32-bit RISC
CPU for high performance and
low power
System BOM is low in
component count and cost
FCC part 15.247 rules, IC
Canada RSS 210e and ETSI EN
300-328 v 1.7 compliant
Applications
Robust and secure low power
wireless applications using
RF4CE
Remote Control
Toys and gaming peripherals
Active RFID tags
Point-to-point or star networks
using IEEE802.15.4
Energy harvesting, for example
self powered light switch
Overview
The JN5142-x01-Myy family is a range of ultra low power, high performance surface
mount modules targeted at JenNet-IP and RF4CE networking applications, enabling
users to realise products with minimum time to market and at the lowest cost. They
remove the need for expensive and lengthy development of custom RF board
designs and test suites. The modules use NXP‟s JN5142 wireless microcontroller to
provide a comprehensive solution with large memory, high CPU and radio
performance and all RF components included. All that is required to develop and
manufacture wireless control or sensing products is to connect a power supply and
peripherals such as switches, actuators and sensors, considerably simplifying
product development.
Two module variants are available: JN5142-x01-M00 with an integrated antenna and
the JN5142-x01-M03 with antenna connector. The modules can implement
networking stacks such as JenNet-IP and RF4CE, as well as customer applications.
Module Block Diagram
JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012
Contents
1. Introduction 3
1.1. Variants 3
1.2. Regulatory Approvals 3
2. Specifications 4
3. Product Development 5
3.1. JN5142 Single Chip Wireless Microcontroller 5
4. Pin Configurations 6
4.1. Pin Assignment 7
4.2. Pin Descriptions 8
4.2.1 Power Supplies 8
4.2.2 SPI Memory Connections 8
5. Electrical Characteristics 9
5.1. Maximum Ratings 9
5.2. Operating Conditions 9
Appendix A Additional Information 10
A.1 Outline Drawing 10
A.2 Module PCB Footprint 12
A.3 Manufacturing 13
A.3.1 Reflow Profile 13
A.3.2 Soldering Paste and Cleaning 13
A.4 Ordering Information 14
A.5 Tape and Reel Information: 15
A.5.1 Tape Orientation and dimensions 15
A.5.2 Cover tape details 15
A.5.3 Leader and Trailer 16
A.5.4 Reel Dimensions: 16
A.6 Related Documents 16
A.7 Federal Communication Commission Interference Statement 17
A.7.1 Antennas approved by FCC for use with JN5142 modules 18
A.7.2 FCC End Product Labelling 18
A.8 Industry Canada Statement 18
A.8.1 Industry Canada End Product Labelling 18
A.9 European R & TTE Directive 1999/5/EC Statement 19
A.10 RoHS Compliance 19
A.11 Status Information 19
A.12 Disclaimers 20
Version Control 20
ii JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012
1. Introduction
Standard Power, integrated antenna,
IEEE802.15.4 stack
Standard Power, integrated antenna,
Jennet IP stack
Standard Power, uFl connector,
IEEE802.15.4 stack
Standard Power, uFl connector, Jennet IP
stack
The JN5142-x01-Myy module family provides designers with a ready-made component that provides a fully
integrated solution for applications using the IEEE802.15.4 standard in the 2.4 - 2.5GHz ISM frequency band [1],
including RF4CE. A later version of the JN5142 will provide support for JenNet-IP “Smart Device” applications such
as lighting.
Applications that transfer data wirelessly tend to be more complex than wired ones. Wireless protocols make
stringent demands on frequencies, data formats, timing of data transfers, security and other issues. Application
development must consider the requirements of the wireless network in addition to the product functionality and user
interfaces. To minimise this complexity, NXP provides a series of software libraries and interfaces that control the
transceiver and peripherals of the JN5142. These libraries and interfaces remove the need for the developer to
understand wireless protocols and greatly simplifies the programming complexities of power modes, interrupts and
hardware functionality.
In view of the above, it is not necessary to provide the register details of the JN5142 in the datasheet.
The device includes a Wireless Transceiver, RISC CPU, on chip memory and an extensive range of peripherals.
The modules integrate all of the RF components required, removing the need to perform expensive RF design and
test. Products can be designed by simply connecting sensors and switches to the module IO pins. The modules use
an NXP single chip IEEE802.15.4 Wireless Microcontroller, allowing designers to make use of the extensive chip
development support material. Hence, this range of modules allows designers to bring wireless applications to
market in the minimum time with significantly reduced development effort and cost.
Two variants are available: JN5142-x01-M00 (standard module with integral antenna) and the JN5142-x01-M03
(standard module with uFL connector for use with external antennae). All modules have FCC modular approvals and
are compliant with EU regulations. The variants available are described below.
1.1. Variants
1.2. Regulatory Approvals
All module types have been tested against the requirements of European standard EN 300 328 v1.7.1 and a Notified
Body statement of opinion for this standard is available on request.
Additionally, all module types have received FCC “Modular Approvals”, in compliance with CFR 47 FCC part 15
regulations and in accordance to FCC Public notice DA00-1407, appendix A.7 contains details on the conditions
applying to this modular approval. The modules are approved for use with a range of different antennas; further
details of which can be found in section Appendix A.7.1. The modular approvals notice and test reports are available
on request.
In addition, all modules have Industry Canada modular approval and RSS210e Issue 7 (June 2007) certification.
© NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 3
Typical DC Characteristics
CPU in doze, radio transmitting
CPU in doze, radio receiving
Centre frequency accuracy
Additional +/-15ppm allowance for
temperature and ageing
Typical RF Characteristics
Nominal for 1% PER, as per 802.15.4 section
6.5.3.3 (Note 1)
For 1% PER, measured as sensitivity
RF Port impedance – uFl connector
Two-wire serial I/F (compatible with SMbus &
I2C)
Two programmable Timer/Counters with
capture/compare facility, Tick timer
Two programmable Sleep Timers
Digital IO lines (multiplexed with UARTs,
timers and SPI selects)
Four channel Analogue-to-Digital converter
Programmable analogue comparator
Ultra low power mode for sleep
Internal temperature sensor and battery
monitor
2. Specifications
Most specification parameters for the modules are specified in the chip datasheet - JN-DS-JN5142 Wireless
Microcontroller Datasheet, [2]. Where there are differences, the parameters are defined here.
VDD=3.0V @ +25°C
The performance of all peripherals is defined in the JN-DS-JN5142 Wireless Microcontroller Datasheet [2]
Note 1: Sensitivity is defined for conducted measurements on connectorised modules. Modules with an integrated
antenna have approximately 3 dB less e.i.r.p and reciprocal receive sensitivity.
4 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012
3. Product Development
NXP supplies all the development tools and networking stacks needed to enable end-product development to occur
quickly and efficiently. These are all freely available from www.nxp.com/jennic. A range of evaluation/developer kits
is also available, allowing products to be quickly bread boarded. Efficient development of software applications is
enabled by the provision of a complete, unlimited, software developer kit. Together with the available libraries for the
IEEE802.15.4 MAC and the JenNet-IP and RF4CE network stacks, this package provides everything required to
develop application code and to trial it with hardware representative of the final module.
The modules can be user programmed both in development and in production using software supplied by NXP.
Access to the on-chip peripherals, MAC and network stack software is provided through specific APIs. This
information is available on the NXP/Jennic support website, together with many example applications, user guides,
reference manuals and application notes.
3.1. JN5142 Single Chip Wireless Microcontroller
The JN5142-x01-Myy series is constructed around the JN5142-x01 single chip wireless microcontroller, which
includes the radio system, a 32-bit RISC CPU, ROM and RAM memory and a range of analogue and digital
peripherals.
The chip is described fully in JN-DS-JN5142 Wireless Microcontroller Datasheet [2].
The module also includes a 1Mbit serial flash memory, which holds the application code that is loaded into the
JN5142 during the boot sequence and provides static data storage, required by the application.
© NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 5
1
2
3
4
16
ADC1
NC
NC
NC
NC
SPICLK
SPIMISO
SPIMOSI
SPISSZ
DIO0
DIO1
DIO2
SPISSM
SPISWP
DIO3
DIO4
DIO5
DIO6
DIO7
DIO8
DIO9
DIO10
DIO11
VDD
GND
VSSA
NC
ADC2
NC
NC
NC
NC
DIO17
DIO16
DIO15
RESETN
DIO14
DIO13
DIO12
5
6
7
8
9
10
11
12
13
14
15
17 18 19 20 21 22 23 24 25 26
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
NC
NC
4. Pin Configurations
Note that the same basic pin configuration applies for all module designs.
Figure 1: Pin Configuration (top view)
6 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012