NXP Laboratories UK JN5121M0, JN5121M6 User Manual

Preliminary Data Sheet – JN5121-xxx-Myy
IEEE802.15.4/ZigBee Module Family
Overview Overview
The JN5121-xxx-Myy is a family of surface mounted modules that enable users to implement
The JN5121-xxx-Myy is a family of surface mounted modules that enable users to implement IEEE802.15.4 or ZigBee compliant systems with minimum time to market and at the lo west
IEEE802.15.4 or ZigBee compliant systems with minimum time to market and at the lo west cost. They remove the need for expensive and lengthy development of custom RF board
cost. They remove the need for expensive and lengthy development of custom RF board designs and test suites. The modules use Jennic’s JN 5121 wireless microcontroller to provid e
designs and test suites. The modules use Jennic’s JN 5121 wireless microcontroller to provid e a comprehensive solution, including all RF components. All that is required to dev elop and
a comprehensive solution, including all RF components. All that is required to dev elop and manufacture wireless control or sensing products is to connect a power supply and p eripherals
manufacture wireless control or sensing products is to connect a power supply and p eripherals such as switches, actuators, sensors, considerably simplifying product development.
such as switches, actuators, sensors, considerably simplifying product development. Three basic hardware module variants are available: JN5121-xxx-M00 with an integrated
Three basic hardware module variants are available: JN5121-xxx-M00 with an integrated antenna, JN5121-xxx-M01/M03 with an antenna connecto r and JN5121-xxx-M02/M04 with a
antenna, JN5121-xxx-M01/M03 with an antenna connecto r and JN5121-xxx-M02/M04 with a power amplifier and LNA for extended range. Each of these can be provided pr e-programmed
power amplifier and LNA for extended range. Each of these can be provided pr e-programmed with a ZigBee network stack (JN5121-Z01-Myy) or with customer-specific software.
with a ZigBee network stack (JN5121-Z01-Myy) or with customer-specific software.
Block Diagram Block Diagram
External Antenna
SMA
SMA
Balun
MO00 O ption
Balun
M01/03 Option
Balun
M02/04 Option
PA / LNA
2.4GHz Radio
Power
Management
Ceramic Antenna
Connector
Connector
XTAL
JN5121 chip
O-QPSK Modem
IEEE802.15.4
MAC
Accelerator
128-bit AE S
Encryption
Accelerator
RAM 96kB
RISC CPU
ROM 64kB
128kB Serial
Flash Memory
SPI
2-wire serial
Timers
UARTs
12-bit A DC , comparator
11-bit DACs, temp sensor
Power
Benefits
Microminiature module solutions Ready to use in products Minimises product development
time
No RF test required for systems Compliant with FCC part 15
rules, ETSI ETS 300-328 and Japan ARIB STD-T66
Production volumes supplied
pre-programmed with application software
Applications
Robust and secure low power
wireless applications
Wireless sensor networks,
particularly IEEE802.15.4 / ZigBee systems
Home and commercial building
automation
Home networks Toys and gaming peripherals Industrial systems Telemetry and utilities
(e.g. AMR)
Features: Module
2.4GHz IEEE802.15.4 compliant
2.7-3.6V operation
Sleep current (with active
sleep timer) < 14µA
JN5121-xxx-M00/01/03
Standard module, 0dBm power M00: on board antenna or M01: SMA connector,
M03: RP-SMA connector
> 400m range
o Receiver sensitivity -90dBm o TX current < 45mA o RX current < 50mA o 18x30mm
JN5121-xxx-M02/04
18.5dBm power with LNA and SMA connector, > 4km range
Receiver sensitivity -93dBm
o TX current < 120mA o RX current < 55mA o 18x40mm
Features: Microcontroller
16MHz 32-bit RISC CPU 96kB RAM, 64kB ROM 4-input 12-bit ADC, 2 11-bit
DACs, comparator, temperature sensor
2 Application timer/counters,
3 system timers
2 UARTs (one for in-system
debug)
SPI port with 5 selects 2-wire serial interface 21 GPIO Evaluation kits available with
full, unlimited, Software Development Kit
Industrial temperature range (-20°C to +70°C)
Lead-free and RoHS compliant
Preliminary - JN-DS-JN5121-xxx-Myy v1.21 © Jennic 2006
Jennic
Contents
1. Introduction 1
1.1. Variants 1
1.2. Regulatory Approvals 1
2. Specifications 2
3. Product Development 3
3.1. JN5121 Single Chip Wireless Microcontroller 3
4. Pin Configurations 4
4.1. Pin Assignment 5
4.2. Pin Descriptions 6
4.3. Power Supplies 6
4.4. SPI Memory Connections 6
5. Electrical Characteristics 7
5.1. Maximum Ratings 7
5.2. Operating Conditions 7 Appendix A Mechanical and Ordering Information 8 A.1 Outline Drawing 8 A.2 Module PCB Footprint 11 A.3 Ordering Information 12 A.4 Accessories 13 A.5 Tape and Reel Information: 14
A.5.1 Tape Orientation and dimensions 14
A.5.2 Cover tape details 14 A.5.3 Leader and Trailer 15 A.5.4 Reel Dimensions: 15 A.6 Related Documents 16 A.7 Federal Communication Commission Interference Statement 16 A.8 Disclaimers 18 A.9 Version Control 18 A.10 Contact Details 19
ii Preliminary - JN-DS-JN5121-xxx-Myy v1.21 © Jennic 2006
Jennic

1. Introduction

The JN5121-xxx-Myy module family provides designers with a ready made component which allows IEEE802.15.4 [1] wireless applications, including ZigBee, to be quickl y and easily inclu ded in product designs. The m odules integrate all of the RF components, removing the need to perform expensive RF design and test. Products ca n be designed by simply connecting sensors and switches to the module IO pins. The modules use Je nnic’s single chip IEEE802.15. 4 Wireless Microcontroller, allowing designers to make use of the extensive chip development support material. Hence, this range of modules allows designers to bring wirel ess applications to market in the minimum time with significantly reduced development effort and cost.
Three basic modules are available: JN5121- xxx-M0 0 (standard module with on board ceramic antenna), JN5121-xxx­M01 (standard module with SMA connector for use with externa l antennae) and JN5121-xxx-M02 (high RF power, improved sensitivity module for extended range applications). Each of these modules can be supplied with a range of protocol stacks, including a simple IEEE802.15.4 protocol for point to poin t and star applications and a ZigBee mesh networking stack. The variants available are described below.

1.1. Variants

Variant Description FCCID
JN5121-000-M00 IEEE802.15.4 stack, ceramic antenna TYOJN5121M0 JN5121-Z01-M00 ZigBee stack, ceramic antenna TYOJN5121M0 JN5121-000-M01 IEEE802.15.4 stack, SMA connector N/A JN5121-Z01-M01 ZigBee stack, SMA connector N/A JN5121-000-M02 High Po wer (18.5dBm), IEEE802.1 5.4 stack,
SMA connector
JN5121-Z01-M02 High Power (18.5dBm), ZigBee stack, SMA
connector JN5121-000-M03 IEEE802.15.4 stack, RP-SMA connector TYOJN5121M6 JN5121-Z01-M03 ZigBee stack, RP-SMA connector TYOJN5121M6 JN5121-000-M04 (High Power (18.5dBm), IEEE802.15.4
stack, RP-SMA connector JN5121-Z01-M04 High Power (18.5dBm), ZigBee stack,
RP-SMA connector
N/A
N/A
TYOJN5121M4
TYOJN5121M4

1.2. Regulatory Approvals

All module types have been tested against the requirements of European standard ETS 300 328 and a certificate of compliance to this standard is available on request. The High Power modules with M02 suffix are approved for use in Europe with reduced output power. They must not be used with PHY_PIB_ATTR_TX_POWER set above 3 See
Additionally, modules with M00, M03 and M04 suffixes have received FCC “Modular Approvals”, in compliance with CFR 47 FCC part 15 regulations and in accordance to FCC Public notice DA00-1407. The modules are approved for use with the following half wave dipole antenna families: EAD BKR2400 series, Antenna Factor RCT and RCL series, Centurion WCR2400 & WRR2400, GigaAnt Titanis and Nearson Models 131, 141 & 145. See Appendix on the conditions applying to this modular approval.
© Jennic 2006 Preliminary - JN-DS-JN5121-xxx-Myy v1.22 1
[4].
A.7 for details
Jennic

2. Specifications

Most specification parameters for the modules are specified in JN-DS-JN5121 Datasheet for JN5121 single chip wireless microcontroller
VDD=3.0V @ +25ºC
, [2]. Where there are differences, the parameters are defined here.
Typ. DC Characteristics Notes
Deep sleep <11uA <11uA Sleep <14uA <14uA With active sleep timer Radio transmit 44mA 115mA CPU in doze, radio transmitting Radio receive 49mA 60mA CPU in doze, radio receiving
Centre frequency accuracy +/-25ppm +/-25ppm
Typ. RF Characteristics Notes
Receive sensitivity -90dBm -93dBm Max. Transmit power 0dBm 16dBm Nominal
Transmit power at 3.6V 18.5dBm With Vcc=3.6V Maximum input signal -10dBm -15dBm
RSSI range RF Port impedance - SMA connector 50 ohm 50 ohm 2.4 - 2.5GHz
VSWR (max) 2:1 2:1 2.4 - 2.5GHz
Peripherals Notes
Master SPI port with five select outputs 250kHz - 16MHz Slave SPI port 250kHz - 16MHz Two UARTs 16550 compatible Two-wire serial I/F (compatible with SMbus & I2C) Up to 400kHz Two programmable Timer/Counters with
capture/compare facility, Tick timer Two programmable Sleep Timers 32kHz clock Twenty-one digital IO lines (multiplexed with
UARTs, timers and SPI selects) Four-channel, 12-bit, Analogue-to-Digital
converter Two 11-bit Digital-to-Analogue converters Up to 100ks/s Programmable analogue comparator Ultra low power mode for sleep Internal temperature sensor and battery monitor
JN5121-xxx-
M00/01/03
-95 to -10 dBm
JN5121-xxx-
M02/04
-115 to -20 dBm
Additional +/-15ppm allowance for temperature and aging
Nominal for 1% PER, as per
802.15.4 section 6.5.3.3
For 1% PER, measured as sensitivity
16MHz clock
Up to 100ks/s
2 Preliminary - JN-DS-JN5121-xxx-Myy v1.21 © Jennic 2006
Jennic

3. Product Development

Jennic supplies all the development tools and networking st acks needed to enable en d product deve lopment to occ ur quickly and efficiently. These are all freely available from Jennic’s s upport website: A range of evaluation/developer kits is also available, allowing products to be quickly breadboarded. Efficient development of software applications is enabled by the provisio n of a complete, unlimited, software developer kit. Together with the available libraries for the IEEE802.15.4 MAC and the ZigBee net work st ack, this package provi des everything required to develop application code and to trial it with hardware representative of the final module.
The modules can be programmed by the user, for both develo pment and production, using Jennic supplied software. They can also be supplied read y loaded with customer defined soft ware if required. The User Guide load individual MAC addresses. Access to the on-chip peripherals, MAC and ZigBee stack software is provided through specific APIs. These are described in the JN-RM-2001 Hardware Periphera l Library Reference Manual [3], JN-RM-2002 Stack Software Reference Manual [4] and JN-RM-2014 Z igBee Application Development API Reference Manual
[5], describes how to put the module into programming mode, do wnload software onto the module a nd to
. Additional information is available on the Jennic support website.[6]

3.1. JN5121 Single Chip Wireless Microcontroller

The JN5121-xxx-Myy series is constructed around the JN512 1 single chip wireless microcontroller, which includes the radio system, a 32-bit RISC CPU, ROM and RAM memory and a range of analogue and digital peri pherals.
The chip is described fully in
JN-DS-JN5121 Datasheet for JN5121 single chip wireless microcontroller [2].
http://www.jennic.com/support/ .
JN-UG-3007 Flash Loader
© Jennic 2006 Preliminary - JN-DS-JN5121-xxx-Myy v1.22 3
Jennic

4. Pin Configurations

J1
Antenna
ADC4 DAC1
DAC2
COMP+
COMP-
SPICLK SPIMISO SPIMOSI
SPISSZ
DIO0/SPISEL 1 DIO1/SPISEL 2
DIO2/SPISEL 3
SPISSM
SPISWP
DIO3/SPISEL 4
1 2 3
4
5 6 7
8
9 10 11
12 13 14 15
17 18 19 20 21 22 23 24 25 26
16
VDD
GND
VSSA
41
ADC3
40
ADC2
39
ADC1
38
DNC
37
DNC
36
DIO20/RXD1
35
DIO19/TXD1 DIO18/RTS1
34
DIO17/CTS1
33
DIO16
32 31
DIO15/SIF_D DIO14/SIF_CLK
30
RESETN
29 28
DIO13/TIM1_OUT
27
DIO12/TIM1_CAP
DIO4/CTS0
DIO5/RTS0
DIO6/TXD0
DIO7/RXD0
DIO8/TIM0GT
Figure 1: Pin Configuration (top view)
Note that the same basic pin configuration applies for all module designs. However, DIO3/SPISEL4 and DIO2/SPISEL3 are not available with high power modules.
4 Preliminary - JN-DS-JN5121-xxx-Myy v1.21 © Jennic 2006
DIO9/TIM0_CAP
DIO11/TIM1GT
DIO10/TIM0_OUT

4.1. Pin Assignment

Jennic
Module Pin
1 ADC4 Analogue to Digital input 2 DAC1 Digital to Analogue output 3 DAC2 Digital to Analogue output 4 COMP+ 5 COMP­6 SPICLK SPI master clock out/slave clock in 7 SPIMISO SPI Master In/Slave Out 8 SPIMOSI SPI Master Out/Slave In 9 SPISSZ SPI select from module - SS0 (output) 10 SPISEL1 SPI Slave Select1 (output) General Purpose Digital I/O DIO0 11 SPISEL2 SPI Slave Select2 (output) General Purpose Digital I/O DIO1 12 SPISEL3* SPI Slave Select3 (output) General Purpose Digital I/O DIO2 * 13 SPISSM SPI select to FLASH (input) 14 SPISWP FLASH write protect (input)
Signal Function Alternative Function
Comparator inputs
15 SPISEL4* 16 CTS0 UART0 Clear To Send (input) General Purpose Digital I/O DIO4 17 RTS0 UART0 Request To Send (output) General Purpose Digital I/O DIO5 18 TXD0 UART0 Transmit Data (output) General Purpose Digital I/O DIO6 19 RXD0 UART0 Receive Data (input) General Purpose Digital I/O DIO7 20 TIM0GT Timer0 clock/gate (input) General Purpose Digital I/O DIO8 21 TIM0_CAP Timer0 capture (input) General Purpose Digital I/O DIO9 22 TIM0_OUT Timer0 PWM (output) General Purpose Digital I/O DIO10 23 TIM1GT Timer1 clock/gate (input) General Purpose Digital I/O DIO11 24 VDD 3V power 25 GND Digital ground 26 VSSA Analogue ground 27 TIM1_CAP Timer1 capture (input) General Purpose Digital I/O DIO12 28 TIM1_OUT Timer1 PWM (output) General Purpose Digital I/O DIO13 29 RESETN Active low reset
SPI Slave Select4 (output) Gener al Purpose Digital I/O DIO3*
30 SIF_CLK Serial Interface clock / Intelligent peripheral clock General Purpose Digital I/O DIO14
© Jennic 2006 Preliminary - JN-DS-JN5121-xxx-Myy v1.22 5
Loading...
+ 14 hidden pages