NXP TDA18252HN User Manual

Easy and cost effective digital
cable STB solution

Are you faced with the challenge of supporting high-performance emerging applications while
still requiring analog loop-through capabilities for major markets like India and China?
NXP Semiconductors’ 3rd generation, fully integrated silicon tuner TDA18252HN helps you
create high-performance, low-cost digital cable set-top box solutions for all markets.

NXP silicon tuner
TDA182 52HN

Key benefi ts

Lowers system cost by eliminating costly components 
such as low noise amplifi ers and SAW fi lters
Fully meets SARFT requirements 
Supports single tuner receiver boxes and enables 
DVR confi guration
Supports other world standards including SCTE-40, 
J-QAM and NORDIG
Easy on-board integration 
Reduced external component count 
Smallest system PCB footprint, enabling further size 
reduction of application board
Offers optimized front end solution with TDA10024HN 
(latest NXP QAM demodulator)

Key features

Multi-standard digital cable reception 
Low power consumption (< 800 mW) 
Frequency coverage up to 1002 MHz 

Fully integrated IF selectivity, eliminating the need for 
external SAW fi lters
Fully integrated oscillators with no external components 
On-chip loopthrough with analog capability 
Input signal strength indicator and die temperature sensor 
(via I2C-bus)
Device standby modes to further reduce power consumption 
Single 3.3 V power supply 

Key applications

DVB-C and digital cable set-top box applications 

Dedicated to digital cable set-top box applications in fast
growing Asian markets like China and India, our highly
integrated silicon tuner TDA18252HN helps you reduce your
total application bill-of-materials. Simplifying your system
design, the IC incorporates the tuning function along with
the IF selectivity - eliminating the need for discrete
image-rejection, RF and IF SAW fi lters.

TDA18252HN.indd 1 3/14/08 11:55:08 AM

www.nxp.com

© 2008 NXP B.V.

All rights reser ved. Reproduc tion i n whol e or in part is p rohibited witho ut the prio r wri tten consent of the co pyright owner.

The informat ion pre sented in this docum ent do es not form part of an y quota tion or contr act, is beli eved to be accurate and

reliabl e an d may be chang ed wi thout notice. No liabilit y wi ll be acce pted by t he pu blisher for any conseque nce of it s us e.

Public ation thereo f does not convey n or imply any lic ense under pat ent- or other ind ustrial or in tellectual p roperty r ights.

Date of rel ease: March 20 08

Docum ent order numb er: 9397 750 1648 6

Printe d in the Netherl ands

Front-end OM3853C/C1 reference design

NXP’s OM3853/C1 single channel digital cable front-end
reference design helps cable STB makers in China develop
straightforward and cost effective receivers. Along with
our TDA18252HN – incorporating low-profile shielding for
EMI protection – it also features the QAM demodulator
TDA10024HN. The TDA10024HN controls the tuner gain
by delivering the AGC control voltage. For the QAM
demodulator, an on-board 1.8 V supply voltage is available.

½ NIM OM3865C/C1 reference design

Our OM3865/C1 lets you quickly evaluate the TDA18252HN
in your existing STB platforms. It is pin-to-pin compatible with
conventional can tuners currently used in the Chinese market.

brb168

RF

IN

LT

AS SCLSDA CP

K

VT

K

XT

OUT_P

XT

OUT_N

V

IF_AGC

IF

OUT_N

IF

OUT_P

XTALPXTAL

N

SYNTHESIZER

ATT

LNA

stepped

AGC

IF

AGC

bandpass

filter

XTAL

osc

IF

filter

mixer

LEVEL

CONTROL

I2C

INTERFACE

brb169

SILICON TUNER

loop

through

RF

input

XT

OUT

IF

OUT

AGC

I

2

C IN

TS

3.3 V SUPPLY
REGULATION

AND

FILTERING

TDA18252 TDA10024

1.80 V

The received signal spectrum is down-converted and filtered
to low-IF signal. This directly feeds the QAM demodulator,
without needing conventional high cost external filtering.
The TDA18252HN provides a low IF frequency of 4 MHz from
a 6 MHz bandwidth, 4.5 MHz from a 7 MHz bandwidth and
5 MHz from an 8 MHz bandwidth.

Working with a single 16 MHz crystal, the IC’s buffered clock
output can provide the system clock for other tuners and
for channel decoders. The TDA18252HN also includes an
integrated analog loop-through function.

NXP offers a number of complete reference designs based
on the TDA18252HN, further reducing your time and effort
when developing new set-top box solutions.

Key parameters

Parameter Value (typical)

Frequency range 41 – 1002 MHz

Noise figure 7 dB

Phase noise -85 dBc @ 10 kHz

Power dissipation 800 mW

CSO/CTB 57/63 dBc

Image rejection 60 dBc

Low leakage 8 dBµV

TDA18252 block diagram

TDA18252HN.indd 2 3/14/08 11:55:08 AM