NXP SMD 4093 Datasheet

HEF4093B

Quad 2-input NAND Schmitt trigger

Rev. 8 — 21 November 2011 Product data sheet

1. General description

The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit.
The gate switches at different points for positive-going and negative-going signals. The
difference between the positive voltage (V
hysteresis voltage (V

) and the negative voltage (VT) is defined as

T+

).

H

It operates over a recommended V
(usually ground). Unused inputs must be connected to V

power supply range of 3 V to 15 V referenced to VSS

DD

, VSS, or another input.

DD

2. Features and benefits

 Schmitt trigger input discrimination
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specifie d from40 C to +85 C and 40 C to +125 C
 Complies with JEDEC standard JESD 13-B

3. Applications

 Wave and pulse shapers
 Astable multivibrators
 Monostable multivibrators

4. Ordering information

Table 1. Ordering information

All types operate from 40 C to +125 C

Type number Package

HEF4093BP DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
HEF4093BT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Name Description Version

NXP Semiconductors

001aag104

1

1A

2

1B

5

2A

6

2B

8

3A

9

3B

12

4A

13

4B

3

4

10

11

1Y

2Y

3Y

4Y

001aag105

nA

nB

nY

HEF4093B

1A V

DD

1B 4B

1Y 4A

2Y 4Y

2A 3Y

2B 3B

V

SS

3A

001aag106

1

2

3

4

5

6

7

8

10

9

12

11

14

13

5. Functional diagram

HEF4093B

Quad 2-input NAND Schmitt trigger

Fig 1. Functional diagram Fig 2. Logic diagram (one gate)

6. Pinning information

6.1 Pinning

Fig 3. Pin configuration

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Product data sheet Rev. 8 — 21 November 2011 2 of 15

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6.2 Pin description

Table 2. Pin description

Symbol Pin Description

1A to 4A 1, 5, 8, 12 input
1B to 4B 2, 6, 9, 13 input
1Y to 4Y 3, 4, 10, 11 output
V

DD

V

SS

14 supply voltage
7 ground (0 V)

7. Functional description

HEF4093B

Quad 2-input NAND Schmitt trigger

Table 3. Function table

[1]

Input Output
nA nB nY

LLH
LHH
HLH
HHL

[1] H = HIGH voltage level; L = LOW voltage level.

8. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V

Symbol Parameter Conditions Min Max Unit

V

DD

I

IK

V

I

I

OK

I

I/O

I

DD

T

stg

T

amb

P

tot

supply voltage 0.5 +18 V
input clamping current VI< 0.5 V or VI>VDD + 0.5 V - 10 mA
input voltage 0.5 VDD + 0.5 V
output clamping current VO< 0.5 V or VO>VDD + 0.5 V - 10 mA
input/output current - 10 mA
supply current - 50 mA
storage temperature 65 +150 C
ambient temperature 40 +125 C
total power dissipation T

= 40 C to +125 C

amb

DIP14
SO14

[1]

- 750 mW

[2]

- 500 mW

P power dissipation per output - 100 mW

= 0 V (ground).

SS

[1] For DIP14 packages: above T
[2] For SO14 packages: above T

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Product data sheet Rev. 8 — 21 November 2011 3 of 15

= 70 C, P

amb

= 70 C, P

amb

derates linearly with 12 mW/K.

tot

derates linearly with 8 mW/K.

tot

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

9. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Max Unit

V

DD

V

I

T

amb

supply voltage 3 15 V
input voltage 0 V

DD

V

ambient temperature in free air 40 +125 C

10. Static characteristics

Table 6. Static characteristics

VSS = 0 V; VI=VSS or VDD; unless otherwise specified.

Symbol Parameter Conditions V

V

OH

HIGH-level

IO < 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V

output voltage

V

OL

LOW-level

IO < 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V

output voltage

I

OH

HIGH-level
output current

I

OL

LOW-level
output current

I

I

input leakage

VO = 2.5 V 5 V - 1.7 - 1.4 - 1.1 - 1.1 mA
V

= 4.6 V 5 V - 0.64 - 0.5 - 0.36 - 0.36 mA

O

= 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA

V

O

= 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA

V

O

VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA

= 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA

V

O

= 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA

V

O

current

I

DD

supply current all valid input

combinations;

=0A

I

O

C

I

input
capacitance

10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V

10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V

15 V - 0.1 - 0.1 - 1.0 - 1.0 A

5 V - 0.25 - 0.25 - 7.5 - 7.5 A
10 V - 0.5 - 0.5 - 15.0 - 15.0 A
15 V - 1.0 - 1.0 - 30.0 - 30.0 A

DD

T

= 40 C T

amb

= +25 C T

amb

= +85 C T

amb

= +125 C Unit

amb

Min Max Min Max Min Max Min Max

---7.5-- - -pF

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 4 of 15

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

11. Dynamic characteristics

Table 7. Dynamic characteristics

T

= 25 C; CL = 50 pF; tr = tf  20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.

amb

Symbol Parameter Conditions V

t

PHL

HIGH to LOW

nA or nB to nY 5 V 63 ns + (0.55 ns/pF)C

propagation delay

t

PLH

LOW to HIGH

nA or nB to nY 5 V 58 ns + (0.55 ns/pF)C

propagation delay

t

THL

HIGH to LOW output

nY to LOW 5 V 10 ns + (1.00 ns/pF)C

transition time

t

TLH

LOW to HIGH output
transition time

nA or nB to
HIGH

DD

Extrapolation formula

10 V 29 ns + (0.23 ns/pF)C
15 V 22 ns + (0.16 ns/pF)C

10 V 29 ns + (0.23 ns/pF)C
15 V 22 ns + (0.16 ns/pF)C

10 V 9 ns + (0.42 ns/pF)C
15 V 6 ns + (0.28 ns/pF)C

5 V 10 ns + (1.00 ns/pF)C
10 V 9 ns + (0.42 ns/pF)C
15 V 6 ns + (0.28 ns/pF)C

[1]

Min Typ Max Unit

- 90 185 ns

L

-4080ns

L

-3060ns

L

- 85 170 ns

L

-4080ns

L

-3060ns

L

- 60 120 ns

L

-3060ns

L

-2040ns

L

- 60 120 ns

L

-3060ns

L

-2040ns

L

[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).

Table 8. Dynamic power dissipation

VSS = 0 V; tr = tf  20 ns; T

Symbol Parameter V

P

D

dynamic power
dissipation

= 25 C.

amb

Typical formula where:

DD

5V PD = 1300  fi + (fo  CL)  V
10 V P
15 V P

= 6400  fi + (fo  CL)  V

D

= 18700  fi + (fo  CL)  V

D

2

(W) fi = input frequency in MHz;

DD
DD

2

DD

(W)

2

(W)

f

= output frequency in MHz;

o

C

= output load capacitance in pF;

L

(fo  CL) = sum of the outputs;
V

= supply voltage in V.

DD

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Product data sheet Rev. 8 — 21 November 2011 5 of 15

NXP Semiconductors

001aag197

input

output

t

PLH

t

PHL

0 V

V

I

V

M

V

M

V

OH

V

OL

t

TLH

t

THL

90 %

10 %

10 %

90 %

t

r

t

f

V

DD

V

I

V

O

001aag182

DUT

C

L

R

T

G

12. Waveforms

Measurement points are given in Table 9.
Logic levels: V

, tf = input rise and fall times.

t

r

Fig 4. Propagation delay and output transition time

and VOH are typical output voltage levels that occur with the output load.

OL

HEF4093B

Quad 2-input NAND Schmitt trigger

Table 9. Measurement points

Supply voltage Input Output
V

DD

5 V to 15 V 0.5V

Test data given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.

= load capacitance including jig and probe capacitance.

C

L

= termination resistance should be equal to the output impedance Zo of the pulse generator.

R

T

V

M

DD

V

M

0.5V

DD

Fig 5. Te s t circuit

Table 10. Test data

Supply voltage Input Load
V

DD

5 V to 15 V VSS or V

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Product data sheet Rev. 8 — 21 November 2011 6 of 15

V

I

DD

tr, t

f

C

L

 20 ns 50 pF

NXP Semiconductors

001aag107

V

O

V

I

V

H

V

T+

V

T−

001aag108

V

O

V

I

V

H

V

T+

V

T−

13. Transfer characteristics

Table 11. Transfer characteristics

VSS=0V; T

Symbol Parameter Conditions V

V

T+

V

T

V

H

= 25 C; see Figure 6 and Figure 7.

amb

positive-going threshold voltage 5 V 1.9 2.9 3.5 V

negative-going threshold voltage 5 V 1.5 2.2 3.1 V

hysteresis voltage 5 V 0.4 0.7 - V

HEF4093B

Quad 2-input NAND Schmitt trigger

DD

10 V 3.6 5.2 7 V
15 V 4.7 7.3 11 V

10 V 3 4.2 6.4 V
15 V 4 6.0 10.3 V

10 V 0.6 1.0 - V
15 V 0.7 1.3 - V

Min Typ Max Unit

Fig 6. Transfer characteristic Fig 7. Waveforms showing definition of VT+ and VT

(between limits at 30 % and 70 %) and V

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 7 of 15

H

NXP Semiconductors

VI (V)

052.5

001aag109

200

100

I

DD

(μA)

0

VI (V)

0105

001aag110

1000

500

I

DD

(μA)

0

VI (V)

02010

001aag111

2000

1000

I

DD

(μA)

0

HEF4093B

Quad 2-input NAND Schmitt trigger

a. VDD = 5 V; T

c. V

= 15 V; T

DD

= 25 Cb.V

amb

= 25 C

amb

Fig 8. Typical drain current as a function of input

= 10 V; T

DD

amb

= 25 C

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 8 of 15

NXP Semiconductors

VDD (V)

2.5 17.512.57.551510

001aag112

5

10

V

I

(V)

0

V

T+

V

T−

001aag113

V

DD

V

DD

1
2

3

7

14

C

p

R

C

001aag114

V

DD

V

DD

1
2

3

7

14

C

C

P

------

V

DDVSS

–

V

H

------------------------ ->

T

= 25 C.

amb

Fig 9. T y pical switching levels as a function of supply voltage

HEF4093B

Quad 2-input NAND Schmitt trigger

14. Application information

Some examples of applications for the HEF4093B are:

• Wave and pulse shapers

• Astable multivibrators

• Monostable multivibrators

Fig 10. Astable multivibrator Fig 11. Schmitt trigger driven vi a a

If a Schmitt trigger is driven via a high-impedance (R > 1 k), then it is necessary to
incorporate a capacitor C with a value of ; otherwise oscillation can occur

on the edges of a pulse.

high-impedance input

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 9 of 15

is the external parasitic capacit ance be twe en inp uts and output; the value depends on

C

p

the circuit board layout.
Remark: The two inputs may be connected together, but this will result in a larger

through-current at the moment of switching.

NXP Semiconductors

UNIT

A

max.

1 2

(1) (1)

b

1

cD

(1)

Z

Ee M

H

L

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

mm

inches

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

SOT27-1

99-12-27
03-02-13

A

min.

A

max.

b

max.

w

M

E

e

1

1.73

1.13

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05

0.2542.54 7.62

8.25

7.80

10.0

8.3

2.24.2 0.51 3.2

0.068

0.044

0.021

0.015

0.77

0.73

0.014

0.009

0.26

0.24

0.14

0.12

0.010.1 0.3

0.32

0.31

0.39

0.33

0.0870.17 0.02 0.13

050G04 MO-001 SC-501-14

M

H

c

(e )

1

M

E

A

L

seating plane

A

1

w M

b

1

e

D

A

2

Z

14

1

8

7

b

E

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

15. Package outline

HEF4093B

Quad 2-input NAND Schmitt trigger

Fig 12. Package outline SOT27-1 (DIP14)

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 10 of 15

NXP Semiconductors

UNIT

A

max.

A1A2A

3

b

p

cD

(1)E(1)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

mm

inches

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

1.27

6.2

5.8

0.7

0.6

0.7

0.3

8
0

o
o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

X

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

(A )

3

A

7

8

1

14

y

076E06 MS-012

pin 1 index

0.069

0.010

0.004

0.057

0.049

0.01

0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15

0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27
03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

HEF4093B

Quad 2-input NAND Schmitt trigger

Fig 13. Package outline SOT108-1 (SO14)

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 11 of 15

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

16. Revision history

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF4093B v.8 20111121 Product data sheet - HEF4093B v.7
Modifications:
HEF4093B v.7 20100901 Product data sheet - HEF4093B v.6
HEF4093B v.6 20091202 Product data sheet - HEF4093B v.5
HEF4093B v.5 20090728 Product data sheet - HEF4093B v.4
HEF4093B v.4 20080612 Product data sheet - HEF4093B_CNV v.3
HEF4093B_CNV v.3 19950101 Product specification - HEF4093B_CNV v.2
HEF4093B_CNV v.2 19950101 Product specification - -

• Table 6: I

minimum values changed to maximum

OH

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Product data sheet Rev. 8 — 21 November 2011 12 of 15

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

17. Legal information

17.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed si nce this d ocument was p ublished and may dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

17.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to co nt ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

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data sheet shall define the specification of the product as agreed between
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deemed to offer functions and qualities beyond those described in the
Product data sheet.

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Limited warranty and liability — Information in this document is believed to

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Notwithstanding any damages that customer might incur for any reason
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changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
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therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or cust omer product
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NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
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the products or of the application or use by customer’s third part y
customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
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agreed in a valid written individual agreement. In case an individual
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applying the customer’s general terms and conditions with regard to the
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No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell product s that is open for accept ance or the gr ant,
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other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.

, unless otherwise

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 13 of 15

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lif ied nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, da mages or failed produ ct claims result ing from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.

17.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.

18. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]

HEF4093B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.

Product data sheet Rev. 8 — 21 November 2011 14 of 15

NXP Semiconductors

19. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Transfer characteristics . . . . . . . . . . . . . . . . . . 7

14 Application information. . . . . . . . . . . . . . . . . . . 9

15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12

17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

18 Contact information. . . . . . . . . . . . . . . . . . . . . 14

19 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

HEF4093B

Quad 2-input NAND Schmitt trigger

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2011. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]

Date of release: 21 November 2011

Document identifier: HEF4093B