NXP PUMD 3 NXP Datasheet

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PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

Rev. 10 — 15 November 2009 Product data sheet

1. Product profile

1.1 General description

NPN/PNP Resistor-Equipped Transistors (RET).

Table 1. Product overview

Type number Package PNP/PNP

PEMD3 SOT666 - PEMB11 PEMH11 PIMD3 SOT457 SC-74 - PUMD3 SOT363 SC-88 PUMB11 PUMH11

NXP JEITA

complement

NPN/NPN complement

1.2 Features

 Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs

1.3 Applications

 Low current peripheral driver  Control of IC inputs  Replaces general-purpose transistors in digital applications

1.4 Quick reference data

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

CEO

R1 bias resistor 1 (input) 7 10 13 kΩ R2/R1 bias resistor ratio 0.8 1 1.2

collector-emitter voltage open base - - 50 V output current (DC) - - 100 mA

NXP Semiconductors

2. Pinning information

Table 3. Pinning

Pin Description Simplified outline Symbol

1 GND (emitter) TR1 2 input (base) TR1 3 output (collector) TR2 4 GND (emitter) TR2 5 input (base) TR2 6 output (collector) TR1

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

6 45

1 32

001aab55

65 4

TR1

R2 R1

TR2

3. Ordering information

Table 4. Ordering information

Type number Package

PEMD3 - plastic surface mounted package; 6 leads S OT666 PIMD3 SC-74 plastic surface mounted package; 6 leads SOT457 PUMD3 SC-88 plastic surface mounted package; 6 leads S OT363

4. Marking

Table 5. Marking codes

Type number Marking code

PEMD3 D3 PIMD3 M7 PUMD3 D*3

[1] * = -: made in Hong Kong

* = p: made in Hong Kong * = t: made in Malaysia * = W: made in China

006aaa14

Name Description Version

[1]

Product data sheet Rev. 10 — 15 November 2009 2 of 11

NXP Semiconductors

5. Limiting values

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transistor; for the PNP transistor with negative polarity

CBO

CEO

EBO

tot

stg

amb

Per device

tot

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

collector-base voltage open emitter - 50 V collector-emitter voltage open base - 50 V emitter-base voltage open collector - 10 V input voltage TR1

positive - +40 V negative - −10 V

input voltage TR2

positive - +10 V

negative - −40 V output current (DC) - 100 mA peak collector current - 100 mA total power dissipation T

SOT363

SOT457

SOT666 storage temperature −65 +150 °C junction temperature - 150 °C ambient temperature −65 +150 °C

total power dissipation T

SOT363

SOT457

SOT666

amb

≤ 25 °C

[1]

-200mW

[2]

-300mW

[1][3]

-200mW

[1]

-300mW

[2]

-600mW

[1][3]

-300mW

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint. [2] Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint. [3] Reflow soldering is the only recommended soldering method.

Product data sheet Rev. 10 — 15 November 2009 3 of 11

NXP Semiconductors

6. Thermal characteristics

Table 7. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per transistor

th(j-a)

Per device

th(j-a)

thermal resistance from junction to ambient

SOT363 SOT457 SOT666

thermal resistance from junction to ambient

SOT363 SOT457 SOT666

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

in free air

[1]

--625K/W

[2]

--417K/W

[1][3]

--625K/W

in free air

[1]

--416K/W

[2]

--208K/W

[1][3]

--416K/W

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint. [3] Reflow soldering is the only recommended soldering method.

7. Characteristics

Table 8. Characteristics

= 25 °C unless otherwise specified.

amb

Symbol Parameter Conditions Min Typ Max Unit

Per transistor; for the PNP transistor with negative polarity

CBO

CEO

EBO

CEsat

I(off)

I(on)

R1 bias resistor 1 (input) 7 10 13 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 C

collector-base cut-off

VCB=50V; IE= 0 A - - 100 nA

current collector-emitter

cut-off current

emitter-base cut-off

VCE=30V; IB=0A - - 1 μA

=30V; IB=0A;

=150°C

--50μA

VEB=5V; IC= 0 A - - 400 μA

current DC current gain VCE=5V; IC=5mA 30 - collector-emitter

IC=10mA; IB= 0.5 mA - - 150 mV

saturation voltage off-state input voltage VCE=5V; IC=100μA-1.10.8V on-state input voltage VCE=0.3V; IC=10mA 2.5 1.8 - V

collector capacitance VCB=10V; IE=ie=0A;

---

f=1MHz TR1 (NPN) - - 2.5 pF TR2 (PNP) - - 3 pF

Product data sheet Rev. 10 — 15 November 2009 4 of 11

NXP Semiconductors

006aaa034

006aaa035

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

−1

(1) (2) (3)

101

IC (mA)

VCE=5V

amb amb amb

= 150 °C =25°C = −40 °C

(1) T (2) T (3) T

Fig 1. TR1 (NPN): DC current gain as a function of

collector current; typical values

006aaa036

CEsat

(V)

(1)

−1

−2

110

=20

C/IB

amb amb amb

= 100 °C =25°C = −40 °C

(1) T (2) T (3) T

(2) (3)

IC (mA)

Fig 2. TR1 (NPN): Collector-emitter voltage as a

function of collector current; typical values

006aaa037

I(on)

(V)

(1) (2)

−1

VCE=0.3V (1) T (2) T (3) T

−1

amb amb amb

= −40 °C =25°C = 100 °C

(3)

101

IC (mA)

Fig 3. TR1 (NPN): On-state input voltage as a

function of collector current; typical values

I(off)

(V)

(1)

(2)

(3)

−1

(1) T (2) T (3) T

−2

CE amb amb amb

=5V

= −40 °C =25°C = 100 °C

−1

IC (mA)

10110

Fig 4. TR1 (NPN): Off-state input voltage as a

function of collector current; typical values

Product data sheet Rev. 10 — 15 November 2009 5 of 11

NXP Semiconductors

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

−10

−1

−10

−1

−10−1

(1)

(3)

006aaa046

(2)

IC (mA)

−10

VCE= −5V

amb amb amb

= 150 °C =25°C = −40 °C

(1) T (2) T (3) T

Fig 5. TR2 (PNP): DC current gain as a function of

collector current; typical values

−1

CEsat

(V)

−1

−10

−2

−10

−1 −10

=20

C/IB

amb amb amb

= 100 °C =25°C = −40 °C

(1) T (2) T (3) T

(1)

(3)

−10

006aaa047

(2)

IC (mA)

Fig 6. TR2 (PNP): Collector-emitter voltage as a

function of collector current; typical values

006aaa048

IC (mA)

−10

I(on)

(V)

−10

−1

−10

(2)

(1)

(3)

−1

−10−1

VCE= −0.3 V

amb amb amb

= −40 °C =25°C = 100 °C

(1) T (2) T (3) T

Fig 7. TR2 (PNP): On-state input voltage as a

function of collector current; typical values

−10

I(off)

(V)

(1)

−1

−10

(1) T (2) T (3) T

−2

CE amb amb amb

= −5V

= −40 °C =25°C = 100 °C

(2)

(3)

−1

006aaa049

IC (mA)

−10−1−10

Fig 8. TR2 (PNP): Off-state input voltage as a

function of collector current; typical values

Product data sheet Rev. 10 — 15 November 2009 6 of 11

NXP Semiconductors

8. Package outline

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

2.2

2.0

1.35

1.15

2.2

1.8

pin 1 index

132

0.65

1.3

0.45

465

0.15

0.3

0.2

1.1

0.8

0.25

0.10

3.1

2.7

3.0

1.7

2.5

1.3

06-03-16Dimensions in mm

pin 1 index

132

0.95

1.9

0.40

0.25

Fig 9. Package outline SOT363 (SC-88) Fig 10. Package outline SOT457 (SC-74)

1.7

1.5

1.3

1.1 pin 1 index

1.7

1.5

456

0.3

0.1

0.6

0.5

0.6

0.2

1.1

0.9

0.26

0.10

04-11-08Dimensions in mm

Fig 11. Package outline SOT666

Dimensions in mm

123

0.5 1

0.27

0.17

0.18

0.08

04-11-08

Product data sheet Rev. 10 — 15 November 2009 7 of 11

NXP Semiconductors

9. Packing information

Table 9. Packing methods

The indicated -xxx are the last three digits of the 12NC ordering code.

Type number Package Description Packing quantity

PEMD3 SOT666 2 mm pitch, 8 mm tape and reel - - -315 -

PIMD3 SOT457 4 mm pitch, 8 mm tape and reel; T1

PUMD3 SOT363 4 mm pitch, 8 mm tape and reel; T1

[1] For further information and the availability of packing methods, see Section 12. [2] T1: normal taping [3] T2: reverse taping

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

[1]

3000 4000 8000 10000

4 mm pitch, 8 mm tape and reel - -115 - -

[2]

-115 - - -135

[3]

4 mm pitch, 8 mm tape and reel; T2

-125 - - -165

[2]

-115 - - -135

[3]

-125 - - -165

Product data sheet Rev. 10 — 15 November 2009 8 of 11

NXP Semiconductors

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

10. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PEMD3_PIMD3_ PUMD3_10 20091115 Product data sheet - PEMD3_PIMD3_ PUMD3_9 Modifications:

PEMD3_PIMD3_ PUMD3_9 20050518 Product data sheet - PEMD3_PIMD3_ PUMD3_8 PEMD3_PIMD3_ PUMD3_8 20041206 Product data sheet - PEMD3_PUMD3_7

• This data sheet was changed to reflect the new company name NXP Semiconductors,

including new legal definitions and disclaimers. No changes were made to the technical content.

• Figure 9 “Package outline SOT363 (SC-88)”: updated

Product data sheet Rev. 10 — 15 November 2009 9 of 11

NXP Semiconductors

PEMD3; PIMD3; PUMD3

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

11. Legal information

11.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specificati on for product development. Preliminary [short] data sheet Qualification This document contains dat a from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

11.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

11.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.

, including those pertaining to warranty,

11.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

12. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 10 — 15 November 2009 10 of 11

NXP Semiconductors

NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ

13. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

9 Packing information . . . . . . . . . . . . . . . . . . . . . 8

10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9

11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10

11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10

11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

12 Contact information. . . . . . . . . . . . . . . . . . . . . 10

13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PEMD3; PIMD3; PUMD3

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Document identifier: PEMD3_PIMD3_PUMD3_10

Date of release: 15 November 2009

NXP PUMD 3 NXP Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1. Product profile

1.1 General description

1.2 Features

1.3 Applications

1.4 Quick reference data

2. Pinning information

3. Ordering information

4. Marking

5. Limiting values

6. Thermal characteristics

7. Characteristics

8. Package outline

9. Packing information

10. Revision history

11. Legal information

11.1 Data sheet status

11.2 Definitions

11.3 Disclaimers

11.4 Trademarks

12. Contact information

13. Contents