NXP PDTD113EK, PDTD113ES, PDTD113ET Schematic [ru]
PDTD113E series
NPN 500 mA, 50 V resistor-equipped transistors;
R1 = 1 kΩ, R2 = 1 kΩ
Rev. 02 — 16 November 2009 Product data sheet
1. Product profile
1.1 General description
500 mA NPN Resistor-Equipped Transistors (RET) family.
Table 1. Product overview
Type number Package PNP complement
PDTD113EK SOT346 SC-59A TO-236 PDTB113EK
PDTD113ES
PDTD113ET SOT23 - TO-236AB PDTB113ET
NXP JEITA JEDEC
[1]
SOT54 SC-43A TO-92 PDTB113ES
[1] Also available in SOT54A and SOT54 variant packages (see Section 2).
1.2 Features
Built-in bias resistors Reduces component count
Simplifies circuit design Reduces pick and place costs
500 mA output current capability ±10 % resistor ratio tolerance
1.3 Applications
Digital application in automotive and
industrial segments
Cost saving alternative for BC817 series
in digital applications
Controlling IC inputs Switching loads
1.4 Quick reference data
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
CEO
I
O
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 0.9 1.0 1.1
collector-emitter voltage open base - - 50 V
output current (DC) - - 500 mA
NXP Semiconductors
7
8
7
4
2. Pinning information
Table 3. Pinning
Pin Description Simplified outline Symbol
SOT54
1 input (base)
2 output (collector)
3 GND (emitter)
SOT54A
1 input (base)
2 output (collector)
3 GND (emitter)
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
2
R2
3
2
R2
3
001aab34
001aab34
R1
1
1
2
3
006aaa145
R1
1
1
2
3
006aaa145
SOT54 variant
1 input (base)
2 output (collector)
3 GND (emitter)
SOT23, SOT346
1 input (base)
2 GND (emitter)
3 output (collector)
1
1
2
3
001aab44
3
1
12
006aaa14
R1
2
R2
3
006aaa145
3
R1
R2
2
sym007
PDTD113E_SER_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 16 November 2009 2 of 10
NXP Semiconductors
3. Ordering information
Table 4. Ordering information
Type number Package
PDTD113EK SC-59A plastic surface mounted package; 3leads SOT346
PDTD113ES
[1]
PDTD113ET - plastic surface mounted packa ge ; 3leads SOT23
[1] Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9).
4. Marking
Table 5. Marking codes
Type number Marking code
PDTD113EK E1
PDTD113ES D113ES
PDTD113ET *7R
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
Name Description Version
SC-43A plastic single-ended leaded (through hole) package;
3 leads
[1]
SOT54
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CBO
V
CEO
V
EBO
V
I
I
O
P
tot
T
stg
T
j
T
amb
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
collector-base voltage open emitter - 50 V
collector-emitter voltage open base - 50 V
emitter-base voltage open collector - 10 V
input voltage
positive - +10 V
negative - −10 V
output current (DC) - 500 mA
total power dissipation T
amb
≤ 25 °C
[1]
SOT346 - 250 mW
SOT54 - 500 mW
SOT23 - 250 mW
storage temperature −65 +150 °C
junction temperature - 150 °C
ambient temperature −65 +150 °C
PDTD113E_SER_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 16 November 2009 3 of 10
Loading...