NXP PBSS5350SS Technical data

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PBSS5350SS

50 V, 2.7 A PNP/PNP low V

Rev. 01 — 3 April 2007 Product data sheet

1. Product profile

1.1 General description

PNP/PNP double low V
power Surface-Mounted Device (SMD) plastic package.

Table 1. Product overview

Type number Package NPN/PNP

PBSS5350SS SOT96-1 SO8 PBSS4350SPN PBSS4350SS

1.2 Features

n Low collector-emitter saturation voltage V
n High collector current capability IC and I
n High collector current gain (hFE) at high I
n High efficiency due to less heat generation
n Smaller required Printed-Circuit Board (PCB) area than for conventional transistors

CEsat

Breakthrough In Small Signal (BISS) transistor in a medium

CEsat

NXP Name

(BISS) transistor

complement

CEsat

CM

C

NPN/NPN
complement

1.3 Applications

n Dual low power switches (e.g. motors, fans)
n Automotive

1.4 Quick reference data

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

Per transistor

V

CEO

I

C

I

CM

R

CEsat

[1] Pulse test: tp≤ 300 µs; δ≤0.02.

collector-emitter voltage open base - - −50 V
collector current - - −2.7 A
peak collector current single pulse;

t

≤ 1ms

p

collector-emitter
saturation resistance

IC= −2A;
I

= −200 mA

B

--−5A

[1]

- 95 140 mΩ

NXP Semiconductors

PBSS5350SS

2. Pinning information

Table 3. Pinning

Pin Description Simplified outline Symbol

1 emitter TR1
2 base TR1
3 emitter TR2
4 base TR2
5 collector TR2
6 collector TR2
7 collector TR1
8 collector TR1

3. Ordering information

Table 4. Ordering information

Type number Package

PBSS5350SS SO8 plastic small outline package; 8 leads; body width

50 V, 2.7 A PNP/PNP low V

8

1

5

4

(BISS) transistor

CEsat

8765

TR1 TR2

1234

006aaa976

Name Description Version

SOT96-1

3.9 mm

4. Marking

Table 5. Marking codes

Type number Marking code

PBSS5350SS 5350SS

5. Limiting values

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transistor

V

CBO

V

CEO

V

EBO

I

C

I

CM

I

B

P

tot

collector-base voltage open emitter - −50 V
collector-emitter voltage open base - −50 V
emitter-base voltage open collector - −5V
collector current - −2.7 A
peak collector current single pulse;

t

≤ 1ms

p

- −5A

base current - −0.5 A
total power dissipation T

amb

≤ 25 °C

[1]

- 0.55 W

[2]

- 0.87 W

[3]

- 1.43 W

PBSS5350SS_1 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 01 — 3 April 2007 2 of 14

NXP Semiconductors

PBSS5350SS

Table 6. Limiting values

50 V, 2.7 A PNP/PNP low V

…continued

(BISS) transistor

CEsat

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per device

P

tot

T

j

T

amb

T

stg

total power dissipation T

junction temperature - 150 °C
ambient temperature −65 +150 °C
storage temperature −65 +150 °C

amb

≤ 25 °C

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

2.5

P

tot

(W)

2.0

(1)

[1]

- 0.75 W

[2]

- 1.2 W

[3]

-2W

006aaa967

1.5

(2)

1.0

0.5

0

−75 17512525 75−25

(3)

(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
(3) FR4 PCB, standard footprint

Fig 1. Per device: Power derating curves

T

(°C)

amb

2

PBSS5350SS_1 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 01 — 3 April 2007 3 of 14

NXP Semiconductors

PBSS5350SS

6. Thermal characteristics

Table 7. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per transistor

R

th(j-a)

R

th(j-sp)

Per device

R

th(j-a)

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

thermal resistance from
junction to ambient

thermal resistance from
junction to solder point

thermal resistance from
junction to ambient

50 V, 2.7 A PNP/PNP low V

in free air

in free air

[1]

- - 227 K/W

[2]

- - 144 K/W

[3]

--87K/W

--40K/W

[1]

- - 167 K/W

[2]

- - 104 K/W

[3]

--63K/W

(BISS) transistor

CEsat

006aaa809

2

10

tp (s)

3

10

Z

th(j-a)

(K/W)

10

3

10

2

10

10

1

−1

10

duty cycle =

−5

1.0

0.75

0.5

0.33

0.2

0.1

0.05

0.02

0.01
0

−4

10

−3

10

−2

−1

10

1

1010

FR4 PCB, standard footprint

Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

PBSS5350SS_1 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 01 — 3 April 2007 4 of 14

NXP Semiconductors

PBSS5350SS

3

10

th(j-a)

10

10

2

10

1

−1

10

duty cycle =

1.0

0.75

0.5

0.33

0.2

0.1

0.05

0.02

0.01
0

−5

−4

10

10

Z

(K/W)

FR4 PCB, mounting pad for collector 1 cm

50 V, 2.7 A PNP/PNP low V

−3

−2

2

−1

10

1

1010

(BISS) transistor

CEsat

006aaa810

2

10

tp (s)

3

10

Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

006aaa811

2

tp (s)

3

10

Z

th(j-a)

(K/W)

3

10

2

10

10

1

10

duty cycle =

1.0

0.75

0.5

0.33

0.2

0.1

0.05

0.02

0.01
0

−4

−3

−2

10

−1

10

10110

10

Ceramic PCB, Al2O3, standard footprint

Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

PBSS5350SS_1 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 01 — 3 April 2007 5 of 14