NXP PBSS4160DS Schematic [ru]
PBSS4160DS
60 V, 1 A NPN/NPN low V
Rev. 04 — 11 December 2009 Product data sheet
1. Product profile
1.1 General description
NPN/NPN low V
(SC-74) Surface Mounted Device (SMD) plastic package.
PNP/PNP complement: PBSS5160DS.
1.2 Features
Low collector-emitter saturation voltage V
High collector current capability: IC and I
High collector current gain (hFE) at high I
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
(BISS) transistor
CEsat
Breakthrough In Small Signal (BISS) transistor pair in a SOT457
CEsat
CEsat
CM
C
1.3 Applications
Dual low power switches (e.g. motors, fans)
Automotive applications
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
V
CEO
I
C
I
CM
R
CEsat
[1] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[2] Pulse test: t
collector-emitter voltage open base - - 60 V
collector current
peak collector current single pulse;
tp≤ 1ms
collector-emitter saturation
resistance
≤ 300 μs; δ≤0.02.
p
IC=1A;
= 100 mA
I
B
[1]
--1A
--2A
[2]
- 200 250 mΩ
NXP Semiconductors
PBSS4160DS
2. Pinning information
Table 2. Pinning
Pin Description Simplified outline Symbol
1emitter TR1
2 base TR1
3 collector TR2
4emitter TR2
5 base TR2
6 collector TR1
3. Ordering information
Table 3. Ordering information
Type number Package
PBSS4160DS SC-74 plastic surface mounted package (TSOP6); 6 leads SOT457
60 V, 1 A NPN/NPN low V
4
56
132
(BISS) transistor
CEsat
6
TR1
1
sym020
5
4
TR2
2
3
Name Description Version
4. Marking
Table 4. Marking codes
Type number Marking code
PBSS4160DS B8
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
I
BM
collector-base voltage open emitter - 80 V
collector-emitter voltage open base - 60 V
emitter-base voltage open collector - 5 V
collector current
[1]
-0.87A
[2]
-1A
[3]
-1A
peak collector current single pulse; tp≤ 1ms - 2 A
base current - 300 mA
peak base current single pulse; tp≤ 1ms - 1 A
PBSS4160DS_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 11 December 2009 2 of 14
NXP Semiconductors
PBSS4160DS
Table 5. Limiting values
60 V, 1 A NPN/NPN low V
…continued
(BISS) transistor
CEsat
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
P
tot
total power dissipation T
amb
≤ 25 °C
[1]
-290mW
[2]
-370mW
[3]
-450mW
Per device
P
tot
T
j
T
amb
T
stg
total power dissipation T
junction temperature - 150 °C
ambient temperature −65 +150 °C
storage temperature −65 +150 °C
amb
≤ 25 °C
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
[3] Device mounted on a ceramic PCB, Al
, standard footprint.
2O3
[1]
-420mW
[2]
-560mW
[3]
-700mW
2
.
800
(1)
P
tot
(mW)
600
(2)
(3)
400
200
0
0 16012040 80
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4PCB, mounting pad for collector 1 cm
(3) FR4PCB, standard footprint
Fig 1. Power derating curves
006aaa493
T
(°C)
amb
2
PBSS4160DS_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 11 December 2009 3 of 14
NXP Semiconductors
PBSS4160DS
6. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
R
th(j-a)
R
th(j-sp)
Per device
R
th(j-a)
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
[3] Device mounted on a ceramic PCB, Al
thermal resistance from
junction to ambient
thermal resistance from
junction to solder point
thermal resistance from
junction to ambient
60 V, 1 A NPN/NPN low V
in free air
in free air
, standard footprint.
2O3
(BISS) transistor
CEsat
[1]
--431K/W
[2]
--338K/W
[3]
--278K/W
--105K/W
[1]
--298K/W
[2]
--223K/W
[3]
--179K/W
2
.
006aaa494
2
10
tp (s)
10
Z
th(j-a)
(K/W)
3
10
δ = 1
0.75
0.50
0.20
0.10
0.05
0.02
0.01
0
0.33
−4
10
−3
10
−2
−1
10
1
1010
2
10
10
1
−5
10
FR4 PCB, standard footprint
Fig 2. T ra nsient thermal impedance from junction to ambient as a function of pulse time; typical values
3
PBSS4160DS_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 11 December 2009 4 of 14
NXP Semiconductors
PBSS4160DS
3
10
Z
th(j-a)
(K/W)
δ = 1
0.75
0.50
2
10
10
1
−5
10
0.20
0.10
0.05
0.02
0.01
0.33
0
−4
10
FR4 PCB, mounting pad for collector 1 cm
60 V, 1 A NPN/NPN low V
−3
10
−2
2
−1
10
1
1010
(BISS) transistor
CEsat
006aaa495
2
10
tp (s)
10
Fig 3. T ra nsient thermal impedance from junction to ambient as a function of pulse time; typical values
3
10
006aaa496
3
Z
th(j-a)
(K/W)
δ = 1
0.75
0.50
2
10
10
1
10
−5
0.20
0.10
0.05
0.02
0.01
0
0.33
−4
10
−3
10
−2
−1
10
1
1010
2
10
tp (s)
10
Ceramic PCB, Al2O3, standard footprint
Fig 4. T ra nsient thermal impedance from junction to ambient as a function of pulse time; typical values
3
PBSS4160DS_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 11 December 2009 5 of 14
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