NXP IP4770CZ16, IP4771CZ16, IP4772CZ16 Schematic [ru]

IP4770/71/72CZ16

SSOP16

1. General description

VGA/video interface with integrated buffers, ESD protection and integrated termination resistors

Rev. 2 — 19 May 2011 Product data sheet

The IP4770CZ16, IP4771CZ16, IP4772CZ16 is connected between the VGA/DVI interface and the video graphics controller and includes level shifting for the DDC signals, buffering for the SYNC lines as well as high-level ESD protection diodes for the RGB signal lines.

The level shifting functions are required when the DDC controller operates at a lower supply voltage than the monitor. To use this level shifting function the gates of the two N-channel MOSFETs have to be connected to the supply rail of the DDC transceivers.

Buffering for the SYNC signals is provided by two non-inverting buf fers, which accept TTL input levels and convert these to CMOS compliant output levels between pins V and GND.

CC(SYNC)

The IP4770CZ16 and IP4771CZ16 contain the formerly external termination resistors, which are typically required for the HSYNC and VSYNC lines of the video interface:

• IP4770CZ16: R

• IP4771CZ16: R

• IP4772CZ16: R

All RGB I/Os are protected by a special diode configuration offering a low line capacitance of 4 pF (maximum) only to provide protection to downstream components for ESD voltages as high as ±8 kV contact discharge according to IEC 61000-4-2, level 4 standard.

2. Features and benefits

 Integrated high-level ESD protection, buffering, SYNC signal impedance matchin g and

level shifting

 T er minal connections with integrated rail-to-rail clam ping diodes with downstream ESD

protection of ±8 kV according to IEC 61000-4-2, level 4 standard

 Backflow protection on DDC lines  Drivers for HSYNC and VSYNC lines  Bidirectional level shifting N-channel FETs available for DDC clock and DDC data

channels

 Integrated impedance matching resistors on SYNC lines  Line capacitance < 4 pF per channel  Lead-free package and RoHS compliant

=55Ω

sync

=65Ω

sync

=10Ω to allow termination of the SYNC lines

sync

NXP Semiconductors

3. Applications

 To terminate and to buffer channels, to reduce EMI/RFI and to provide downstream

ESD protection for:

 VGA interfaces including DDC channels  Desktop and notebooks PCs  Graphics cards  Set-top boxes

4. Ordering information

Table 1. Ordering information

Type number Package

IP4770CZ16 SSOP16 plastic shrink small outline package; 16 leads; body IP4771CZ16 IP4772CZ16

IP4770/71/72CZ16

VGA/video interface

Name Description Version

SOT519-1

width 3.9 mm; lead pitch 0.635 mm

5. Marking

Table 2. Marking codes

Type number Marking code

IP4770CZ16 4770 IP4771CZ16 4771 IP4772CZ16 4772

Product data sheet Rev. 2 — 19 May 2011 2 of 14

NXP Semiconductors

6. Functional diagram

CC(SYNC)

SYNC_IN1

SYNC_IN2

term

CC(SYNC)

CC(DDC)

IP4770/71/72CZ16

VGA/video interface

CC(VIDEO)

SYNC_OUT1

SYNC_OUT2

VIDEO_1 VIDEO_2 VIDEO_3

DDC_OUT1 DDC_OUT2

BYP

DDC_IN1 DDC_IN2

IP4772CZ16: R

sync=Rbuffer

Fig 1. Functional diagram

and R

term

001aae818

=0Ω.

Product data sheet Rev. 2 — 19 May 2011 3 of 14

NXP Semiconductors

7. Pinning information

7.1 Pinning

IP4770/71/72CZ16

VGA/video interface

CC(SYNC)

CC(VIDEO)

VIDEO_1 SYNC_OUT1

VIDEO_2 SYNC_IN1

VIDEO_3 DDC_OUT2

CC(DCC)

IP4770CZ16

IP4771CZ16

IP4772CZ16

GND DDC_IN2

BYP DDC_OUT1

001aae809

SYNC_OUT2

SYNC_IN2

DDC_IN1

Fig 2. Pin configuration

7.2 Pin description

Table 3. Pin description

Symbol Pin Description

CC(SYNC)

CC(VIDEO)

VIDEO_1 3 video si gnal ESD protection channel 1 VIDEO_2 4 video si gnal ESD protection channel 2 VIDEO_3 5 video si gnal ESD protection channel 3 GND 6 ground V

CC(DDC)

BYP 8 this input is used to connect an external 0.2 μF bypass capacitor to increase

DDC_OUT1 9 DDC signal outpu t 1; connected to the video connector side of one of the

DDC_IN1 10 DDC signal input 1; connected to the VGA controller side of one of the SYNC

DDC_IN2 11 DDC signal input 2; connected to the VGA controller side of one of the SYNC

DDC_OUT2 12 DDC signal output 2; connected to the video connector side of one of the

SYNC_IN1 13 SYNC signal input 1; connected to the VGA controller side of one of the

SYNC_OUT1 14 SYNC signal output 1; connected to the video connector side of one of the

SYNC_IN2 15 SYNC signal input 2; connected to the VGA controller side of one of the

SYNC_OUT2 16 SYNC signal output 2; connected to the video connector side of one of the

1 supply voltage for SYNC_1 and SYNC_2 level shifter and their connected

ESD protections

2 supply voltage for VIDEO_1, VIDEO_2 and VIDEO_3 protection circuits

7 supply voltage for DDC_1 and DDC_2 level shifter N-FET gates

ESD withstand voltage rating for the DDC outputs (±8 kV with capacitor or ±4 kV without capacitor)

SYNC lines

lines

SYNC lines

Product data sheet Rev. 2 — 19 May 2011 4 of 14

NXP Semiconductors

8. Limiting values

IP4770/71/72CZ16

VGA/video interface

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to ground (GND).

Symbol Parameter Conditions Min Max Unit

ESD

electrostatic discharge voltage IEC 61000-4-2; pins

[1]

VIDEO_1, VIDEO_2, VIDEO_3, SYNC_OUT1, SYNC_OUT2, DDC_OUT1, DDC_OUT2

level 4; contact −8+8 kV level 4; air discharge −15 +15 kV

IEC 61000-4-2; all other pins

level 1; contact −2+2 kV level 1; air discharge −2+2 kV

CC(VIDEO)

CC(DDC)

CC(SYNC)

I(VIDEO_1)

I(VIDEO_2)

I(VIDEO_3)

I(DDC_IN1)

I(DDC_IN2)

I(SYNC_IN1)

I(SYNC_IN2)

O(DDC_OUT1)

O(DDC_OUT2)

tot

stg

video supply voltage −0.5 5.5 V data display channel supply voltage −0.5 5.5 V synchronization supply voltage −0.5 5.5 V input voltage on pin VIDEO_1 −0.5 V input voltage on pin VIDEO_2 −0.5 V input voltage on pin VIDEO_3 −0.5 V input voltage on pin DDC_IN1 −0.5 V input voltage on pin DDC_IN2 −0.5 V input voltage on pin SYNC_IN1 −0.5 V input voltage on pin SYNC_IN2 −0.5 V output voltage on pin DDC_OUT1 −0.5 V output voltage on pin DDC_OUT2 −0.5 V total power dissipation T

=25°C - 500 mW

amb

CC(VIDEO) CC(VIDEO) CC(VIDEO) CC(DDC) CC(DDC) CC(SYNC) CC(SYNC) CC(DDC) CC(DDC)

V V V V V V V V V

storage temperature −55 +125 °C

[1] Pins BYP, V

inductance, chip ceramic capacitor at each supply pin. ESD pulse is applied between the pins VIDEO_1, VIDEO_2, VIDEO_3, SYNC_OUT1, SYNC_OUT2, DDC_OUT1, DDC_OUT2 and

GND. The bypass capacitor at pin BYP can be omitted. In this case the maximum ESD level for DDC_OUT1 and DDC_OUT2 pins is reduced

to ±4kV.

Product data sheet Rev. 2 — 19 May 2011 5 of 14

CC(VIDEO)

and V

must be bypassed to ground (pin GND) via a low-impedance ground plane with 0.22 μF, low

CC(SYNC)

NXP Semiconductors

9. Recommended operating conditions

IP4770/71/72CZ16

VGA/video interface

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

oper

operating temperature −40 - +85 °C

10. Characteristics

Table 6. Sync circuit characteristics

CC(SYNC)

=5V; T

Symbol Parameter Conditions Min Typ Max Unit

Supply: pin V

CC(SYNC)

supply current on pin V

Input: pins SYNC_IN1 and SYNC_IN2

HIGH-level input voltage 2.0 - - V LOW-level input voltage - - 0.6 V

Output: pins SYNC_OUT1 and SYNC_OUT2

sync

HIGH-level output voltage IOH= 1 mA 4.85 - - V

LOW-level output voltage IOL= 1 mA - - 0.15 V

synchronization resistance IP4770CZ16

Sync channel

PLH

PHL

r(o)

f(o)

LOW to HIGH propagation delay CL=50pF; tr and tf≤ 5ns HIGH to LOW propagation delay CL=50pF; tr and tf≤ 5ns output rise time CL=50pF; tr and tf≤ 5ns - 4 - ns

output fall time CL= 50 pF; tr and tf≤ 5ns - 4 - ns

Protection diode

L(r)

V V

BRzd Fd

reverse leakage current per channel; V = 3.0 V - - 1 μA Zener diode breakdown voltage I = 1 mA 6 - 9 V diode forward voltage IF=1mA - 0.7 - V

=25°C; unless otherwise specified.

amb

CC(SYNC)

[1]

--50μA

[1]

SYNC input at 3 V

IP4772CZ16; I

=24mA 2.0 - - V

=24mA - - 0.8 V

IP4771CZ16 IP4772CZ16

=7pF; tr and tf≤ 5 ns - 1.5 - ns

--2mA

[2]

-55-Ω

[2]

-65-Ω

[3]

-10-Ω

[4]

--12ns

[4]

--12ns

[1] SYNC outputs unloaded. [2] R

sync=Rterm+Rbuffer

[3] R

sync=Rbuffer

[4] This parameter is guaranteed by design and characterization.

Product data sheet Rev. 2 — 19 May 2011 6 of 14

because R

term

=0Ω.

NXP Semiconductors

IP4770/71/72CZ16

VGA/video interface

Table 7. Video circuit characteristics

CC(VIDEO)

=5V; T

=25°C; unless otherwise specified.

amb

Symbol Parameter Conditions Min Typ Max Unit

Supply: pin V

CC(VIDEO)

supply current on pin V

CC(VIDEO)

static input signals - - 10 μA

Video channel: pins VIDEO_1, VIDEO_2 and VIDEO_3

ch(video)

i(video)

video channel capacitance fi= 1 MHz; VI=2.5V video input current VI=V

CC(VIDEO)

or GND −1- +1 μA

[1]

--4pF

Protection diode

[1] This parameter is guaranteed by design and characterization.

Table 8. Level circuit characteristics

CC(DDC)

diode forward voltage IF=1mA - 0.7 - V

=5V; T

=25°C; unless otherwise specified.

amb

Symbol Parameter Conditions Min Typ Max Unit

Supply: pin V

CC(DDC)

data display channel supply current - - 10 μA

N-MOSFET

L(off)

ΔV

off-state leakage current

on-state voltage drop V

CC(DDC)

=2.5V; VS= GND;

[1]

-- 10 μA

- - 0.18 V

IDS=3 mA

Protection diode

L(r)

V V

BRzd Fd

reverse leakage current per channel; V = 3.0 V - - 1 μA Zener diode breakdown voltage I = 1 mA 6 - 9 V diode forward voltage IF=1mA - 0.7 - V

[1] Input V

Product data sheet Rev. 2 — 19 May 2011 7 of 14

I(DDC_INx)

input V

I(DDC_INx)=VCC(DDC)

≤ V

− 0.4 V and output V

CC(DDC)

and output V

O(DDC_OUTx)=VCC(DDC)

O(DCC_OUTx)

≤ V

CC(DCC)

− 0.4V.

NXP Semiconductors

11. Application information

The IP4770CZ16, IP4771CZ16, IP4772CZ16 should be placed as close as possible to the VGA/DVI interface connector.

The ESD protection channels VIDEO_1, VIDEO_2 and VIDEO_3 can be connected in any order with RBG signals.

The 100 kΩ resistors between the DDC_OUTx channels and VCC_5V are optional. They may be used, if required, to pull-up the DDC_OUTx lines to VCC_5V when no monitor is connected to the VGA connector. Backflow current can flow between pins DDC_OUTx and VCC_5V via these resistors when VCC_5V is powered down.

HSYNC

VSYNC

VCC_5V

VCCGPIO

VCCA_DAC

CC(SYNC)

CC(DCC)

CC(VIDEO)

100 kΩ

SYNC_OUT2

SYNC_IN2

SYNC_IN1

SYNC_OUT1

IP4770/71/72CZ16

VGA/video interface

EMI-filter

VSYNC_OUT

SYNC_GND

HSYNC_OUT

RED FILTER

GREEN FILTER

BLUE FILTER

DDC_CLK

DDC_DATA GREEN_GND

Fig 3. Application diagra m

3 × 75 Ω

VIDEO_1

VIDEO_2

VIDEO_3

DCC_OUT2

DCC_IN2

DCC_IN1

DCC_OUT1

IP4770CZ16 IP4771CZ16 IP4772CZ16

DDC_DATA

DIG_GND

DDC_CLK

RED_VIDEO

GREEN_VIDEO

BLUE_VIDEO

RED_GND

BLUE_GND

001aae8

Product data sheet Rev. 2 — 19 May 2011 8 of 14

NXP Semiconductors

12. Package outline

IP4770/71/72CZ16

VGA/video interface

SOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm

w M

detail X

(A )

v M

SOT519-

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

OUTLINE

VERSION

SOT519-1

max.

1.73

0.25

0.10

1.55

1.40

IEC JEDEC JEITA

0.25

0.31

0.20

0.25

0.18

UNIT A1A2A3b

Note

1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.

(1)E(1)

5.0

4.8

REFERENCES

eHELL

4.0

3.8

6.2

0.635 1

5.8

0.89

0.41

(1)

0.180.2 0.09

EUROPEAN

PROJECTION

Zywv θ

0.18

0.05

ISSUE DATE

99-05-04 03-02-18

Fig 4. Package outline SOT519-1 (SSOP16)

Product data sheet Rev. 2 — 19 May 2011 9 of 14

NXP Semiconductors

13. Abbreviations

Table 9. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor DDC Data Display Channel DVI Digital Video Interface EMI ElectroMagnetic Interference ESD ElectroStatic Discharge FET Field Effect Transistor HSYNC Horizontal SYNChronization MOSFET Metal Oxide Semiconductor Field Effect Transistor PC Personal Computer RFI Radio Frequency Interference RGB Red Green Bl ue RoHS Restriction od Hazardous Substances SYNC SYNChronization TTL Transistor-Transistor Logic VGA Video Graphics Adapter VSYNC Vertical SYNChronization

IP4770/71/72CZ16

VGA/video interface

Product data sheet Rev. 2 — 19 May 2011 10 of 14

NXP Semiconductors

IP4770/71/72CZ16

VGA/video interface

14. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

IP4770_71_72CZ16 v.2 20110519 Product data sheet - IP4770CZ16_4771_4772 v.1 Modifications:

IP4770CZ16_4771_4772 v.1 20061025 Product data sheet - -

• Section 5 “Marking”: added.

• Figure 1: corrected.

• Table 9: updated.

• Section 15 “Legal information”: updated.

Product data sheet Rev. 2 — 19 May 2011 11 of 14

NXP Semiconductors

IP4770/71/72CZ16

VGA/video interface

15. Legal information

15.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) d escribed i n this docume nt may have changed since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

15.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

In no event shall NXP Semiconductors be lia ble for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonabl y be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

, unless otherwise

Product data sheet Rev. 2 — 19 May 2011 12 of 14

NXP Semiconductors

IP4770/71/72CZ16

VGA/video interface

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It i s neither qua lif ied nor test ed in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equ ipment or applications.

In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, da mages or failed produ ct cl aims resulting from custome r design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

15.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.

16. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 2 — 19 May 2011 13 of 14

NXP Semiconductors

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3

7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5

9 Recommended operating conditions. . . . . . . . 6

10 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6

11 Application information. . . . . . . . . . . . . . . . . . . 8

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10

14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12

15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12

15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

16 Contact information. . . . . . . . . . . . . . . . . . . . . 13

17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

IP4770/71/72CZ16

VGA/video interface

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Document identifier: IP4770_71_72CZ16

Date of release: 19 May 2011

NXP IP4770CZ16, IP4771CZ16, IP4772CZ16 Schematic [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual

1. General description

2. Features and benefits

3. Applications

4. Ordering information

5. Marking

6. Functional diagram

7. Pinning information

7.1 Pinning

7.2 Pin description

8. Limiting values

9. Recommended operating conditions

10. Characteristics

11. Application information

12. Package outline

13. Abbreviations

14. Revision history

15. Legal information

15.1 Data sheet status

15.2 Definitions

15.3 Disclaimers

15.4 Trademarks

16. Contact information

17. Contents