NXP’s general-purpose input/output (GPIO) expanders are a simple, cost-effective way to monitor and control several peripheral
5.0V
signals. They make it easy for designers to add extra I/O to their design and thereby free up the microprocessor’s GPIO for other,
more important functions. NXP is the industry leader in serial-interface GPIO expanders, and offers a broad selection of costeffective, easy-to-use options.
I2C-Bus GPIO Expander Application Example
VDD
MASTER
CONTROLLER
GND
SDA
SCL
RST
INT
OE
VDD = 2.3V to 5.5V
10KΩΩΩΩ
10K10K
10K
SDA
SCL
RESET
INT
OE
AD2
AD1
AD0
VDD
PCA9698
GND
IO0_0
IO0_1
IO0_2
IO0_3
IO0_4
IO0_5
IO0_6
IO0_7
IO1_0
IO1_7
IO2_0
IO2_7
2KΩ
SUBSYSTEM 1
Temp. Sens or
INT
Switch
Switch
10KΩ
Switch
SUBSYSTEM 2
Coun ter
RST
10KΩ
10KΩ
24 L ED Matrix
Alp hanu mer ic
Keyp ad
SUBSYSTEM 3
Alar m Syst em
ALARM
5.0V
5.0V
SUBSYSTEM 4
Memor y
CS
I2C-bus address = 0100 000x
The I2C-bus allows easy two-line communication between two devices using a serial data line (SDA) and a serial clock line (SCL)
and, as a result, is a popular choice for computing, consumer electronics, communication, and industrial systems.
I2C-Bus Communication Protocol and Timing Diagram
SDA
MSB
LSB
R/W
RX-ACK
MSB
LSB
RX-ACK
SCL
Start
Condition
1
2
Address Transfer
From Master to Slave
3-67
8
Data
Direction Bit
9
12
Data Transfer From Master to Slave (Write)
or Slave to Master (Read)
3-78
9
Stop
Condition
NXP’s I2C-bus GPIO expanders support three operating modes for data transfer: Standard Mode, with data transfer rates from
0 kbps to 100 kbps, Fast Mode (Fm), with data transfer rates from 0 kbps to 400 kbps, and Fast-mode Plus (Fm+) with data rates
from 0 kbps to 1 Mbps. Since the newer Fm+ GPIO are backward compatible all the way back to Standard Mode, it’s easy to
expand existing designs without changing the bus master device.
Application Support
NXP supports its GPIO expanders with several evaluation modules
UART
LED
PCA9901
8-pin SPI
connector
SPI
9-pin I2C-2005
connector
9-pin I2C-2005
connector
and demo boards that can be used to develop software and
evaluate performance.
The I2C-bus Fm+ Development Kit and associated GPIO daughter
cards provide a quick way to learn about the devices and the
I2C-bus protocol. The cards are modular, so they increase design
flexibility while providing easy access to the expander’s I/O pins.
For more information, visit ics.nxp.com/support/tools/interface
NXP’s GPIO expanders are classified in different groups according to the output structure type: totem-pole (push-pull) output, quasi
bidirectional I/O, and open-drain I/O.
Totem-Pole (Push-Pull) Output Expanders
Totem-pole outputs (consisting of upper and lower transistors)
are ideal for fast switching applications (steep HIGH-LOW and
LOW-HIGH transitions) where the output stage is required to
source or sink current. To switch a pin between input and output,
a Port Configuration Register must be programmed. An Output
Port Register is used for storing the logic state of the signal
driven to the output and a separate Input Port Register stores
the logic state of input pins. Some totem-pole GPIO expanders
are capable of input signal inversion, sparing the user the need
of external inversion logic. Options with an internal pull-up
resistor are also available.
CC
I
OH
100 k Ω
(optional)
I/O Pin
Output
Control
I
OL
Input
Quasi Bidirectional I/O Expanders
Quasi-bidirectional I/O ports are easy to use since they can
be configured as an input or output without the need of a Port
Configuration Register. They have a weak current-source pull-up
to keep the port HIGH and are assisted by a strong pull-up for half
a clock cycle during LOW-HIGH transitions. When driving a LOW,
the lower transistor has a 25 mA current sinking capability. This
configuration allows steep HIGH-LOW and LOW-HIGH transitions.
When used as an input, the pull-up current source is easily
overpowered by the driving circuit. Given the limited hold current
capability, quasi-bidirectional I/O are not capable of driving
devices that require over 100 μA of current.
for ½ SCL cycle
V
CC
100 µA
I/O Pin
Output
I
OHt
Control
I
OL
Input
Open-Drain I/O Expanders
Open-drain I/O are only capable of sinking current and rely on a pull-up
resistor to drive the line HIGH. Under heavy capacitive loading conditions,
Input
they have slower LOW-to-HIGH transitions compared to the totem-pole
outputs, which have a steep HIGH-to-LOW transitions. Some of the GPIO
expanders have an open-drain output option with no pull-up resistor and
no current source on the output. This allows wired-AND connections or
no current flow through parasitic diodes/LEDs when operated on different
power supplies with one supply turned off. Other open-drain GPIO have
integrated Pulse Width Modulation (PWM) that can be programmed to blink/
dim LEDs according to the frequency and duty cycle stored in the PWM0 or
PWM1 registers. Since they significantly reduce bus traffic, the GPIO with
PWM controls are ideal for LED status applications where LEDs are switched
off, on, blinked, or dimmed. These open-drain I/O typically have an input
1 (To Enable Hi-Z)
PWM0
PWM1
Output
Selection
0
I
OL
PWM Control
Circuitry
function.
2
I
C Fast-mode Plus (Fm+):
2
The I
C-bus speed for the Fast-mode Plus devices go from zero (DC) to 1 MHz with ten times the normal drive but are fully compatible
with slower bus-speed devices. The higher bandwidth allows more devices on the bus, for increased bus traffic and more complicated
patterns. The I
2
C-bus drive strength of 30 mA allows for heavier capacitive load or longer cable lengths without the need for an
additional buffer.
The GPIO Expandar Fm+ devices, identified with the part number PCA96xx, include other useful features like resetting the registers
and I/O ports to the power-up default state via software, external hardware reset pin, 25 mA per pin with a total of 200 mA per octal,
and supporting up to 64 addresses on the I