NXP AN13106 Application Note

AN13106

Migration guide from i.MX RT1060 to i.MX RT1170

Rev. 1 — February 18, 2021

by: NXP Semiconductors

Contents

1 Introduction

This document describes key differences and new features on i.MX RT1170,
compared with i.MX RT1060. This document can be used as the migration
reference. It is intended for audience:

• who have developed some projects based i.MX RT1060 and decided to
migrate the project into i.MX RT1170.

• who is familiar with i.MX RT1060 and want to start the new project
based on previous knowledge on i.MX RT1060.

1 Introduction......................................1

2 SOC comparison.............................2

3 Package.......................................... 4

4 Pin mux........................................... 4

5 Power supply change......................5

6 Clock............................................... 5

6.1 Overview......................................5

6.2 Oscillator & PLL........................... 6

7 Power mode/management.............. 6

8 DMA................................................ 6

9 Memory map................................... 6

10 ECC.................................................7

11 Graphic and display........................ 8

11.1 Graphics Processing Unit (GPU2D)

11.2 LCDIFv2.......................................8

12 Audio............................................... 9

12.1 ASRC...........................................9

12.2 PDM MIC interface.......................9

13 Low speed peripherals.................. 10

13.1 FlexIO........................................ 10

14 EMVSIM........................................ 10

15 Watchdog...................................... 10

16 Analog........................................... 11

17 Boot...............................................11

18 Security......................................... 12

19 Software migration consideration..14

20 References....................................14

21 Revision history.............................14

Application Note

.....................................................8

NXP Semiconductors

2 SOC comparison

Table 1 lists the SOC comparisons. Text in red is new features on i.MX RT1170.

Table 1. SOC comparison

Items for comparison i.MX RT1060 i.MX RT1170

Core and on-chip RAM

SOC comparison

CM7 @ Up to 600 MHz

Core 0

Core 1 —

FLEX RAM 512 KB 512 KB

OCRAM

External memory interface

SEMC - SDRAM

SEMC - NAND 8/16-bit SLC NAND FLASH 8/16-bit SLC NAND FLASH

SEMC - Parallel NOR FLASH/SRAM Up to 16 bit Up to 16 bit

32 KB I-Cache

32 KB D-Cache

512 KB

8/16-bit SDRAM

up to 166 MHz

CM7 @ Up to 1 GHz

32 KB I-Cache

32 KB D-Cache

CM4 @ Up to 400 MHz

16 KB I-Cache

16 KB D-Cache

512 KB + 128 KB OCRAM1

512 KB + 128 KB OCRAM2

256 KB (Shared with CM4 TCM)

8/16/32-bit SDRAM

Up to 200 MHz

uSDHC - SD/eMMC eMMC 4.5/SD 3.0 eMMC 5.0/SD 3.0

Flex SPI 2 2

Flex SPI - Width Up to 8 bit Up to 16 bit

Flex SPI - Single/Dual/Quad SPI interface √ √

Flex SPI - Hyper √ √

Flex SPI - PSRAM — √

Flex SPI - OCT interface with XIP support √ √

Graphic, Display & Camera

LCDIF √ √

LCDIFv2

—

√

Table continues on the next page...

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Table 1. SOC comparison (continued)

Items for comparison i.MX RT1060 i.MX RT1170

PXP √ √

SOC comparison

GPU

—

√

Parallel CSI √ √

Parallel DSI √ √

MIPI CSI

MIPI DSI

—

—

√

√

Connectivity

USB 2 2

10/100M ENET with IEEE1588 2 1

1G ENET with AVB — 1

1G ENET with TSN — 1

UART 8 12

LPSPI 4 6

I2C 4 6

FlexCAN 3 3

FlexIO 3 2

EVMSIM — 2

GPIO 149 174

Audio

SAI 3 4

SPDIF 1 1

ASRC — 1

PDM MIC — 1

MQS 1 1

Timer

WDOG 4 5

Table continues on the next page...

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Table 1. SOC comparison (continued)

Items for comparison i.MX RT1060 i.MX RT1170

GPT 6 6

QDC 4 4

QTimer 4 4

FlexPWM 4 4

PIT 1 2

Analog

ACMP 4 4

ADC 2 0

LPADC 0 2

Package

ADC ETC 1 1

DAC 0 1

TSC 1 0

Others

eDMA 1 2

8 × 8 Keypad √ √

Security √ √

3 Package

As shown in Table 2, i.MX RT1170 is a 289-pin MAPBGA while i.MX RT1060 is a 196-pin MAPBGA. i.MX RT1170 has a larger
package in order to accommodate additional functionality and change to the power architecture.

Table 2. Package comparison

RT1060 RT1170

Package 196-pin MAPBGA 289-pin MAPBGA

4 Pin mux

For the new pin mux on i.MX RT1170, user can refer to Table 3.

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Power supply change

Table 3. Pin mux information/tools

Pin mux information/tools Comments

Muxing Options table in RM Give pin list information for a peripheral.

Pin Assignments in RM Give pin mux list information on a pin and also show pad setting.

Pin Assignments in excel format

Pin config tool in MCUXpresso or standalone tools A powerful graphic tool help customer to assign pin for application.

This table is in the attachment of this document as an option for
pin assignment.

5 Power supply change

The following describes key differences between i.MX RT1170 and RT1060. For details, see

for the MIMXRT1170 Processor

(document MIMXRT1170EVKHUG).

• i.MX RT1170 has more power domains than RT1060, especially introduces NVCC_LPSR domain. You will see during power
up sequence only if VDD_LPSR_DIG is stable, VDD_SOC_IN can be applied after 1 ms delay.

• i.MX RT1170 uses POR pin reset in VDD_SNVS_DIG (1.8 V) domain, which means to add external pull up or to use external
POR logic, guarantee the voltage level first.

• i.MX RT1170 internal DCDC has two outputs, VDD_DIG for core platform and 1.8 V for chip supply. i.MX RT1060 has only
one output.

• i.MX RT1170 is an automotive grade product and the internal DCDC load capacity is limited, so external PMIC is required
to power the core platform. For RT1060, internal DCDC is suggested for different standard products.

(document MIMXRT1170HDUG) and

MIMXRT1170 EVK Board Hardware User’s Guide

Hardware Development Guide

6 Clock

6.1 Overview

i.MX RT1170 clock architecture is new. It consists of three parts:

• Crystal/OSC/PLL/PLL_PFD as clock source

• Available clock source for each clock root and divider setting

• Clock gate

For more important information related to the below, see

• System Clocks Table: Gives the IP clock mapping to system clock source.

• Clock Tree: Gives the clock path from clock source to each root clock.

• Clock Sources Table: Lists all possible clock sources.

• Clock Root Table: Give the available clock source for each root clock.

• Clock Gate Table: Lists all the gate control.

• Clock Group: Lists all the clock groups (Synchronized clock).

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i.MX RT1170 Processor Reference Manual

(document IMXRT1170RM).