NXP 74LVC1G08GF, 74LVC1G08GM, 74LVC1G08GN, 74LVC1G08GS, 74LVC1G08GV Schematic [ru]

74LVC1G08

Single 2-input AND gate

Rev. 10 — 29 June 2012 Product data sheet

1. General description

The 74LVC1G08 provides one 2-input AND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall

time.
This device is fully specified for partial power-down applications using I

The I
the device when it is powered down.

circuitry disables the output, preventing the damaging backflow current through

OFF

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V
 High noise immunity
 Complies with JEDEC standard:

 JESD8-7 (1.65 V to 1.95 V)
 JESD8-5 (2.3 V to 2.7 V)

 JESD8-B/JESD36 (2.7 V to 3.6 V)
 24 mA output drive (V
 CMOS low power consumption
 Latch-up performance  250 mA
 Direct interface with TTL levels
 Inputs accept voltages up to 5 V
 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specifie d from 40 C to +85 C and 40 C to +125 C

=3.0V)

CC

OFF

.

NXP Semiconductors

mna113

B
A

Y

2

1

4

mna114

2

4

&

1

mna221

A

B

Y

3. Ordering information

74LVC1G08

Single 2-input AND gate

Table 1. Ordering information

Type number Package

T emperature

Name Description Version

range

74LVC1G08GW 40 Cto+125C TSSOP5 plastic thin shrink small outline package; 5 leads;

SOT353-1

body width 1.25 mm
74LVC1G08GV 40 Cto+125C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G08GM 40 Cto+125C XSON6 plastic extremely thin small outline package;

SOT886

no leads; 6 terminals; body 1  1.45  0.5 mm
74LVC1G08GF 40 C to +125 C XSON6 plastic extremely thin small outline package;

SOT891

no leads; 6 terminals; body 1  1  0.5 mm
74LVC1G08GN 40 C to +125 C XSON6 extremely thin small outline package; no leads;

SOT1115

6 terminals; body 0.9  1.0  0.35 mm
74LVC1G08GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;

SOT1202

6 terminals; body 1.0  1.0  0.35 mm
74LVC1G08GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin

SOT1226
small outline package; no leads; 5 terminals;
body 0.8  0.8  0.35 mm

4. Marking

Table 2. Marking

Type number Marking code

74LVC1G08GW VE
74LVC1G08GV V08
74LVC1G08GM VE
74LVC1G08GF VE
74LVC1G08GN VE
74LVC1G08GS VE
74LVC1G08GX VE

[1]

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram

74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.

Product data sheet Rev. 10 — 29 June 2012 2 of 19

NXP Semiconductors

74LVC1G08

BV

CC

A

GND Y

001aab638

1

2

3

5

4

74LVC1G08

A

001aab639

B

GND

n.c.

V

CC

Y

Transparent top view

2

3

1

5

4

6

74LVC1G08

A

001aae978

B

GND

n.c.

V

CC

Y

Transparent top view

2

3

1

5

4

6

6. Pinning information

6.1 Pinning

Fig 4. Pin configu ration SOT353-1 and SOT753 Fig 5. Pin configuration SOT886

74LVC1G08

Single 2-input AND gate

B

Fig 6. Pin configu ration SOT891, SOT1115 and

Fig 7. Pin configuration SOT1226 (X2SON5)

SOT1202

6.2 Pin description

Table 3. Pin description

Symbol Pin Description

TSSOP5 and X2SON5 XSON6

B 1 1 data input
A 2 2 data input
GND 3 3 ground (0 V)
Y 4 4 data output
n.c. - 5 not connected
V

CC

5 6 supply voltage

74LVC1G08

1

3

GND

2

aaa-003023

Transparent top view

5

4AY

V

CC

74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.

Product data sheet Rev. 10 — 29 June 2012 3 of 19

NXP Semiconductors

74LVC1G08

Single 2-input AND gate

7. Functional description

Table 4. Function table

[1]

Input Output
A B Y

LLL
LHL
HLL
HHH

[1] H = HIGH voltage level; L = LOW voltage level

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

V

CC

I

IK

V

I

I

OK

V

O

I

O

I

CC

I

GND

P

tot

T

stg

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When V
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of P

For XSON6 and X2SON5 package: above 118 C the value of P

supply voltage 0.5 +6.5 V
input clamping current VI < 0 V 50 - mA
input voltage

[1]

0.5 +6.5 V
output clamping current VO > VCC or VO < 0 V - 50 mA
output voltage Active mode

Power-down mode

output current VO = 0 V to V

CC

[1][2]

0.5 VCC + 0.5 V

[1][2]

0.5 +6.5 V

- 50 mA
supply current - 100 mA
ground current 100 - mA
total power dissipation T

= 40 C to +125 C

amb

[3]

- 250 mW
storage temperature 65 +150 C

= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.

CC

derates linearly with 4.0 mW/K.

tot

derates linearly with 7.8 mW/K.

tot

74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.

Product data sheet Rev. 10 — 29 June 2012 4 of 19

NXP Semiconductors

9. Recommended operating conditions

74LVC1G08

Single 2-input AND gate

Table 6. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

V

CC

V

I

V

O

T

amb

t/V input transition rise and fall rate V

supply voltage 1.65 - 5.5 V
input voltage 0 - 5.5 V
output voltage Active mode 0 - V

= 0 V; Power-down mode 0 - 5.5 V

V

CC

CC

V

ambient temperature 40 - +125 C

= 1.65 V to 2.7 V - - 20 ns/V

CC

= 2.7 V to 5.5 V - - 10 ns/V

V

CC

10. Static characteristics

Table 7. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

V

IH

HIGH-level
input voltage

V

IL

LOW-level
input voltage

V

OH

HIGH-level
output voltage

V

OL

LOW-level
output voltage

I

I

input leakage
current

Min Typ

VCC = 1.65 V to 1.95 V 0.65V

= 2.3 V to 2.7 V 1.7 - - 1.7 - V

V

CC

= 2.7 V to 3.6 V 2.0 - - 2.0 - V

V

CC

V

= 4.5 V to 5.5 V 0.7V

CC

CC

CC

VCC = 1.65 V to 1.95 V - - 0.35V

= 2.3 V to 2.7 V - - 0.7 - 0.7 V

V

CC

= 2.7 V to 3.6 V - - 0.8 - 0.8 V

V

CC

= 4.5 V to 5.5 V - - 0.3V

V

CC

VI=VIHor V

IO= 100 A;

IL

VCC 0.1 - - VCC 0.1 - V

[1]

Max Min Max

- - 0.65V

- - 0.7V

CC

CC

-0.35VCCV

-0.3VCCV

CC

CC

VCC= 1.65 V to 5.5 V

= 4mA; VCC = 1.65 V 1.2 - - 0.95 - V

I

O

= 8mA; VCC = 2.3 V 1.9 - - 1.7 - V

I

O

= 12 mA; VCC = 2.7 V 2.2 - - 1.9 - V

I

O

= 24 mA; VCC = 3.0 V 2.3 - - 2.0 - V

I

O

= 32 mA; VCC = 4.5 V 3.8 - - 3.4 - V

I

O

VI=VIHor V

IO=100A;

IL

- - 0.10 - 0.10 V

VCC= 1.65 V to 5.5 V

=4mA; VCC = 1.65 V - - 0.45 - 0.70 V

I

O

=8mA; VCC = 2.3 V - - 0.30 - 0.45 V

I

O

=12mA; VCC = 2.7 V - - 0.40 - 0.60 V

I

O

=24mA; VCC = 3.0 V - - 0.55 - 0.80 V

I

O

=32mA; VCC = 4.5 V - - 0.55 - 0.80 V

I

O

VI = 5.5 V or GND;

=0Vto5.5V

V

CC

- 0.1 5-100 A

-V

-V

74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.

Product data sheet Rev. 10 — 29 June 2012 5 of 19

NXP Semiconductors

74LVC1G08

Single 2-input AND gate

Table 7. Static characteristics

…continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

[1]

Max Min Max

I

OFF

power-off

Min Typ

VCC = 0 V; VIor VO=5.5V - 0.1 10 - 200 A
leakage
current

I

I

C

CC

supply current VI = 5.5 V or GND; IO = 0 A;

= 1.65 V to 5.5 V

V

CC

CC

additional
supply current

I

input

per pin; VCC = 2.3 V to 5.5 V;

VI=VCC 0.6 V; IO=0 A

VCC= 3.3 V; VI = GND to V

CC

-0.110 - 200A

- 5 500 - 5000 A

-5- - -pF

capacitance

[1] All typical values are measured at VCC= 3.3 V and T

amb

=25C.

11. Dynamic characteristics

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 9.

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

t

pd

C

PD

propagation delay A, B to Y; see Figure 8

power dissipation
capacitance

VCC= 1.65 V to 1.95 V 1.0 3.4 8.0 1.0 10.5 ns

= 2.3 V to 2.7 V 0.5 2.2 5.5 0.5 7.0 ns

V

CC

= 2.7 V 0.5 2.5 5.5 0.5 7.0 ns

V

CC

= 3.0 V to 3.6 V 0.5 2.1 4.5 0.5 6.0 ns

V

CC

= 4.5 V to 5.5 V 0.5 1.7 4.0 0.5 5.5 ns

V

CC

VI = GND to VCC; VCC= 3.3 V

Min Typ

[2]

[3]

-16- - -pF

[1]

Max Min Max

[1] Typical values are measured at T
[2] t

is the same as t

pd

[3] C

74LVC1G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.

Product data sheet Rev. 10 — 29 June 2012 6 of 19

is used to determine the dynamic power dissipation (PDin W).

PD

P
f

i

f

o

C
V
N = number of inputs switching;

(C

 V

D=CPD

= input frequency in MHz;

= output frequency in MHz;

= output load capacitance in pF;

L

= supply voltage in V;

CC

L

CC

2

 V

 fo) = sum of outputs.

CC

and t

PLZ

2

 fi N+(CL V

PZL

=25C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.

amb

.

2

 fo) where:

CC