NXP 74LVC1G00GF, 74LVC1G00GM, 74LVC1G00GV, 74LVC1G00GW Schematic [ru]

74LVC1G00

Single 2-input NAND gate

Rev. 07 — 17 July 2007 Product data sheet

1. General description

The 74LVC1G00 provides the single 2-input NAND function.
Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these

devices in a mixed 3.3 Vand 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall

time.

2. Features

This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.

■ Wide supply voltage range from 1.65 V to 5.5 V

■ High noise immunity

■ Complies with JEDEC standard:

■ ±24 mA output drive (VCC= 3.0 V)

■ CMOS low power consumption

■ Latch-up performance exceeds 250 mA

■ Direct interface with TTL levels

■ Inputs accept voltages up to 5 V

■ Multiple package options

■ ESD protection:

■ Specified from −40 °Cto+85°C and −40 °C to +125 °C

circuitry disables the output, preventing the damaging backflow current through

OFF

◆ JESD8-7 (1.65 V to 1.95 V)

◆ JESD8-5 (2.3 V to 2.7 V)

◆ JESD8-B/JESD36 (2.7 V to 3.6 V)

◆ HBM JESD22-A114E exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V

OFF

.

NXP Semiconductors

74LVC1G00

Single 2-input NAND gate

3. Ordering information

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74LVC1G00GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;

SOT353-1

5 leads; body width 1.25 mm
74LVC1G00GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G00GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package;

SOT886

no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
74LVC1G00GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package;

SOT891

no leads; 6 terminals; body 1 × 1 × 0.5 mm

4. Marking

Table 2. Marking codes

Type number Marking

74LVC1G00GW VA
74LVC1G00GV V00
74LVC1G00GM VA
74LVC1G00GF VA

5. Functional diagram

1

B

2

A

mna097

4

Y

1
2

&

mna098

4

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram

B

A

Y

mna099

74LVC1G00_7 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 07 — 17 July 2007 2 of 14

NXP Semiconductors

6. Pinning information

6.1 Pinning

74LVC1G00

Single 2-input NAND gate

74LVC1G00

74LVC1G00

1

BV

2

A

3

GND Y

001aab608

5

CC

4

Fig 4. Pin configuration SOT353-1

Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891

1

B

2

A

3

GND

Transparent top view

6

V

5

n.c.

4

Y

001aab603

CC

and SOT753

6.2 Pin description

Table 3. Pin description

Symbol Pin Description

SOT353-1/SOT753 SOT886/SOT891

B 1 1 data input
A 2 2 data input
GND 3 3 ground (0 V)
Y 4 4 data output
n.c. - 5 not connected
V

CC

5 6 supply voltage

74LVC1G00

1

B

A

2

GND

3

Transparent top view

V

6

n.c.

5

Y

4

001aaf051

CC

7. Functional description

Table 4. Function table

Inputs Outputs
A B Y

LLH
LHH
HLH
HHL

[1] H = HIGH voltage level;

L = LOW voltage level.

74LVC1G00_7 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 07 — 17 July 2007 3 of 14

[1]

NXP Semiconductors

74LVC1G00

Single 2-input NAND gate

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

V
I

IK

V
I

OK

V

I

O

I

CC

I

GND

P
T

CC

I

O

tot
stg

supply voltage −0.5 +6.5 V
input clamping current VI < 0 V −50 - mA
input voltage

[1]

−0.5 +6.5 V
output clamping current VO > VCC or VO < 0 V - ±50 mA
output voltage Active mode

Power-down mode

output current VO = 0 V to V

CC

[1][2]

−0.5 VCC + 0.5 V

[1][2]

−0.5 +6.5 V

- ±50 mA
supply current - +100 mA
ground current −100 - mA
total power dissipation T

= −40 °C to +125 °C

amb

[3]

- 250 mW
storage temperature −65 +150 °C

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 °C the value of P

For XSON6 packages: above 45 °C the value of P

derates linearly with 2.4 mW/K.

tot

derates linearly with 4.0 mW/K.

tot

9. Recommended operating conditions

Table 6. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

V

CC

V

I

V

O

T

amb

∆t/∆V input transition rise and fall rate V

supply voltage 1.65 - 5.5 V
input voltage 0 - 5.5 V
output voltage Active mode 0 - V

= 0 V; Power-down mode 0 - 5.5 V

V

CC

CC

V

ambient temperature −40 - +125 °C

= 1.65 V to 2.7 V - - 20 ns/V

CC

= 2.7 V to 5.5 V - - 10 ns/V

V

CC

74LVC1G00_7 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 07 — 17 July 2007 4 of 14

NXP Semiconductors

74LVC1G00

Single 2-input NAND gate

10. Static characteristics

Table 7. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit

[1]

Max Min Max

- - 0.65V

- - 0.7V

CC

CC

- 0.35VCCV

- 0.3V

CC

CC

-V

-V

V

CC

V

V

V

V

I

I

I

OFF

I

CC

∆I

C

IH

IL

OH

OL

CC

I

HIGH-level
input voltage

LOW-level
input voltage

HIGH-level
output voltage

LOW-level
output voltage

input leakage
current

power-off

VCC = 1.65 V to 1.95 V 0.65V

= 2.3 V to 2.7 V 1.7 - - 1.7 - V

V

CC

= 2.7 V to 3.6 V 2.0 - - 2.0 - V

V

CC

= 4.5 V to 5.5 V 0.7V

V

CC

VCC = 1.65 V to 1.95 V - - 0.35V

= 2.3 V to 2.7 V - - 0.7 - 0.7 V

V

CC

= 2.7 V to 3.6 V - - 0.8 - 0.8 V

V

CC

= 4.5 V to 5.5 V - - 0.3V

V

CC

VI=VIHor V

IL

IO= −100 µA;
V

= 1.65 V to 5.5 V

CC

= −4 mA; VCC = 1.65 V 1.2 - - 0.95 - V

I

O

= −8 mA; VCC = 2.3 V 1.9 - - 1.7 - V

I

O

= −12 mA; VCC = 2.7 V 2.2 - - 1.9 - V

I

O

= −24 mA; VCC = 3.0 V 2.3 - - 2.0 - V

I

O

= −32 mA; VCC = 4.5 V 3.8 - - 3.4 - V

I

O

VI=VIHor V

IL

IO= 100 µA;
V

= 1.65 V to 5.5 V

CC

= 4 mA; VCC = 1.65 V - - 0.45 - 0.70 V

I

O

= 8 mA; VCC = 2.3 V - - 0.3 - 0.45 V

I

O

= 12 mA; VCC = 2.7 V - - 0.4 - 0.60 V

I

O

= 24 mA; VCC = 3.0 V - - 0.55 - 0.80 V

I

O

= 32 mA; VCC = 4.5 V - - 0.55 - 0.80 V

I

O

VI = 5.5 V or GND;
V

= 0 V to 5.5 V

CC

VCC = 0 V; VIor VO= 5.5 V - ±0.1 ±10 - ±200 µA
leakage
current

supply current VI = 5.5 V or GND; IO = 0 A;

V

= 1.65 V to 5.5 V

CC

additional
supply current

VCC = 2.3 V to 5.5 V;

V

I=VCC

− 0.6 V; IO= 0 A;

per pin
input

VCC= 3.3 V; VI = GND to V
capacitance

CC

Min Typ

CC

CC

− 0.1 - - VCC− 0.1 - V

V

CC

- - 0.1 - 0.1 V

- ±0.1 ±5-±100 µA

- 0.1 10 - 200 µA

- 5 500 - 5000 µA

-5- - -pF

[1] All typical values are measured at VCC= 3.3 V and T

74LVC1G00_7 © NXP B.V. 2007. All rights reserved.

Product data sheet Rev. 07 — 17 July 2007 5 of 14

amb

=25°C.