74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
Rev. 3 — 27 August 2012 Product data sheet
1. General description
The 74HC86; 74HCT86 are high-speed Si-gate CMOS devices that comply with JEDEC
standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC86; 74HCT86 provides a 2-input EXCLUSIVE-OR function.
2. Features and benefits
Input levels:
For 74HC86: CMOS level
For 74HCT86: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specifie d from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC86N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT86N
74HC86D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
74HCT86D
74HC86DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
74HCT86DB
74HC86PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
74HCT86PW
SOT108-1
3.9 mm
SOT337-1
width 5.3 mm
SOT402-1
body width 4.4 mm
NXP Semiconductors
mna787
1A
1B
1Y
2
1
3
2A
2B
2Y
5
4
6
3A
3B
3Y
10
9
8
4A
4B
4Y
13
12
11
mna788
Y
A
B
mna786
3
=1
=1
=1
=1
2
1
6
5
4
8
10
9
11
13
12
4. Functional diagram
Fig 1. Logic symbol
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
Fig 2. Logic diagram (one gate) Fig 3. IEC logic symbol
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 2 of 16
NXP Semiconductors
86
1A V
CC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
001aad103
1
2
3
4
5
6
7 8
10
9
12
11
14
13
5. Pinning information
5.1 Pinning
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
5.2 Pin description
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10, 13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
V
CC
14 supply voltage
6. Functional description
Table 3. Function table
Input nA Input nB Output nY
LLL
LHH
HLH
HHL
[1] H = HIGH voltage level;
L = LOW voltage level.
[1]
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 3 of 16
NXP Semiconductors
7. Limiting values
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
I
IK
I
OK
I
O
I
CC
I
GND
T
P
CC
stg
tot
supply voltage 0.5 +7 V
input clamping current VI < 0.5 V or VI>VCC+0.5 V
output clamping current VO< 0.5 V or VO>VCC+0.5V
[1]
- 20 mA
[1]
- 20 mA
output current 0.5 V < VO < VCC+0.5V - 25 mA
supply current - 50 mA
ground current 50 - mA
storage temperature 65 +150 C
total power dissipation
[2]
DIP14 package - 750 mW
SO14, and (T)SSOP14
- 500 mW
packages
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: P
For SO14 package: P
For (T)SSOP14 packages: P
derates linearly with 12 mW/K above 70 C.
tot
derates linearly with 8 mW/K above 70 C.
tot
derates linearly with 5.5 mW/K above 60 C.
tot
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC86 74HCT86 Unit
Min Typ Max Min Typ Max
V
CC
V
I
V
O
T
amb
t/V input transition rise and fall rate V
supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
input voltage 0 - V
output voltage 0 - V
0- VCCV
CC
0- VCCV
CC
ambient temperature 40 +25 +125 40 +25 +125 C
= 2.0 V - - 625 - - - ns/V
CC
= 4.5 V - 1.67 139 - 1.67 139 ns/V
V
CC
= 6.0 V--83---ns/V
V
CC
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 4 of 16
NXP Semiconductors
9. Static characteristics
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC86
V
IH
HIGH-level
input voltage
V
IL
LOW-level
input voltage
V
OH
HIGH-level
output voltage
V
OL
LOW-level
output voltage
I
I
input leakage
current
I
CC
supply current VI = VCC or GND; IO=0A;
VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
= 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
V
CC
= 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
V
CC
VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
= 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
V
CC
= 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
V
CC
VI = VIH or V
IL
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
= 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
I
O
= 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
I
O
= 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
I
O
VI = VIH or V
IL
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
I
= 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
O
= 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
I
O
= 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
I
O
= 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
I
O
VI = VCC or GND;
=6.0V
V
CC
--0.1 - 1-1 A
--2.0- 20 - 40A
VCC=6.0V
C
I
input
-3.5- - - - -pF
capacitance
74HCT86
V
IH
HIGH-level
VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
input voltage
V
IL
LOW-level
VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
input voltage
V
OH
HIGH-level
output voltage
V
OL
LOW-level
output voltage
I
I
input leakage
current
VI = VIH or VIL; VCC = 4.5 V
= 20 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
I
O
VI = VIH or VIL; VCC = 4.5 V
= 20 A - 0 0.1 - 0.1 - 0.1 V
I
O
= 5.2 mA - 0.15 0.26 - 0.33 - 0.4 V
I
O
VI = VCC or GND;
=5.5V
V
CC
--0.1 - 1-1 A
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 5 of 16
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